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* Merge tag 'pwm/for-5.12-rc1' of ↵Linus Torvalds2021-02-256-352/+65
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm Pull pwm updates from Thierry Reding: "The ZTE ZX platform is being removed, so the PWM driver is no longer needed and removed as well. Other than that this contains a small set of fixes and cleanups across a couple of drivers" * tag 'pwm/for-5.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: pwm: lpc18xx-sct: remove unneeded semicolon pwm: iqs620a: Correct a stale state variable pwm: iqs620a: Fix overflow and optimize calculations pwm: rockchip: Enable clock before calling clk_get_rate() pwm: rockchip: Eliminate potential race condition when probing pwm: rockchip: Replace "bus clk" with "PWM clk" pwm: rockchip: rockchip_pwm_probe(): Remove superfluous clk_unprepare() pwm: rockchip: Enable APB clock during register access while probing pwm: Remove ZTE ZX driver
| * pwm: lpc18xx-sct: remove unneeded semicolonYang Li2021-02-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | Eliminate the following coccicheck warning: ./drivers/pwm/pwm-lpc18xx-sct.c:292:2-3: Unneeded semicolon Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Yang Li <yang.lee@linux.alibaba.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: iqs620a: Correct a stale state variableJeff LaBundy2021-02-221-51/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If duty cycle is first set to a value that is sufficiently high to enable the output (e.g. 10000 ns) but then lowered to a value that is quantized to zero (e.g. 1000 ns), the output is disabled as the device cannot drive a constant zero (as expected). However if the device is later re-initialized due to watchdog bite, the output is re-enabled at the next-to-last duty cycle (10000 ns). This is because the iqs620_pwm->out_en flag unconditionally tracks state->enabled instead of what was actually written to the device. To solve this problem, use one state variable that encodes all 257 states of the output (duty_scale) with 0 representing tri-state, 1 representing the minimum available duty cycle and 256 representing 100% duty cycle. Signed-off-by: Jeff LaBundy <jeff@labundy.com> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: iqs620a: Fix overflow and optimize calculationsUwe Kleine-König2021-02-221-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If state->duty_cycle is 0x100000000000000, the previous calculation of duty_scale overflows and yields a duty cycle ratio of 0% instead of 100%. Fix this by clamping the requested duty cycle to the maximal possible duty cycle first. This way it is possible to use a native integer division instead of a (depending on the architecture) more expensive 64bit division. With this change in place duty_scale cannot be bigger than 256 which allows to simplify the calculation of duty_val. Fixes: 6f0841a8197b ("pwm: Add support for Azoteq IQS620A PWM generator") Tested-by: Jeff LaBundy <jeff@labundy.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: rockchip: Enable clock before calling clk_get_rate()Simon South2021-01-201-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The documentation for clk_get_rate() in include/linux/clk.h states the function's result is valid only for a clock source that has been enabled. However, the Rockchip PWM driver uses this function in two places to query the rate of a clock without first ensuring it is enabled. Fix this by modifying rockchip_pwm_get_state() and rockchip_pwm_apply() so they enable a device's PWM clock before querying its rate (in the latter case, the querying is actually done in rockchip_pwm_config()) and disable the clock again before returning. Reported-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Simon South <simon@simonsouth.net> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: rockchip: Eliminate potential race condition when probingSimon South2021-01-201-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 48cf973cae33 ("pwm: rockchip: Avoid glitches on already running PWMs") introduced a potential race condition in rockchip_pwm_probe(): A consumer could enable an inactive PWM, or disable a running one, between rockchip_pwm_probe() registering the device via pwmchip_add() and checking whether it is enabled (to determine whether it was started by a bootloader). This could result in a device's PWM clock being either enabled once more than necessary, potentially causing it to continue running when no longer needed, or disabled once more than necessary, producing a warning from the kernel. Eliminate these possibilities by modifying rockchip_pwm_probe() so it checks whether a device is enabled before registering it rather than after. Fixes: 48cf973cae33 ("pwm: rockchip: Avoid glitches on already running PWMs") Reported-by: Trent Piepho <tpiepho@gmail.com> Signed-off-by: Simon South <simon@simonsouth.net> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: rockchip: Replace "bus clk" with "PWM clk"Simon South2021-01-201-2/+2
| | | | | | | | | | | | | | | | | | | | | | Clarify the Rockchip PWM driver's error messages by referring to the clock that operates a PWM device as the "PWM" clock, matching its name in the device tree, rather than the "bus" clock (which is especially misleading in the case of devices that also use a separate clock for bus access). Suggested-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Simon South <simon@simonsouth.net> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: rockchip: rockchip_pwm_probe(): Remove superfluous clk_unprepare()Simon South2021-01-201-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If rockchip_pwm_probe() fails to register a PWM device it calls clk_unprepare() for the device's PWM clock, without having first disabled the clock and before jumping to an error handler that also unprepares it. This is likely to produce warnings from the kernel about the clock being unprepared when it is still enabled, and then being unprepared when it has already been unprepared. Prevent these warnings by removing this unnecessary call to clk_unprepare(). Fixes: 48cf973cae33 ("pwm: rockchip: Avoid glitches on already running PWMs") Signed-off-by: Simon South <simon@simonsouth.net> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: rockchip: Enable APB clock during register access while probingSimon South2021-01-201-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 457f74abbed0 ("pwm: rockchip: Keep enabled PWMs running while probing") modified rockchip_pwm_probe() to access a PWM device's registers directly to check whether or not the device is enabled, but did not also change the function so it first enables the device's APB clock to be certain the device can respond. This risks hanging the kernel on systems with PWM devices that use more than a single clock. Avoid this by enabling the device's APB clock before accessing its registers (and disabling the clock when register access is complete). Fixes: 457f74abbed0 ("pwm: rockchip: Keep enabled PWMs running while probing") Reported-by: Thierry Reding <thierry.reding@gmail.com> Suggested-by: Trent Piepho <tpiepho@gmail.com> Signed-off-by: Simon South <simon@simonsouth.net> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: Remove ZTE ZX driverArnd Bergmann2021-01-203-289/+0
| | | | | | | | | | | | | | | | | | | | The ZTE ZX platform is getting removed, so this driver is no longer needed. Cc: Jun Nie <jun.nie@linaro.org> Cc: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* | Merge tag 'pwm/for-5.11-rc1' of ↵Linus Torvalds2020-12-1947-371/+1181
|\| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm Pull pwm updates from Thierry Reding: "This is a fairly big release cycle from the PWM framework's point of view. There's a large patcheset here which converts drivers to use the new devm_platform_ioremap_resource() helper and a bunch of minor fixes to existing drivers. Some of the existing drivers also add support for more hardware, such as Atmel SAMA 5D2 and Mediatek MT8183. Finally there's a couple of new drivers for Intel Keem Bay and LGM SoCs as well as the DesignWare PWM controller" * tag 'pwm/for-5.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: (66 commits) pwm: sun4i: Remove erroneous else branch pwm: sl28cpld: Set driver data before registering the PWM chip pwm: Remove unused function pwmchip_add_inversed() pwm: imx27: Fix overflow for bigger periods pwm: bcm2835: Support apply function for atomic configuration pwm: keembay: Fix build failure with -Os pwm: core: Use octal permission pwm: lpss: Make compilable with COMPILE_TEST pwm: Fix dependencies on HAS_IOMEM pwm: Use -EINVAL for unsupported polarity pwm: sti: Remove unnecessary blank line pwm: sti: Avoid conditional gotos pwm: Add PWM fan controller driver for LGM SoC Add DT bindings YAML schema for PWM fan controller of LGM SoC pwm: Add DesignWare PWM Controller Driver dt-bindings: pwm: mtk-disp: add MT8167 SoC binding pwm: mediatek: Add MT8183 SoC support pwm: mediatek: Always use bus clock dt-bindings: pwm: pwm-mediatek: Add documentation for MT8183 SoC pwm: Add PWM driver for Intel Keem Bay ...
| * pwm: sun4i: Remove erroneous else branchThierry Reding2020-12-171-5/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit d3817a647059 ("pwm: sun4i: Remove redundant needs_delay") changed the logic of an else branch so that the PWM_EN and PWM_CLK_GATING bits are now cleared if the PWM is to be disabled, whereas previously the condition was always false, and hence the branch never got executed. This code is reported causing backlight issues on boards based on the Allwinner A20 SoC. Fix this by removing the else branch, which restores the behaviour prior to the offending commit. Note that the PWM_EN and PWM_CLK_GATING bits still get cleared later in sun4i_pwm_apply() if the PWM is to be disabled. Fixes: d3817a647059 ("pwm: sun4i: Remove redundant needs_delay") Reported-by: Taras Galchenko <tpgalchenko@gmail.com> Suggested-by: Taras Galchenko <tpgalchenko@gmail.com> Tested-by: Taras Galchenko <tpgalchenko@gmail.com> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: sl28cpld: Set driver data before registering the PWM chipThierry Reding2020-12-171-2/+2
| | | | | | | | | | | | | | | | | | | | It is good practice to set the driver data before registering a device with a subsystem because the subsystem or the driver core may call back into the driver implementation. This is not currently an issue, but to prevent future changes from causing this to break unexpectedly, make sure that the driver data is set before the PWM chip registration. Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: imx27: Fix overflow for bigger periodsUwe Kleine-König2020-12-171-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The second parameter of do_div is an u32 and NSEC_PER_SEC * prescale overflows this for bigger periods. Assuming the usual pwm input clk rate of 66 MHz this happens starting at requested period > 606060 ns. Splitting the division into two operations doesn't loose any precision. It doesn't need to be feared that c / NSEC_PER_SEC doesn't fit into the unsigned long variable "duty_cycles" because in this case the assignment above to period_cycles would already have been overflowing as period >= duty_cycle and then the calculation is moot anyhow. Fixes: aef1a3799b5c ("pwm: imx27: Fix rounding behavior") Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org> Tested-by: Johannes Pointner <johannes.pointner@br-automation.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: bcm2835: Support apply function for atomic configurationLino Sanfilippo2020-12-171-45/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the newer .apply function of pwm_ops instead of .config, .enable, .disable and .set_polarity. This guarantees atomic changes of the pwm controller configuration. It also reduces the size of the driver. Since now period is a 64 bit value, add an extra check to reject periods that exceed the possible max value for the 32 bit register. This has been tested on a Raspberry PI 4. Signed-off-by: Lino Sanfilippo <LinoSanfilippo@gmx.de> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: keembay: Fix build failure with -OsUwe Kleine-König2020-12-171-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The driver used this construct: #define KMB_PWM_LEADIN_MASK GENMASK(30, 0) static inline void keembay_pwm_update_bits(struct keembay_pwm *priv, u32 mask, u32 val, u32 offset) { u32 buff = readl(priv->base + offset); buff = u32_replace_bits(buff, val, mask); writel(buff, priv->base + offset); } ... keembay_pwm_update_bits(priv, KMB_PWM_LEADIN_MASK, 0, KMB_PWM_LEADIN_OFFSET(pwm->hwpwm)); With CONFIG_CC_OPTIMIZE_FOR_SIZE the compiler (here: gcc 10.2.0) this triggers: In file included from /home/uwe/gsrc/linux/drivers/pwm/pwm-keembay.c:16: In function ‘field_multiplier’, inlined from ‘keembay_pwm_update_bits’ at /home/uwe/gsrc/linux/include/linux/bitfield.h:124:17: /home/uwe/gsrc/linux/include/linux/bitfield.h:119:3: error: call to ‘__bad_mask’ declared with attribute error: bad bitfield mask 119 | __bad_mask(); | ^~~~~~~~~~~~ In function ‘field_multiplier’, inlined from ‘keembay_pwm_update_bits’ at /home/uwe/gsrc/linux/include/linux/bitfield.h:154:1: /home/uwe/gsrc/linux/include/linux/bitfield.h:119:3: error: call to ‘__bad_mask’ declared with attribute error: bad bitfield mask 119 | __bad_mask(); | ^~~~~~~~~~~~ The compiler doesn't seem to be able to notice that with field being 0x3ffffff the expression if ((field | (field - 1)) & ((field | (field - 1)) + 1)) __bad_mask(); can be optimized away. So use __always_inline and document the problem in a comment to fix this. Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Tested-by: Vijayakannan Ayyathurai <vijayakannan.ayyathurai@intel.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: core: Use octal permissionSoham Biswas2020-12-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Permission bits are easier readable in octal than with using the symbolic names. Fixes the following warning generated by checkpatch: WARNING: Symbolic permissions 'S_IRUGO' are not preferred. Consider using octal permissions '0444'. #1341: FILE: drivers/pwm/core.c:1341: + debugfs_create_file("pwm", S_IFREG | S_IRUGO, NULL, NULL, Signed-off-by: Soham Biswas <sohambiswas41@gmail.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: lpss: Make compilable with COMPILE_TESTUwe Kleine-König2020-12-171-3/+3
| | | | | | | | | | | | | | | | All used ACPI functions have dummy implementations, and there is no hard dependency on x86. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: Fix dependencies on HAS_IOMEMUwe Kleine-König2020-12-171-7/+28
| | | | | | | | | | | | | | | | Drivers making use of IO remapping must depend on HAS_IOMEM. Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: Use -EINVAL for unsupported polarityThierry Reding2020-12-173-3/+3
| | | | | | | | | | | | | | | | | | | | Instead of using a mix of -EOPNOTSUPP and -ENOTSUPP, use the more standard -EINVAL to signal that the specified polarity value was invalid. Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: sti: Remove unnecessary blank lineThierry Reding2020-12-171-1/+0
| | | | | | | | | | | | | | | | A single blank line is enough to separate logical code blocks. Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: sti: Avoid conditional gotosThierry Reding2020-12-171-26/+22
| | | | | | | | | | | | | | | | | | | | Using gotos for conditional code complicates this code significantly. Convert the code to simple conditional blocks to increase readability. Suggested-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: Add PWM fan controller driver for LGM SoCRahul Tanwar2020-12-173-0/+256
| | | | | | | | | | | | | | | | | | | | | | | | Intel Lightning Mountain(LGM) SoC contains a PWM fan controller. This PWM controller does not have any other consumer, it is a dedicated PWM controller for fan attached to the system. Add driver for this PWM fan controller. Signed-off-by: Rahul Tanwar <rahul.tanwar@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: Add DesignWare PWM Controller DriverJarkko Nikula2020-12-173-0/+329
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce driver for Synopsys DesignWare PWM Controller used on Intel Elkhart Lake. Initial implementation is done by Felipe Balbi while he was working at Intel with later changes from Raymond Tan and me. Co-developed-by: Felipe Balbi (Intel) <balbi@kernel.org> Signed-off-by: Felipe Balbi (Intel) <balbi@kernel.org> Co-developed-by: Raymond Tan <raymond.tan@intel.com> Signed-off-by: Raymond Tan <raymond.tan@intel.com> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: mediatek: Add MT8183 SoC supportFabien Parent2020-12-171-0/+7
| | | | | | | | | | | | | | | | Add PWM support for the MT8183 SoC. Signed-off-by: Fabien Parent <fparent@baylibre.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: mediatek: Always use bus clockFabien Parent2020-12-171-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MediaTek PWM IP can sometimes use the 26 MHz source clock to generate the PWM signal, but the driver currently assumes that we always use the PWM bus clock to generate the PWM signal. This commit modifies the PWM driver in order to force the PWM IP to always use the bus clock as source clock. I do not have the datasheet of all the MediaTek SoC, so I don't know if the register to choose the source clock is present in all the SoCs or only in subset. As a consequence I made this change optional by using a platform data paremeter to says whether this register is supported or not. On all the SoCs I don't have the datasheet (MT2712, MT7622, MT7623, MT7628, MT7629) I kept the behavior to be the same as before this change. Signed-off-by: Fabien Parent <fparent@baylibre.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: Add PWM driver for Intel Keem BayVijayakannan Ayyathurai2020-12-173-0/+250
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The Intel Keem Bay SoC requires PWM support. Add the pwm-keembay driver to enable this. Signed-off-by: Lai, Poey Seng <poey.seng.lai@intel.com> Co-developed-by: Vineetha G. Jaya Kumaran <vineetha.g.jaya.kumaran@intel.com> Signed-off-by: Vineetha G. Jaya Kumaran <vineetha.g.jaya.kumaran@intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Co-developed-by: Vijayakannan Ayyathurai <vijayakannan.ayyathurai@intel.com> Signed-off-by: Vijayakannan Ayyathurai <vijayakannan.ayyathurai@intel.com> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: lp3943: Dynamically allocate PWM chip baseLokesh Vutla2020-12-171-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When there are other PWM controllers enabled along with pwm-lp3943, pwm-lp3942 is failing to probe with -EEXIST error. This is because other PWM controllers are probed first and assigned PWM base 0 and pwm-lp3943 is requesting for 0 again. In order to avoid this, assign the chip base with -1, so that it is dynamically allocated. Fixes: af66b3c0934e ("pwm: Add LP3943 PWM driver") Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Uwe Kleine-König <u.kleine-könig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: atmel-tcb: Add sama5d2 supportAlexandre Belloni2020-12-171-3/+20
| | | | | | | | | | | | | | | | | | | | | | | | Add sama5d2 support. The sama5d2 has a new clock input, its gclk. Index 0 of the clock selector is the gclk instead of the peripheral clock divided by 2. For now, the gclk is not used because the peripheral clock divided by 8 already gives a 9.6ns resolution which is enough for most use cases. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: atmel-tcb: Switch to new bindingAlexandre Belloni2020-12-172-107/+137
| | | | | | | | | | | | | | | | | | | | | | | | The PWM is now a subnode of the used TCB. This is cleaner and it mainly allows to stop wasting TCB channels when only 2 or 4 PWMs are used. This also removes the atmel_tclib dependency Cc: Thierry Reding <thierry.reding@gmail.com> Cc: linux-pwm@vger.kernel.org Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: tiehrpwm: Handle deferred probe with dev_err_probe()Grygorii Strashko2020-12-171-8/+4
| | | | | | | | | | | | | | | | | | | | | | | | The devm_clk_get() may return -EPROBE_DEFER which is not handled properly by TI EHRPWM driver and causes unnecessary boot log messages. Hence, add proper deferred probe handling with new dev_err_probe() API. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: lpss: Set DPM_FLAG_SMART_SUSPEND on Cherry Trail devicesHans de Goede2020-12-171-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As the comment above the code setting the DPM_FLAG_NO_DIRECT_COMPLETE flag explains: /* * On Cherry Trail devices the GFX0._PS0 AML checks if the controller * is on and if it is not on it turns it on and restores what it * believes is the correct state to the PWM controller. * Because of this we must disallow direct-complete, which keeps the * controller (runtime)suspended, on resume to avoid 2 issues: * 1. The controller getting turned on without the linux-pm code * knowing about this. On devices where the controller is unused * this causes it to stay on during the next suspend causing high * battery drain (because S0i3 is not reached) * 2. The state restoring code unexpectedly messing with the controller */ The pm-core must not skip resume to avoid the GFX0._PS0 AML code messing with the PWM controller behind our back. But leaving the controller runtime-suspended (skipping runtime-resume + normal-suspend) during suspend is fine. Set the DPM_FLAG_SMART_SUSPEND flag to allow this. Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: lpss: Use DPM_FLAG_NO_DIRECT_COMPLETE instead of declaring a prepare ↵Hans de Goede2020-12-171-20/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | handler ACPI LPSS devices use direct-complete style suspend/resume handling by default. We set the DPM_FLAG_SMART_PREPARE and define a prepare handler to disable this on Cherry Trail devices. Clean this up a bit by setting the DPM_FLAG_NO_DIRECT_COMPLETE flag for Cherry Trail devices, instead of defining a prepare handler. While at it also improve the comment explaining why this is necessary. Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: lpss: Log error from pwm_lpss_is_updating() if the update bit is still setHans de Goede2020-12-171-1/+6
| | | | | | | | | | | | | | | | | | | | | | pwm_lpss_is_updating() does a sanity check which should never fail. If the check does actually fail that is worth logging an error, especially since this means that we will skip making the requested changes to the PWM settings. Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: ab8500: Explicitly allocate pwm chip base dynamicallyUwe Kleine-König2020-12-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | The ab8500 driver is the last one which doesn't (explicitly) use dynamic allocation of the pwm id. Looking through the kernel sources I didn't find a place that relies on this id. And with the device probed from device tree pdev->id is -1 anyhow; making this explicit looks beneficial, too. Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: zx: Add missing cleanup in error pathUwe Kleine-König2020-12-171-0/+1
| | | | | | | | | | | | | | | | | | | | zx_pwm_probe() called clk_prepare_enable() before; this must be undone in the error path. Fixes: 4836193c435c ("pwm: Add ZTE ZX PWM device driver") Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: ab8500: Add error message if pwmchip_add() failsUwe Kleine-König2020-12-171-1/+1
| | | | | | | | | | | | | | | | pwmchip_add() doesn't emit an error message, so add one in the driver. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: imx1: Use dev_err_probe() to simplify error handlingAnson Huang2020-12-171-15/+6
| | | | | | | | | | | | | | | | | | | | dev_err_probe() can reduce code size, uniform error handling and record the defer probe reason etc., use it to simplify the code. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: imx27: Use dev_err_probe() to simplify error handlingAnson Huang2020-12-171-19/+6
| | | | | | | | | | | | | | | | | | | | dev_err_probe() can reduce code size, uniform error handling and record the defer probe reason etc., use it to simplify the code. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: imx-tpm: Use dev_err_probe() to simplify error handlingAnson Huang2020-12-171-7/+3
| | | | | | | | | | | | | | | | | | | | dev_err_probe() can reduce code size, uniform error handling and record the defer probe reason etc., use it to simplify the code. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: atmel: Convert to devm_platform_ioremap_resource()Yangtao Li2020-12-171-3/+1
| | | | | | | | | | | | | | | | | | Use devm_platform_ioremap_resource() to simplify code. Signed-off-by: Yangtao Li <tiny.windzz@gmail.com> Acked-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: sifive: Convert to devm_platform_ioremap_resource()Yangtao Li2020-12-171-3/+1
| | | | | | | | | | | | | | | | Use devm_platform_ioremap_resource() to simplify code. Signed-off-by: Yangtao Li <tiny.windzz@gmail.com> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: hibvt: Convert to devm_platform_ioremap_resource()Yangtao Li2020-12-171-5/+2
| | | | | | | | | | | | | | | | | | | | | | Use devm_platform_ioremap_resource() to simplify code. While at it, also declare the "i" and "ret" variables on the same line since they are of the same type. Signed-off-by: Yangtao Li <tiny.windzz@gmail.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: lpc18xx-sct: Convert to devm_platform_ioremap_resource()Yangtao Li2020-12-171-3/+1
| | | | | | | | | | | | | | | | Use devm_platform_ioremap_resource() to simplify code. Signed-off-by: Yangtao Li <tiny.windzz@gmail.com> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: img: Convert to devm_platform_ioremap_resource()Yangtao Li2020-12-171-3/+1
| | | | | | | | | | | | | | | | Use devm_platform_ioremap_resource() to simplify code. Signed-off-by: Yangtao Li <tiny.windzz@gmail.com> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: clps711x: Convert to devm_platform_ioremap_resource()Yangtao Li2020-12-171-3/+1
| | | | | | | | | | | | | | | | Use devm_platform_ioremap_resource() to simplify code. Signed-off-by: Yangtao Li <tiny.windzz@gmail.com> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: mtk-disp: Convert to devm_platform_ioremap_resource()Yangtao Li2020-12-171-3/+1
| | | | | | | | | | | | | | | | Use devm_platform_ioremap_resource() to simplify code. Signed-off-by: Yangtao Li <tiny.windzz@gmail.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: brcmstb: Convert to devm_platform_ioremap_resource()Yangtao Li2020-12-171-3/+1
| | | | | | | | | | | | | | | | | | Use devm_platform_ioremap_resource() to simplify code. Signed-off-by: Yangtao Li <tiny.windzz@gmail.com> Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: vt8500: Convert to devm_platform_ioremap_resource()Yangtao Li2020-12-171-3/+1
| | | | | | | | | | | | | | | | Use devm_platform_ioremap_resource() to simplify code. Signed-off-by: Yangtao Li <tiny.windzz@gmail.com> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * pwm: berlin: Convert to devm_platform_ioremap_resource()Yangtao Li2020-12-171-3/+1
| | | | | | | | | | | | | | | | Use devm_platform_ioremap_resource() to simplify code. Signed-off-by: Yangtao Li <tiny.windzz@gmail.com> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
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