summaryrefslogtreecommitdiffstats
path: root/drivers/soc/bcm
Commit message (Collapse)AuthorAgeFilesLines
* Merge tag 'arm-drivers-5.14' of ↵Linus Torvalds2021-07-101-5/+0
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM driver updates from Olof Johansson: - Reset controllers: Adding support for Microchip Sparx5 Switch. - Memory controllers: ARM Primecell PL35x SMC memory controller driver cleanups and improvements. - i.MX SoC drivers: Power domain support for i.MX8MM and i.MX8MN. - Rockchip: RK3568 power domains support + DT binding updates, cleanups. - Qualcomm SoC drivers: Amend socinfo with more SoC/PMIC details, including support for MSM8226, MDM9607, SM6125 and SC8180X. - ARM FFA driver: "Firmware Framework for ARMv8-A", defining management interfaces and communication (including bus model) between partitions both in Normal and Secure Worlds. - Tegra Memory controller changes, including major rework to deal with identity mappings at boot and integration with ARM SMMU pieces. * tag 'arm-drivers-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (120 commits) firmware: turris-mox-rwtm: add marvell,armada-3700-rwtm-firmware compatible string firmware: turris-mox-rwtm: show message about HWRNG registration firmware: turris-mox-rwtm: fail probing when firmware does not support hwrng firmware: turris-mox-rwtm: report failures better firmware: turris-mox-rwtm: fix reply status decoding function soc: imx: gpcv2: add support for i.MX8MN power domains dt-bindings: add defines for i.MX8MN power domains firmware: tegra: bpmp: Fix Tegra234-only builds iommu/arm-smmu: Use Tegra implementation on Tegra186 iommu/arm-smmu: tegra: Implement SID override programming iommu/arm-smmu: tegra: Detect number of instances at runtime dt-bindings: arm-smmu: Add Tegra186 compatible string firmware: qcom_scm: Add MDM9607 compatible soc: qcom: rpmpd: Add MDM9607 RPM Power Domains soc: renesas: Add support to read LSI DEVID register of RZ/G2{L,LC} SoC's soc: renesas: Add ARCH_R9A07G044 for the new RZ/G2L SoC's dt-bindings: soc: rockchip: drop unnecessary #phy-cells from grf.yaml memory: emif: remove unused frequency and voltage notifiers memory: fsl_ifc: fix leak of private memory on probe failure memory: fsl_ifc: fix leak of IO mapping on probe failure ...
| * soc: bcm: brcmstb: remove unused variable 'brcmstb_machine_match'Jiapeng Chong2021-05-101-5/+0
| | | | | | | | | | | | | | | | | | | | | | Fix the following clang warning: drivers/soc/bcm/brcmstb/common.c:17:34: warning: unused variable 'brcmstb_machine_match' [-Wunused-const-variable]. Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* | kernel.h: split out panic and oops helpersAndy Shevchenko2021-07-011-0/+1
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | kernel.h is being used as a dump for all kinds of stuff for a long time. Here is the attempt to start cleaning it up by splitting out panic and oops helpers. There are several purposes of doing this: - dropping dependency in bug.h - dropping a loop by moving out panic_notifier.h - unload kernel.h from something which has its own domain At the same time convert users tree-wide to use new headers, although for the time being include new header back to kernel.h to avoid twisted indirected includes for existing users. [akpm@linux-foundation.org: thread_info.h needs limits.h] [andriy.shevchenko@linux.intel.com: ia64 fix] Link: https://lkml.kernel.org/r/20210520130557.55277-1-andriy.shevchenko@linux.intel.com Link: https://lkml.kernel.org/r/20210511074137.33666-1-andriy.shevchenko@linux.intel.com Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Co-developed-by: Andrew Morton <akpm@linux-foundation.org> Acked-by: Mike Rapoport <rppt@linux.ibm.com> Acked-by: Corey Minyard <cminyard@mvista.com> Acked-by: Christian Brauner <christian.brauner@ubuntu.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Kees Cook <keescook@chromium.org> Acked-by: Wei Liu <wei.liu@kernel.org> Acked-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Acked-by: Sebastian Reichel <sre@kernel.org> Acked-by: Luis Chamberlain <mcgrof@kernel.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Acked-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Acked-by: Helge Deller <deller@gmx.de> # parisc Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge tag 'arm-soc/for-5.13/drivers' of https://github.com/Broadcom/stblinux ↵Arnd Bergmann2021-04-011-0/+30
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into arm/drivers This pull request contains Broadcom ARM/ARM64/MIPS based SoCs drivers changes for 5.13, please pull the following: - Rafal updates the Broadcom PMB binding to support BCM63138 and updates the code to support resetting the 63138 SATA controller * tag 'arm-soc/for-5.13/drivers' of https://github.com/Broadcom/stblinux: soc: bcm: bcm-pmb: add BCM63138 SATA support dt-bindings: power: bcm-pmb: add BCM63138 binding Link: https://lore.kernel.org/r/20210330184006.1451315-3-f.fainelli@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * soc: bcm: bcm-pmb: add BCM63138 SATA supportRafał Miłecki2021-03-251-0/+30
| | | | | | | | | | | | | | BCM63138 has SATA controller that needs to be powered up using PMB. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* | soc: bcm: raspberrypi-power: Release firmware handle on unbindNicolas Saenz Julienne2021-03-221-1/+1
|/ | | | | | | | Use devm_rpi_firmware_get() so as to make sure we release RPi's firmware interface when unbinding the device. Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
* soc: bcm: brcmstb: Remove soc_is_brcmstb()Florian Fainelli2021-01-271-17/+0
| | | | | | | We have no in tree or out of tree users of this function, remove it and the header providing its prototype. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* soc: bcm: add PM driver for Broadcom's PMBRafał Miłecki2021-01-124-1/+344
| | | | | | | | | | PMB originally comes from BCM63138 but can be also found on many other chipsets (e.g. BCM4908). It's needed to power on and off SoC blocks like PCIe, SATA, USB. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* soc: bcm: brcmstb: pm: pm-arm: Provide prototype for brcmstb_pm_s3_finish()Lee Jones2020-11-031-0/+2
| | | | | | | | | | | | | | brcmstb_pm_s3_finish() cannot be made static because it is referenced from brcmstb_pm_s3(), so let's provide a prototype for it instead. Fixes the following W=1 kernel build warning(s): drivers/soc/bcm/brcmstb/pm/pm-arm.c:395:14: warning: no previous prototype for ‘brcmstb_pm_s3_finish’ [-Wmissing-prototypes] Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: bcm-kernel-feedback-list@broadcom.com Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* soc: bcm: brcmstb: biuctrl: Change RAC data line prefetching after 4 ↵Florian Fainelli2020-09-061-2/+6
| | | | | | | | | | | consecutive lines Change the RACPREFDATA(x) setting to prefetch the next 256-byte line after 4 consecutive lines have been used, instead of after 2 consecutive lines. This does improve the synthetic memcpy benchmark by an additional +0.5% on top of the previous change for Cortex-A72 CPUs. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* soc: bcm: brcmstb: biuctrl: Change RAC prefetch distance from +/-1 to +/- 2Florian Fainelli2020-09-041-4/+16
| | | | | | | | Change the RAC prefetch distance from +/- 1 to +/- 2 for Cortex-A72 CPUs since this provides an average of a 3.8% performance increase for synthetic memcpy benchmarks. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* soc: bcm: brcmstb: biuctrl: Tune MCP settings for 72165Florian Fainelli2020-09-041-0/+1
| | | | | | | 72165 uses a Brahma-B53 CPU and its Bus Interface Unit, tune it according to the existing values we have. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* soc: bcm: brcmstb: biuctrl: Tune MCP settings for 72164Florian Fainelli2020-09-041-0/+1
| | | | | | | 72164 uses a Brahma-B53 CPU and its Bus Interface Unit, tune it according to the existing values we have. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* soc: bcm: add BCM63xx power domain driverÁlvaro Fernández Rojas2020-08-175-0/+403
| | | | | | | | | BCM6318, BCM6328, BCM6362 and BCM63268 SoCs have a power domain controller to enable/disable certain components in order to save power. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Florian Fainelli <F.fainelli@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* soc: bcm: brcmstb: biuctrl: Enable Read-ahead cacheFlorian Fainelli2020-08-171-10/+77
| | | | | | | | | | | | | | | | | Brahma-B53 and Cortex-A72 CPUs integrated on Broadcom STB SoCs feature a read-ahead cache that performs cache line size adaptation between the bus interface unit and the memory controller. On 32-bit ARM kernels we have to resort to a full featured read-ahead cache driver under arch/arm/mm/cache-b15-rac.c (CONFIG_CACHE_B15_RAC) because there are still cache maintenance operations by set/ways/index that cannot be transparently handled by the ARM Coherency Extension that the read-ahead cache interfaces to. The 64-bit ARM kernel however has long deprecated all of those, so this is simply a one time configuration. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* soc: bcm: brcmstb: biuctrl: Update programming for 7211Florian Fainelli2020-01-051-6/+7
| | | | | | | | | | Add a matching entry for 7211 which can be programmed with the same BIUCTRL settings as other Brahma-B53 based SoCs. While at it, rename the function to include a72 in the name to reflect this applies to both types of 64-bit capable CPUs that we support (Brahma-B53 and Cortex-A72). Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* soc: bcm: brcmstb: biuctrl: Update layout for A72 on 7211Florian Fainelli2020-01-051-0/+8
| | | | | | | | The BIUCTRL layout is a little different on 7211 which is equipped with a Cortex-A72, account for those register offset differences. We will match 7211 specifically in a subsequent commit. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* soc: bcm: brcmstb: biuctrl: Tune interface for 7255 and 7216Florian Fainelli2020-01-051-0/+2
| | | | | | | | 7255 and 7216 are some of the latest chips that were produced and support the full register range configuration for the BIU, add the two entries to get the expected programming. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* soc: bcm: brcmstb: biuctrl: Tune 7260 BIU interfaceFlorian Fainelli2020-01-051-2/+5
| | | | | | | | | 7260A0 and B0 are both supported, and 7260A0 has a small difference in that it does not support the write-back control register, which is why we have a different array of registers. Update the comment above b53_cpubiuctrl_no_wb_regs to denote that difference. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* Merge tag 'arm-soc/for-5.2/drivers-fixes' of ↵Olof Johansson2019-06-161-2/+4
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://github.com/Broadcom/stblinux into fixes This pull request contains Broadcom ARM/ARM64/MIPS SoCs device drivers fixes for 5.2-rc1, please pull the following: - Florian fixes the biuctrl driver not to create an error condition/path upon unsupported CPU and also fixes the biuctrl driver writes to used a data barrier which is necessary given the HW block design * tag 'arm-soc/for-5.2/drivers-fixes' of https://github.com/Broadcom/stblinux: soc: bcm: brcmstb: biuctrl: Register writes require a barrier soc: brcmstb: Fix error path for unsupported CPUs Signed-off-by: Olof Johansson <olof@lixom.net>
| * soc: bcm: brcmstb: biuctrl: Register writes require a barrierFlorian Fainelli2019-05-201-1/+1
| | | | | | | | | | | | | | | | | | | | The BIUCTRL register writes require that a data barrier be inserted after comitting the write to the register for the block to latch in the recently written values. Reads have no such requirement and are not changed. Fixes: 34642650e5bc ("soc: Move brcmstb to bcm/brcmstb") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
| * soc: brcmstb: Fix error path for unsupported CPUsFlorian Fainelli2019-05-201-1/+3
| | | | | | | | | | | | | | | | | | | | | | In case setup_hifcpubiuctrl_regs() returns an error, because of e.g: an unsupported CPU type, just catch that error and return instead of blindly continuing with the initialization. This fixes a NULL pointer de-reference with the code continuing without having a proper array of registers to use. Fixes: 22f7a9116eba ("soc: brcmstb: Correct CPU_CREDIT_REG offset for Brahma-B53 CPUs") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174Thomas Gleixner2019-05-309-81/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 655 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Richard Fontana <rfontana@redhat.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070034.575739538@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* | treewide: Add SPDX license identifier - Makefile/KconfigThomas Gleixner2019-05-215-0/+5
|/ | | | | | | | | | | | | | Add SPDX license identifiers to all Make/Kconfig files which: - Have no license information of any form These files fall under the project license, GPL v2 only. The resulting SPDX license identifier is: GPL-2.0-only Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* Merge tag 'tags/bcm2835-drivers-next-2019-03-12' into soc/fixesFlorian Fainelli2019-03-181-7/+42
|\ | | | | | | | | | | | | This pull request brings in a build fix for arm64 with bcm2835 enabled, and fixes the driver in the presence of -EPROBE_DEFER. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
| * soc: bcm: bcm2835-pm: Fix error paths of initialization.Eric Anholt2019-03-041-5/+30
| | | | | | | | | | | | | | | | | | | | | | | | The clock driver may probe after ours and so we need to pass the -EPROBE_DEFER out. Fix the other error path while we're here. v2: Use dom->name instead of dom->gov as the flag for initialized domains, since we aren't setting up a governor. Make sure to clear ->clk when no clk is present in the DT. Signed-off-by: Eric Anholt <eric@anholt.net> Fixes: 670c672608a1 ("soc: bcm: bcm2835-pm: Add support for power domains under a new binding.")
| * soc: bcm: bcm2835-pm: Fix PM_IMAGE_PERI power domain support.Eric Anholt2019-03-041-2/+12
| | | | | | | | | | | | | | | | We don't have ASB master/slave regs for this domain, so just skip that step. Signed-off-by: Eric Anholt <eric@anholt.net> Fixes: 670c672608a1 ("soc: bcm: bcm2835-pm: Add support for power domains under a new binding.")
* | soc: bcm: bcm2835-pm: Make local symbol staticWei Yongjun2019-01-311-1/+1
|/ | | | | | | | | | | | Fixes the following sparse warning: drivers/soc/bcm/bcm2835-power.c:556:32: warning: symbol 'bcm2835_reset_ops' was not declared. Should it be static? Fixes: 670c672608a1 ("soc: bcm: bcm2835-pm: Add support for power domains under a new binding.") Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Acked-by: Scott Branden <scott.branden@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* soc: bcm: Make PM driver default for BCM2835Stefan Wahren2019-01-241-0/+1
| | | | | | | | | | | Since commit 52a4adbaebcc ("ARM: bcm283x: Switch V3D over to using the PM driver instead of firmware.") VC4 on BCM2835 requires the power driver. Otherwise the driver won't probe and HDMI output stays black: vc4_v3d 20c00000.v3d: ignoring dependency for device, assuming no driver Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Reviewed-by: Eric Anholt <eric@anholt.net>
* soc: bcm: bcm2835-pm: Add support for power domains under a new binding.Eric Anholt2019-01-093-0/+673
| | | | | | | | | | | | This provides a free software alternative to raspberrypi-power.c's firmware calls to manage power domains. It also exposes a reset line, where previously the vc4 driver had to try to force power off the domain in order to trigger a reset. Signed-off-by: Eric Anholt <eric@anholt.net> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
* soc: bcm: brcmstb: Don't leak device tree node referenceYangtao Li2018-11-281-1/+5
| | | | | | | | | | | | of_find_node_by_path() acquires a reference to the node returned by it and that reference needs to be dropped by its caller. soc_is_brcmstb() doesn't do that, so fix it. [treding: slightly rewrite to avoid inline comparison] Fixes: d52fad262041 ("soc: add stubs for brcmstb SoC's") Signed-off-by: Yangtao Li <tiny.windzz@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* Merge tag 'tags/bcm2835-drivers-next-2018-11-27' into drivers/nextFlorian Fainelli2018-11-271-4/+1
|\ | | | | | | | | | | | | | | | | This pull request adds SPDX to BCM2835 drivers, and fixes some bugs in the firmware driver (silently hanging if the VPU doesn't respond to a mailbox transaction, and undersized buffers in the firmware property transactions for tags that aren't used yet in the upstream). Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
| * soc: bcm: Switch raspberrypi-power to SPDX identifierStefan Wahren2018-11-141-4/+1
| | | | | | | | | | | | | | | | | | | | Adopt the SPDX license identifier headers to ease license compliance management. Cc: Alexander Aring <aring@mojatatu.com> Cc: Eric Anholt <eric@anholt.net> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Reviewed-by: Eric Anholt <eric@anholt.net>
* | soc: bcm: brcmstb: Fix re-entry point with a THUMB2_KERNELFlorian Fainelli2018-11-051-1/+1
|/ | | | | | | | | | | When the kernel is built with CONFIG_THUMB2_KERNEL we would set the kernel's resume entry point to be a function that is already built as Thumb-2 code while the boot agent doing the resume is in ARM mode, so this does not work. There is a header label defined: cpu_resume_arm which we can use to do the switching for us. Fixes: 0b741b8234c8 ("soc: bcm: brcmstb: Add support for S2/S3/S5 suspend states (ARM)") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* soc: bcm: brcmstb: Add missing DDR MEMC compatible stringsFlorian Fainelli2018-06-261-0/+12
| | | | | | | | | | | | | | | | | | | | We would not be matching the following chip/compatible strings combinations, which would lead to not setting the warm boot flag correctly, fix that: 7260A0/B0: brcm,brcmstb-memc-ddr-rev-b.2.1 7255A0: brcm,brcmstb-memc-ddr-rev-b.2.3 7278Bx: brcm,brcmstb-memc-ddr-rev-b.3.1 The B2.1 core (which is in 7260 A0 and B0) doesn't have the SHIMPHY_ADDR_CNTL_0_DDR_PAD_CNTRL setup in the memsys init code, nor does it have the warm boot flag re-definition on entry. Those changes were for B2.2 and later MEMSYS cores. Fall back to the previous S2/S3 entry method for these specific chips. Fixes: 0b741b8234c8 ("soc: bcm: brcmstb: Add support for S2/S3/S5 suspend states (ARM)") Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* soc: bcm: brcmstb: pm: Add support for newer rev B3.0 controllersDoug Berger2018-06-261-0/+4
| | | | | | | | | | | Update the Device Tree binding document and add a matching entry for the MEMC DDR controller revision B3.0 which is found on chips like 7278A0 and newer. Signed-off-by: Doug Berger <opendmb@gmail.com> [florian: tweak commit message, make it apply to upstream kernel] Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* treewide: devm_kzalloc() -> devm_kcalloc()Kees Cook2018-06-121-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The devm_kzalloc() function has a 2-factor argument form, devm_kcalloc(). This patch replaces cases of: devm_kzalloc(handle, a * b, gfp) with: devm_kcalloc(handle, a * b, gfp) as well as handling cases of: devm_kzalloc(handle, a * b * c, gfp) with: devm_kzalloc(handle, array3_size(a, b, c), gfp) as it's slightly less ugly than: devm_kcalloc(handle, array_size(a, b), c, gfp) This does, however, attempt to ignore constant size factors like: devm_kzalloc(handle, 4 * 1024, gfp) though any constants defined via macros get caught up in the conversion. Any factors with a sizeof() of "unsigned char", "char", and "u8" were dropped, since they're redundant. Some manual whitespace fixes were needed in this patch, as Coccinelle really liked to write "=devm_kcalloc..." instead of "= devm_kcalloc...". The Coccinelle script used for this was: // Fix redundant parens around sizeof(). @@ expression HANDLE; type TYPE; expression THING, E; @@ ( devm_kzalloc(HANDLE, - (sizeof(TYPE)) * E + sizeof(TYPE) * E , ...) | devm_kzalloc(HANDLE, - (sizeof(THING)) * E + sizeof(THING) * E , ...) ) // Drop single-byte sizes and redundant parens. @@ expression HANDLE; expression COUNT; typedef u8; typedef __u8; @@ ( devm_kzalloc(HANDLE, - sizeof(u8) * (COUNT) + COUNT , ...) | devm_kzalloc(HANDLE, - sizeof(__u8) * (COUNT) + COUNT , ...) | devm_kzalloc(HANDLE, - sizeof(char) * (COUNT) + COUNT , ...) | devm_kzalloc(HANDLE, - sizeof(unsigned char) * (COUNT) + COUNT , ...) | devm_kzalloc(HANDLE, - sizeof(u8) * COUNT + COUNT , ...) | devm_kzalloc(HANDLE, - sizeof(__u8) * COUNT + COUNT , ...) | devm_kzalloc(HANDLE, - sizeof(char) * COUNT + COUNT , ...) | devm_kzalloc(HANDLE, - sizeof(unsigned char) * COUNT + COUNT , ...) ) // 2-factor product with sizeof(type/expression) and identifier or constant. @@ expression HANDLE; type TYPE; expression THING; identifier COUNT_ID; constant COUNT_CONST; @@ ( - devm_kzalloc + devm_kcalloc (HANDLE, - sizeof(TYPE) * (COUNT_ID) + COUNT_ID, sizeof(TYPE) , ...) | - devm_kzalloc + devm_kcalloc (HANDLE, - sizeof(TYPE) * COUNT_ID + COUNT_ID, sizeof(TYPE) , ...) | - devm_kzalloc + devm_kcalloc (HANDLE, - sizeof(TYPE) * (COUNT_CONST) + COUNT_CONST, sizeof(TYPE) , ...) | - devm_kzalloc + devm_kcalloc (HANDLE, - sizeof(TYPE) * COUNT_CONST + COUNT_CONST, sizeof(TYPE) , ...) | - devm_kzalloc + devm_kcalloc (HANDLE, - sizeof(THING) * (COUNT_ID) + COUNT_ID, sizeof(THING) , ...) | - devm_kzalloc + devm_kcalloc (HANDLE, - sizeof(THING) * COUNT_ID + COUNT_ID, sizeof(THING) , ...) | - devm_kzalloc + devm_kcalloc (HANDLE, - sizeof(THING) * (COUNT_CONST) + COUNT_CONST, sizeof(THING) , ...) | - devm_kzalloc + devm_kcalloc (HANDLE, - sizeof(THING) * COUNT_CONST + COUNT_CONST, sizeof(THING) , ...) ) // 2-factor product, only identifiers. @@ expression HANDLE; identifier SIZE, COUNT; @@ - devm_kzalloc + devm_kcalloc (HANDLE, - SIZE * COUNT + COUNT, SIZE , ...) // 3-factor product with 1 sizeof(type) or sizeof(expression), with // redundant parens removed. @@ expression HANDLE; expression THING; identifier STRIDE, COUNT; type TYPE; @@ ( devm_kzalloc(HANDLE, - sizeof(TYPE) * (COUNT) * (STRIDE) + array3_size(COUNT, STRIDE, sizeof(TYPE)) , ...) | devm_kzalloc(HANDLE, - sizeof(TYPE) * (COUNT) * STRIDE + array3_size(COUNT, STRIDE, sizeof(TYPE)) , ...) | devm_kzalloc(HANDLE, - sizeof(TYPE) * COUNT * (STRIDE) + array3_size(COUNT, STRIDE, sizeof(TYPE)) , ...) | devm_kzalloc(HANDLE, - sizeof(TYPE) * COUNT * STRIDE + array3_size(COUNT, STRIDE, sizeof(TYPE)) , ...) | devm_kzalloc(HANDLE, - sizeof(THING) * (COUNT) * (STRIDE) + array3_size(COUNT, STRIDE, sizeof(THING)) , ...) | devm_kzalloc(HANDLE, - sizeof(THING) * (COUNT) * STRIDE + array3_size(COUNT, STRIDE, sizeof(THING)) , ...) | devm_kzalloc(HANDLE, - sizeof(THING) * COUNT * (STRIDE) + array3_size(COUNT, STRIDE, sizeof(THING)) , ...) | devm_kzalloc(HANDLE, - sizeof(THING) * COUNT * STRIDE + array3_size(COUNT, STRIDE, sizeof(THING)) , ...) ) // 3-factor product with 2 sizeof(variable), with redundant parens removed. @@ expression HANDLE; expression THING1, THING2; identifier COUNT; type TYPE1, TYPE2; @@ ( devm_kzalloc(HANDLE, - sizeof(TYPE1) * sizeof(TYPE2) * COUNT + array3_size(COUNT, sizeof(TYPE1), sizeof(TYPE2)) , ...) | devm_kzalloc(HANDLE, - sizeof(TYPE1) * sizeof(THING2) * (COUNT) + array3_size(COUNT, sizeof(TYPE1), sizeof(TYPE2)) , ...) | devm_kzalloc(HANDLE, - sizeof(THING1) * sizeof(THING2) * COUNT + array3_size(COUNT, sizeof(THING1), sizeof(THING2)) , ...) | devm_kzalloc(HANDLE, - sizeof(THING1) * sizeof(THING2) * (COUNT) + array3_size(COUNT, sizeof(THING1), sizeof(THING2)) , ...) | devm_kzalloc(HANDLE, - sizeof(TYPE1) * sizeof(THING2) * COUNT + array3_size(COUNT, sizeof(TYPE1), sizeof(THING2)) , ...) | devm_kzalloc(HANDLE, - sizeof(TYPE1) * sizeof(THING2) * (COUNT) + array3_size(COUNT, sizeof(TYPE1), sizeof(THING2)) , ...) ) // 3-factor product, only identifiers, with redundant parens removed. @@ expression HANDLE; identifier STRIDE, SIZE, COUNT; @@ ( devm_kzalloc(HANDLE, - (COUNT) * STRIDE * SIZE + array3_size(COUNT, STRIDE, SIZE) , ...) | devm_kzalloc(HANDLE, - COUNT * (STRIDE) * SIZE + array3_size(COUNT, STRIDE, SIZE) , ...) | devm_kzalloc(HANDLE, - COUNT * STRIDE * (SIZE) + array3_size(COUNT, STRIDE, SIZE) , ...) | devm_kzalloc(HANDLE, - (COUNT) * (STRIDE) * SIZE + array3_size(COUNT, STRIDE, SIZE) , ...) | devm_kzalloc(HANDLE, - COUNT * (STRIDE) * (SIZE) + array3_size(COUNT, STRIDE, SIZE) , ...) | devm_kzalloc(HANDLE, - (COUNT) * STRIDE * (SIZE) + array3_size(COUNT, STRIDE, SIZE) , ...) | devm_kzalloc(HANDLE, - (COUNT) * (STRIDE) * (SIZE) + array3_size(COUNT, STRIDE, SIZE) , ...) | devm_kzalloc(HANDLE, - COUNT * STRIDE * SIZE + array3_size(COUNT, STRIDE, SIZE) , ...) ) // Any remaining multi-factor products, first at least 3-factor products, // when they're not all constants... @@ expression HANDLE; expression E1, E2, E3; constant C1, C2, C3; @@ ( devm_kzalloc(HANDLE, C1 * C2 * C3, ...) | devm_kzalloc(HANDLE, - (E1) * E2 * E3 + array3_size(E1, E2, E3) , ...) | devm_kzalloc(HANDLE, - (E1) * (E2) * E3 + array3_size(E1, E2, E3) , ...) | devm_kzalloc(HANDLE, - (E1) * (E2) * (E3) + array3_size(E1, E2, E3) , ...) | devm_kzalloc(HANDLE, - E1 * E2 * E3 + array3_size(E1, E2, E3) , ...) ) // And then all remaining 2 factors products when they're not all constants, // keeping sizeof() as the second factor argument. @@ expression HANDLE; expression THING, E1, E2; type TYPE; constant C1, C2, C3; @@ ( devm_kzalloc(HANDLE, sizeof(THING) * C2, ...) | devm_kzalloc(HANDLE, sizeof(TYPE) * C2, ...) | devm_kzalloc(HANDLE, C1 * C2 * C3, ...) | devm_kzalloc(HANDLE, C1 * C2, ...) | - devm_kzalloc + devm_kcalloc (HANDLE, - sizeof(TYPE) * (E2) + E2, sizeof(TYPE) , ...) | - devm_kzalloc + devm_kcalloc (HANDLE, - sizeof(TYPE) * E2 + E2, sizeof(TYPE) , ...) | - devm_kzalloc + devm_kcalloc (HANDLE, - sizeof(THING) * (E2) + E2, sizeof(THING) , ...) | - devm_kzalloc + devm_kcalloc (HANDLE, - sizeof(THING) * E2 + E2, sizeof(THING) , ...) | - devm_kzalloc + devm_kcalloc (HANDLE, - (E1) * E2 + E1, E2 , ...) | - devm_kzalloc + devm_kcalloc (HANDLE, - (E1) * (E2) + E1, E2 , ...) | - devm_kzalloc + devm_kcalloc (HANDLE, - E1 * E2 + E1, E2 , ...) ) Signed-off-by: Kees Cook <keescook@chromium.org>
* soc: bcm: raspberrypi-power: Fix use of __packedFlorian Fainelli2018-04-161-1/+1
| | | | | | | | | | Commit a09cd356586d ("ARM: bcm2835: add rpi power domain driver") attempted to annotate the structure rpi_power_domain_packet with __packed but introduced a typo and made it named __packet instead. Just drop the annotation since the structure is naturally aligned already. Fixes: a09cd356586d ("ARM: bcm2835: add rpi power domain driver") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* soc: bcm: brcmstb: Be multi-platform compatibleThierry Reding2018-01-151-9/+29
| | | | | | | | | | | | | | | | | | | | | We were making a bunch of wrong assumptions that turned out to blow out on non-Broadcom STB platforms: - we would return -ENODEV from brcmstb_soc_device_early_init() if we could not find the sun_top_ctrl device node, this is not an error in the context of a multi-platform kernel - we would still try to register the Broadcom STB SoC device, even if we are not running on such a platform While at it, also fix the sun_top_ctrl device_node leaks while we change the flow of brcmstb_soc_device_init() and brcmstb_soc_device_early_init(). Fixes: f780429adfbc ("soc: brcmstb: biuctrl: Move to early_initcall") Signed-off-by: Thierry Reding <treding@nvidia.com> [florian: Combine all of Thierry's patch in one go for easier review] Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* soc: brcmstb: biuctrl: exit without warning on non brcmstb platformsSudeep Holla2018-01-151-9/+11
| | | | | | | | | | | | | | | | | | | | | | Currently if this driver is included, we get the following warning on any platforms irrespective of whether it's brcmstb platform or not. " brcmstb: biuctrl: missing BIU control node brcmstb: biuctrl: MCP: Unable to disable write pairing! " This patch allows to exit early without any warning messages on non brcmstb platforms as it's meaningless for them. Cc: Brian Norris <computersforpeace@gmail.com> Cc: Gregory Fong <gregory.0xf0@gmail.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: bcm-kernel-feedback-list@broadcom.com Fixes: f780429adfbc ("soc: brcmstb: biuctrl: Move to early_initcall") Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> [florian: Add fixes tag, make initcall non fatal] Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Revert "soc: brcmstb: Only register SoC device on STB platforms"Olof Johansson2018-01-121-5/+0
| | | | | | | | | This reverts commit 23a0d847992997000ca2223a19111ee778fbea63. Patch has issues that's being addressed by the Florian and he will follow up with a new patch to address the original issue. Signed-off-by: Olof Johansson <olof@lixom.net>
* soc: brcmstb: Only register SoC device on STB platformsThierry Reding2018-01-111-0/+5
| | | | | | | | | | | | | | | | | | | | | After moving the SoC device initialization to an early initcall in commit f780429adfbc ("soc: brcmstb: biuctrl: Move to early_initcall"), the Broadcom STB SoC device is registered on all platforms if support for the device is enabled in the kernel configuration. This causes an additional SoC device to appear on platforms that already register a native one. In case of Tegra the STB SoC device is registered as soc0 (with totally meaningless content in the sysfs attributes) and causes various scripts and programs to fail because they don't know how to parse that data. To fix this, duplicate the check from brcmstb_soc_device_early_init() that already prevents the code from doing anything nonsensical on non- STB platforms. Fixes: f780429adfbc ("soc: brcmstb: biuctrl: Move to early_initcall") Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* soc: brcmstb: biuctrl: Move to early_initcallFlorian Fainelli2017-12-201-2/+4
| | | | | | | | | | | | Being called during early_initcall() is early enough that it occurs before SMP initialization, which is all we care about for the Bus Interface Unit configuration. This solves lack of BIU initialization on ARM64 platforms where we do not have an anchor where to put the BIU initialization (since there are no machine descriptors). Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* soc: brcmstb: Split initializationFlorian Fainelli2017-12-201-14/+13
| | | | | | | | | We may need access to family_id and product_id fairly early on boot for other parts of the code (e.g: biuctrl.c), so split the initialization between an early_init() and an arch_initcall() which allows us to do that. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* soc: brcmstb: biuctrl: Fine tune B53 MCP interface settingsFlorian Fainelli2017-12-201-0/+76
| | | | | | | | | In order to achieve expected MCP bus throughput on 3 particular chips: 7268, 7271 and 7278, do the appropriate programming of the MCP interface: increase number of MCP write credits, turn on write-back throttling when present. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* soc: brcmstb: biuctrl: Wire-up new registersFlorian Fainelli2017-12-201-1/+7
| | | | | | | | Add definitions for B53 systems register: CPU_MCP_FLOW_REG and CPU_WRITEBACK_CTRL_REG. These register will be saved and restored accordingly. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* soc: brcmstb: biuctrl: Prepare for saving/restoring other registersFlorian Fainelli2017-12-201-17/+58
| | | | | | | | In preparation for saving/restoring additional registers required on some newer platforms (7268, 7271, 7278), migrate the code to use enums and helper functions to access registers. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* soc: brcmstb: Correct CPU_CREDIT_REG offset for Brahma-B53 CPUsFlorian Fainelli2017-12-201-3/+21
| | | | | | | | On Broadcom Brahma-B53 CPUs, the CPU_CREDIT_REG offset got moved to 0x0b0 instead of 0x184, correct this such that we correcty enable/disable write-pairing for these chips. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* soc: brcmstb: Make CPU credit offset more parameterizedFlorian Fainelli2017-12-201-5/+6
| | | | | | | In preparation for fixing and changing values in the CPU_CREDIT_REG register for B53-based systems, make the offset parameterized. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* Merge tag 'armsoc-drivers' of ↵Linus Torvalds2017-11-1611-0/+1923
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC driver updates from Arnd Bergmann: "This branch contains platform-related driver updates for ARM and ARM64, these are the areas that bring the changes: New drivers: - driver support for Renesas R-Car V3M (R8A77970) - power management support for Amlogic GX - a new driver for the Tegra BPMP thermal sensor - a new bus driver for Technologic Systems NBUS Changes for subsystems that prefer to merge through arm-soc: - the usual updates for reset controller drivers from Philipp Zabel, with five added drivers for SoCs in the arc, meson, socfpa, uniphier and mediatek families - updates to the ARM SCPI and PSCI frameworks, from Sudeep Holla, Heiner Kallweit and Lorenzo Pieralisi Changes specific to some ARM-based SoC - the Freescale/NXP DPAA QBMan drivers from PowerPC can now work on ARM as well - several changes for power management on Broadcom SoCs - various improvements on Qualcomm, Broadcom, Amlogic, Atmel, Mediatek - minor Cleanups for Samsung, TI OMAP SoCs" [ NOTE! This doesn't work without the previous ARM SoC device-tree pull, because the R8A77970 driver is missing a header file that came from that pull. The fact that this got merged afterwards only fixes it at this point, and bisection of that driver will fail if/when you walk into the history of that driver. - Linus ] * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (96 commits) soc: amlogic: meson-gx-pwrc-vpu: fix power-off when powered by bootloader bus: add driver for the Technologic Systems NBUS memory: omap-gpmc: Remove deprecated gpmc_update_nand_reg() soc: qcom: remove unused label soc: amlogic: gx pm domain: add PM and OF dependencies drivers/firmware: psci_checker: Add missing destroy_timer_on_stack() dt-bindings: power: add amlogic meson power domain bindings soc: amlogic: add Meson GX VPU Domains driver soc: qcom: Remote filesystem memory driver dt-binding: soc: qcom: Add binding for rmtfs memory of: reserved_mem: Accessor for acquiring reserved_mem of/platform: Generalize /reserved-memory handling soc: mediatek: pwrap: fix fatal compiler error soc: mediatek: pwrap: fix compiler errors arm64: mediatek: cleanup message for platform selection soc: Allow test-building of MediaTek drivers soc: mediatek: place Kconfig for all SoC drivers under menu soc: mediatek: pwrap: add support for MT7622 SoC soc: mediatek: pwrap: add common way for setup CS timing extenstion soc: mediatek: pwrap: add MediaTek MT6380 as one slave of pwrap ..
generated by cgit v1.2.3 (git 2.25.1) at 2024-08-20 01:25:18 +0000