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* soc: mediatek: mtk-svs: add missing MODULE_DEVICE_TABLEZeng Heng2023-02-011-0/+1
| | | | | | | | | | This patch adds missing MODULE_DEVICE_TABLE definition which generates correct modalias for automatic loading of this driver when it is built as an external module. Signed-off-by: Zeng Heng <zengheng4@huawei.com> Link: https://lore.kernel.org/r/20220928151346.1942977-1-zengheng4@huawei.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* soc: mediatek: mtk-devapc: Switch to devm_clk_get_enabled()AngeloGioacchino Del Regno2023-02-011-9/+2
| | | | | | | | | | | | This driver does exactly devm_clk_get() and clk_prepare_enable() right after, which is exactly what devm_clk_get_enabled() does: clean that up by switching to the latter. This commit brings no functional changes. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20221006110935.59695-1-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* soc: mtk-svs: mt8183: refactor o_slope calculationRoger Lu2023-01-311-29/+22
| | | | | | | | | | The o_slope value is dependent of the o_slope_sign, refactor code to get rid of unnecessary if constructs. Signed-off-by: Roger Lu <roger.lu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20230111074528.29354-15-roger.lu@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* soc: mediatek: mtk-svs: delete superfluous platform data entriesMatthias Brugger2023-01-311-10/+12
| | | | | | | | | | The platform name and efuse parsing function pointer are only used while probing the device. Use them from the svs_platform_data struct instead. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Roger Lu <roger.lu@mediatek.com> Link: https://lore.kernel.org/r/20230111074528.29354-12-roger.lu@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* soc: mediatek: mtk-svs: move svs_platform_probe into probeMatthias Brugger2023-01-311-16/+4
| | | | | | | | | | Moving svs_platform_probe into driver probe function will allow us to reduce svs_platform members. This will be done in a follow-up patch. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Roger Lu <roger.lu@mediatek.com> Link: https://lore.kernel.org/r/20230111074528.29354-11-roger.lu@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* soc: mediatek: mtk-svs: improve readability of platform_probeMatthias Brugger2023-01-311-4/+0
| | | | | | | | | | If a compatible misses a match data entry, then something is wrong in the development phase, we don't need to check for that at runtime. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Roger Lu <roger.lu@mediatek.com> Link: https://lore.kernel.org/r/20230111074528.29354-10-roger.lu@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* soc: mediatek: mtk-svs: clean up platform probingMatthias Brugger2023-01-311-4/+1
| | | | | | | | | | | We only ever call the SoC specific probe function from svs_platform_probe. No need to carry that function in a global datastructure around. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Roger Lu <roger.lu@mediatek.com> Link: https://lore.kernel.org/r/20230111074528.29354-9-roger.lu@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* soc: mediatek: mtk-svs: keep svs alive if CONFIG_DEBUG_FS not supportedRoger Lu2023-01-311-0/+6
| | | | | | | | | | Some projects might not support CONFIG_DEBUG_FS but still needs svs to be alive. Therefore, enclose debug cmd codes with CONFIG_DEBUG_FS to make sure svs can be alive when CONFIG_DEBUG_FS not supported. Signed-off-by: Roger Lu <roger.lu@mediatek.com> Link: https://lore.kernel.org/r/20230111074528.29354-8-roger.lu@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* soc: mediatek: mtk-svs: Use pm_runtime_resume_and_get() in svs_init01()Shang XiaoJing2023-01-311-1/+1
| | | | | | | | | | | | | | svs_init01() calls pm_runtime_get_sync() and added fail path as svs_init01_finish to put usage_counter. However, pm_runtime_get_sync() will increment usage_counter even it failed. Fix it by replacing it with pm_runtime_resume_and_get() to keep usage counter balanced. Fixes: 681a02e95000 ("soc: mediatek: SVS: introduce MTK SVS engine") Signed-off-by: Shang XiaoJing <shangxiaojing@huawei.com> Signed-off-by: Roger Lu <roger.lu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20230111074528.29354-5-roger.lu@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* soc: mediatek: mtk-svs: reset svs when svs_resume() failRoger Lu2023-01-311-1/+5
| | | | | | | | | Add svs reset when svs_resume() fail. Fixes: a825d72f74a3 ("soc: mediatek: fix missing clk_disable_unprepare() on err in svs_resume()") Signed-off-by: Roger Lu <roger.lu@mediatek.com> Link: https://lore.kernel.org/r/20230111074528.29354-3-roger.lu@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* soc: mediatek: mtk-svs: restore default voltages when svs_init02() failRoger Lu2023-01-311-2/+22
| | | | | | | | | | | | If svs init02 fail, it means we cannot rely on svs bank voltages anymore. We need to disable svs function and restore DVFS opp voltages back to the default voltages for making sure we have enough DVFS voltages. Fixes: 681a02e95000 ("soc: mediatek: SVS: introduce MTK SVS engine") Fixes: 0bbb09b2af9d ("soc: mediatek: SVS: add mt8192 SVS GPU driver") Signed-off-by: Roger Lu <roger.lu@mediatek.com> Link: https://lore.kernel.org/r/20230111074528.29354-2-roger.lu@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* soc: mediatek: mmsys: add support for MT8195 VPPSYSRoy-CW.Yeh2023-01-302-0/+23
| | | | | | | | | | Add MT8195 VPPSYS0 and VPPSYS1 driver data. Signed-off-by: Roy-CW.Yeh <roy-cw.yeh@mediatek.com> Signed-off-by: Moudy Ho <moudy.ho@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20230118031509.29834-5-moudy.ho@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* soc: mediatek: Introduce mediatek-regulator-coupler driverAngeloGioacchino Del Regno2023-01-303-0/+165
| | | | | | | | | | | | | This driver currently deals with GPU-SRAM regulator coupling, ensuring that the SRAM voltage is always between a specific range of distance to the GPU voltage, depending on the SoC, necessary in order to achieve system stability across the full range of supported GPU frequencies. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Dmitry Osipenko <dmitry.osipenko@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com> Link: https://lore.kernel.org/r/20221006115816.66853-1-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* soc: mediatek: mtk-svs: Enable the IRQ laterRicardo Ribalda2023-01-251-8/+8
| | | | | | | | | | | | | | | | If the system does not come from reset (like when is booted via kexec()), the peripheral might triger an IRQ before the data structures are initialised. Fixes: [ 0.227710] Unable to handle kernel NULL pointer dereference at virtual address 0000000000000f08 [ 0.227913] Call trace: [ 0.227918] svs_isr+0x8c/0x538 Signed-off-by: Ricardo Ribalda <ribalda@chromium.org> Link: https://lore.kernel.org/r/20221127-mtk-svs-v2-0-145b07663ea8@chromium.org Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* soc: mediatek: add mtk-mutex support for mt8195 vdosys1Nancy.Lin2023-01-251-0/+33
| | | | | | | | | | | | | | | Add mtk-mutex support for mt8195 vdosys1. The vdosys1 path component contains ovl_adaptor, merge5, and dp_intf1. Ovl_adaptor is composed of several sub-elements which include MDP_RDMA0~7, MERGE0~3, and ETHDR. Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: CK Hu <ck.hu@mediatek.com> Tested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Link: https://lore.kernel.org/r/20230113104434.28023-12-nancy.lin@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* soc: mediatek: add mtk-mutex component - dp_intf1Nancy.Lin2023-01-251-0/+4
| | | | | | | | | | | | | | Add mtk-mutex DDP_COMPONENT_DP_INTF1 component. The MT8195 vdosys1 path component contains ovl_adaptor, merge5, and dp_intf1. It is a preparation for adding support for MT8195 vdosys1 path component. Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: CK Hu <ck.hu@mediatek.com> Tested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Link: https://lore.kernel.org/r/20230113104434.28023-11-nancy.lin@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* soc: mediatek: mmsys: add reset control for MT8195 vdosys1Nancy.Lin2023-01-252-0/+3
| | | | | | | | | | | | | | MT8195 vdosys1 has more than 32 reset bits and a different reset base than other chips. Add the number of reset bits and reset base in mmsys private data. Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: CK Hu <ck.hu@mediatek.com> Tested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Link: https://lore.kernel.org/r/20230113104434.28023-10-nancy.lin@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* soc: mediatek: mmsys: add mmsys for support 64 reset bitsNancy.Lin2023-01-252-13/+28
| | | | | | | | | | | | | | | | | Add mmsys for support 64 reset bits. It is a preparation for MT8195 vdosys1 HW reset. MT8195 vdosys1 has more than 32 reset bits. 1. Add the number of reset bits in mmsys private data 2. move the whole "reset register code section" behind the "get mmsys->data" code section for getting the num_resets in mmsys->data. Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: CK Hu <ck.hu@mediatek.com> Tested-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20230113104434.28023-9-nancy.lin@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* soc: mediatek: add cmdq support of mtk-mmsys config API for mt8195 vdosys1Nancy.Lin2023-01-251-19/+44
| | | | | | | | | | | | | | | | | | | | | | | Add cmdq support for mtk-mmsys config API. The mmsys config register settings need to take effect with the other HW settings(like OVL_ADAPTOR...) at the same vblanking time. If we use CPU to write the mmsys reg, we can't guarantee all the settings can be written in the same vblanking time. Cmdq is used for this purpose. We prepare all the related HW settings in one cmdq packet. The first command in the packet is "wait stream done", and then following with all the HW settings. After the cmdq packet is flush to GCE HW. The GCE waits for the "stream done event" to coming and then starts flushing all the HW settings. This can guarantee all the settings flush in the same vblanking. Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: CK Hu <ck.hu@mediatek.com> Tested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Link: https://lore.kernel.org/r/20230113104434.28023-8-nancy.lin@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* soc: mediatek: add mtk-mmsys config API for mt8195 vdosys1Nancy.Lin2023-01-252-0/+41
| | | | | | | | | | | | | | | | | | | | Add four mmsys config APIs. The config APIs are used for config mmsys reg. Some mmsys regs need to be set according to the HW engine binding to the mmsys simultaneously. 1. mtk_mmsys_merge_async_config: config merge async width/height. async is used for cross-clock domain synchronization. 2. mtk_mmsys_hdr_confing: config hdr backend async width/height. 3. mtk_mmsys_mixer_in_config and mtk_mmsys_mixer_in_config: config mixer related settings. Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: CK Hu <ck.hu@mediatek.com> Tested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Link: https://lore.kernel.org/r/20230113104434.28023-7-nancy.lin@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* soc: mediatek: refine code to use mtk_mmsys_update_bits APINancy.Lin2023-01-251-29/+16
| | | | | | | | | | | | | Simplify code for update mmsys reg. Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: CK Hu <ck.hu@mediatek.com> Tested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20230113104434.28023-6-nancy.lin@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* soc: mediatek: add mtk-mmsys support for mt8195 vdosys1Nancy.Lin2023-01-252-0/+149
| | | | | | | | | | | | | Add mt8195 vdosys1 routing table to the driver data of mtk-mmsys. Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com> Reviewed-by: CK Hu <ck.hu@mediatek.com> Tested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Link: https://lore.kernel.org/r/20230113104434.28023-5-nancy.lin@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* soc: mediatek: pm-domains: Add buck isolation setting in power domainAllen-KH Cheng2023-01-192-0/+9
| | | | | | | | | | | | | | In some chipsets, we need to disable EXT_BUCK_ISO before turning on the specific power pm-domains (mtcmos), such as ADSP in MT8192 and CAM_VCORE in MT8188. Add the MTK_SCPD_EXT_BUCK_ISO flag to control the buck isolation setting in the mediatek power domain driver. Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20230117032640.13504-3-allen-kh.cheng@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* soc: mediatek: pm-domains: Add buck isolation offset and mask to power ↵Allen-KH Cheng2023-01-191-0/+4
| | | | | | | | | | | domain data Add buck isolation offset and mask to power domain data. Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20230117032640.13504-2-allen-kh.cheng@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* soc: mediatek: pm-domains: Add support for mt8188Garmin.Chang2023-01-192-0/+628
| | | | | | | | | | Add domain control data including bus protection data size change due to more protection steps in mt8188. Signed-off-by: Garmin.Chang <Garmin.Chang@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20221223080553.9397-3-Garmin.Chang@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* mtk-mmsys: Change mtk-mmsys & mtk-mutex to modulesYongqiang Niu2023-01-093-3/+34
| | | | | | | | | Change mtk-mmsys & mtk-mutex to modules for gki Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20221118063018.13520-1-yongqiang.niu@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* soc: mediatek: mtk-pm-domains: Allow mt8186 ADSP default power onTinghan Shen2023-01-091-3/+1
| | | | | | | | | | | | In the use case of configuring the access permissions of the ADSP core, the mt8186 SoC ADSP power will be switched on in the bootloader because the permission control registers are located in the ADSP subsys. Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com> Fixes: 88590cbc1703 ("soc: mediatek: pm-domains: Add support for mt8186") Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20221012075434.30009-1-tinghan.shen@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* soc: mediatek: add mtk-mutex support for mt8188 vdosys0Nathan Lu2023-01-091-0/+53
| | | | | | | | | | add mtk-mutex support for mt8188 vdosys0. Signed-off-by: amy zhang <Amy.Zhang@mediatek.com> Signed-off-by: Nathan Lu <nathan.lu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20221206020046.11333-6-nathan.lu@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* soc: mediatek: add mtk-mmsys support for mt8188 vdosys0Nathan Lu2023-01-092-0/+160
| | | | | | | | | | 1. add mt8188 mmsys 2. add mt8188 vdosys0 routing table settings Signed-off-by: amy zhang <Amy.Zhang@mediatek.com> Signed-off-by: Nathan Lu <nathan.lu@mediatek.com> Link: https://lore.kernel.org/r/20221206020046.11333-5-nathan.lu@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* soc: mediatek: mutex: Drop empty platform remove functionUwe Kleine-König2023-01-091-6/+0
| | | | | | | | | A remove callback just returning 0 is equivalent to no remove callback at all. So drop the useless function. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* Merge tag 'soc-fixes-6.2-1' of ↵Linus Torvalds2022-12-191-1/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC fixes from Arnd Bergmann: "These are a couple of build fixes from randconfig testing, plus a set of Mediatek SoC specific fixes, all trivial" * tag 'soc-fixes-6.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: soc: tegra: fix CPU_BIG_ENDIAN dependencies ARM: disallow pre-ARMv5 builds with ld.lld ARM: pxa: fix building with clang MAINTAINERS: add related dts to IXP4xx ARM: dts: spear: drop 0x from unit address arm64: dts: mt8183: Fix Mali GPU clock arm64: dts: mediatek: mt8195-demo: fix the memory size of node secmon soc: mediatek: pm-domains: Fix the power glitch issue
| * soc: mediatek: pm-domains: Fix the power glitch issueChun-Jie Chen2022-12-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Power reset maybe generate unexpected signal. In order to avoid the glitch issue, we need to enable isolation first to guarantee the stable signal when power reset is triggered. Fixes: 59b644b01cf4 ("soc: mediatek: Add MediaTek SCPSYS power domains") Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: Miles Chen <miles.chen@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20221014102029.1162-1-allen-kh.cheng@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* | soc: mediatek: Add deprecated compatible to mmsysMatthias Brugger2022-11-211-0/+4
| | | | | | | | | | | | | | | | | | For backward compatibility we add the deprecated compatible. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20221111082912.14557-1-matthias.bgg@kernel.org Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* | soc: mediatek: pwrap: add mt8365 SoC supportFabien Parent2022-11-211-0/+78
| | | | | | | | | | | | | | | | | | | | Add PMIC Wrap support for MT8365 SoC. Signed-off-by: Fabien Parent <fparent@baylibre.com> Signed-off-by: Fadwa CHIBY <fchiby@baylibre.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20221031093401.22916-4-fchiby@baylibre.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* | soc: mediatek: pwrap: add support for sys & tmr clocksFabien Parent2022-11-211-4/+32
| | | | | | | | | | | | | | | | | | | | | | | | MT8365 requires an extra 2 clocks to be enabled to behave correctly. Add support these 2 clocks, they are made optional since they seem to be present only on MT8365. Signed-off-by: Fabien Parent <fparent@baylibre.com> Signed-off-by: Fadwa CHIBY <fchiby@baylibre.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20221031093401.22916-3-fchiby@baylibre.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* | soc: mediatek: add mtk-mmsys support for mt8195 vdosys0Jason-JH.Lin2022-11-212-0/+381
| | | | | | | | | | | | | | | | | | | | 1. Add mt8195 driver data with compatible "mediatek-mt8195-vdosys0". 2. Add mt8195 routing table settings of vdosys0. Signed-off-by: Jason-JH.Lin <jason-jh.lin@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220927152704.12018-4-jason-jh.lin@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* | Revert "soc: mediatek: add mtk-mmsys support for mt8195 vdosys0"Jason-JH.Lin2022-11-213-517/+11
| | | | | | | | | | | | | | | | | | | | | | | | This reverts commit b804923b7ccb9c9629703364e927b48cd02a9254. Due to the compatible changing of mt8195 from "mediatek,mt8195-mmsys" to "mediatek,mt8195-vdosys0", we have to revert this patch and send a new patch with the new compatible. Signed-off-by: Jason-JH.Lin <jason-jh.lin@mediatek.com> Link: https://lore.kernel.org/r/20220927152704.12018-3-jason-jh.lin@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* | soc: mediatek: Add all settings to mtk_mmsys_ddp_dpi_fmt_config funcXinlei Lee2022-11-082-9/+26
|/ | | | | | | | | | | | | | | | | | | | | | | The difference between MT8186 and other ICs is that when modifying the output format, we need to modify the mmsys_base+0x400 register to take effect. So when setting the dpi output format, we need to call mtk_mmsys_ddp_dpi_fmt_config to set it to MT8186 synchronously. Commit a071e52f75d1 ("soc: mediatek: Add mmsys func to adapt to dpi output for MT8186") lacked some of the possible output formats and also had a wrong bitmask. Add the missing output formats and fix the bitmask. While at it, also update mtk_mmsys_ddp_dpi_fmt_config() to use generic formats, so that it is slightly easier to extend for other platforms. Fixes: a071e52f75d1 ("soc: mediatek: Add mmsys func to adapt to dpi output for MT8186") Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: CK Hu <ck.hu@mediatek.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* Merge tag 'char-misc-6.1-rc1' of ↵Linus Torvalds2022-10-081-1/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc Pull char/misc and other driver updates from Greg KH: "Here is the large set of char/misc and other small driver subsystem changes for 6.1-rc1. Loads of different things in here: - IIO driver updates, additions, and changes. Probably the largest part of the diffstat - habanalabs driver update with support for new hardware and features, the second largest part of the diff. - fpga subsystem driver updates and additions - mhi subsystem updates - Coresight driver updates - gnss subsystem updates - extcon driver updates - icc subsystem updates - fsi subsystem updates - nvmem subsystem and driver updates - misc driver updates - speakup driver additions for new features - lots of tiny driver updates and cleanups All of these have been in the linux-next tree for a while with no reported issues" * tag 'char-misc-6.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (411 commits) w1: Split memcpy() of struct cn_msg flexible array spmi: pmic-arb: increase SPMI transaction timeout delay spmi: pmic-arb: block access for invalid PMIC arbiter v5 SPMI writes spmi: pmic-arb: correct duplicate APID to PPID mapping logic spmi: pmic-arb: add support to dispatch interrupt based on IRQ status spmi: pmic-arb: check apid against limits before calling irq handler spmi: pmic-arb: do not ack and clear peripheral interrupts in cleanup_irq spmi: pmic-arb: handle spurious interrupt spmi: pmic-arb: add a print in cleanup_irq drivers: spmi: Directly use ida_alloc()/free() MAINTAINERS: add TI ECAP driver info counter: ti-ecap-capture: capture driver support for ECAP Documentation: ABI: sysfs-bus-counter: add frequency & num_overflows items dt-bindings: counter: add ti,am62-ecap-capture.yaml counter: Introduce the COUNTER_COMP_ARRAY component type counter: Consolidate Counter extension sysfs attribute creation counter: Introduce the Count capture component counter: 104-quad-8: Add Signal polarity component counter: Introduce the Signal polarity component counter: interrupt-cnt: Implement watch_validate callback ...
| * nvmem: prefix all symbols with NVMEM_Rafał Miłecki2022-09-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | This unifies all NVMEM symbols. They follow one style now. Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20220916122100.170016-8-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* | soc: mediatek: Add mmsys func to adapt to dpi output for MT8186Xinlei Lee2022-09-152-0/+26
| | | | | | | | | | | | | | | | | | | | | | Add mmsys func to manipulate dpi output format config for MT8186. Co-developed-by: Jitao Shi <jitao.shi@mediatek.com> Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com> Reviewed-by: Nís F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/all/1663161662-1598-2-git-send-email-xinlei.lee@mediatek.com/ Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* | soc: mediatek: mutex: Add support for MT6795 Helio X10 display mutexAngeloGioacchino Del Regno2022-09-151-0/+16
| | | | | | | | | | | | | | | | | | | | | | MT6795 has the same mutex mod/sof register layout as MT2712 and MT8173, but supports only four SOF, as it has two DSI and one DPI. Support is added by reusing most of the MT8173 data, with the addition of a mt6795-specific SOF array (and devicetree compatible, of course). Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220913140121.403637-3-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* | soc: mediatek: mutex: Add mt8186 mutex mod settings for mdp3Allen-KH Cheng2022-08-311-0/+28
| | | | | | | | | | | | | | | | | | | | | | Add mt8186 mutex mod settings for mdp3. Co-developed-by: Xiandong Wang <xiandong.wang@mediatek.com> Signed-off-by: Xiandong Wang <xiandong.wang@mediatek.com> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220831172151.10215-3-allen-kh.cheng@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* | soc: mediatek: pm-domains: Simplify some error messageChristophe JAILLET2022-08-311-3/+3
| | | | | | | | | | | | | | | | | | | | dev_err_probe() already prints the error code in a human readable way, so there is no need to duplicate it as a numerical value at the end of the message. Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Link: https://lore.kernel.org/r/e6ba80d8e27fdb2b1527c7eae6687e481960c81d.1659735996.git.christophe.jaillet@wanadoo.fr Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* | soc: mediatek: mtk-svs: Explicitly include bitfield headerNícolas F. R. A. Prado2022-08-301-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit a92438c5a30a ("soc: mediatek: mtk-svs: Use bitfield access macros where possible") introduced the use of FIELD_GET and FIELD_PREP macros, which are defined in the bitfield header. Add an explicit include for it so we're sure to have the symbols defined independently of the config. Fixes: a92438c5a30a ("soc: mediatek: mtk-svs: Use bitfield access macros where possible") Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220829204439.3748648-1-nfraprado@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* | soc: mediatek: mtk-svs: Use bitfield access macros where possibleAngeloGioacchino Del Regno2022-08-261-63/+128
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to enhance readability and safety during registers setup and value retrieval, redefine a few register related macros and convert all open-coded instances of bitfield setting/retrieval to use the FIELD_PREP() and FIELD_GET() macros. While at it, some macros were renamed to further enhance readability. This commit brings no functional changes. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20220825184616.2118870-3-nfraprado@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* | soc: mediatek: mtk-svs: Commonize t-calibration-data fuse array readAngeloGioacchino Del Regno2022-08-261-37/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | Commonize the repeating pattern for reading the "t-calibration-data" efuse data in a new function svs_thermal_efuse_get_data(), reducing the size of this driver. No functional changes. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20220825184616.2118870-2-nfraprado@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* | soc: mediatek: mtk-svs: Use devm variant for dev_pm_opp_of_add_table()AngeloGioacchino Del Regno2022-08-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | In error cases, this driver never calls dev_pm_opp_of_remove_table(): instead of doing that, simple switch to a devm variant, which will automagically do that for us. Fixes: 681a02e95000 ("soc: mediatek: SVS: introduce MTK SVS engine") Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220726141653.177948-6-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* | soc: mediatek: mtk-svs: Drop of_match_ptr() for of_match_tableAngeloGioacchino Del Regno2022-08-251-1/+1
| | | | | | | | | | | | | | | | | | | | If CONFIG_OF is not set, we get a -Wunused-const-variable: dropping of_match_ptr() solves that issue. Fixes: 681a02e95000 ("soc: mediatek: SVS: introduce MTK SVS engine") Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220726141653.177948-5-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* | soc: mediatek: mtk-svs: Remove hardcoded irqflagsAngeloGioacchino Del Regno2022-08-251-8/+1
| | | | | | | | | | | | | | | | | | The interrupt flags are specified in devicetree: forcing them into the driver is suboptimal and not very useful. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220726141653.177948-4-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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