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* Merge tag 'soc-fsl-fix-v5.0' of ↵Arnd Bergmann2019-01-301-4/+5
|\ | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux into arm/fixes soc/fsl fixes for v5.0 - qbman: avoid missing interrupts by only clearing processed events * tag 'soc-fsl-fix-v5.0' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux: soc: fsl: qbman: avoid race in clearing QMan interrupt Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * soc: fsl: qbman: avoid race in clearing QMan interruptMadalin Bucur2019-01-181-4/+5
| | | | | | | | | | | | | | | | | | | | | | By clearing all interrupt sources, not only those that already occurred, the existing code may acknowledge by mistake interrupts that occurred after the code checks for them. Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com> Signed-off-by: Roy Pledge <roy.pledge@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* | Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netLinus Torvalds2019-01-161-55/+0
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull networking fixes from David Miller: 1) Fix regression in multi-SKB responses to RTM_GETADDR, from Arthur Gautier. 2) Fix ipv6 frag parsing in openvswitch, from Yi-Hung Wei. 3) Unbounded recursion in ipv4 and ipv6 GUE tunnels, from Stefano Brivio. 4) Use after free in hns driver, from Yonglong Liu. 5) icmp6_send() needs to handle the case of NULL skb, from Eric Dumazet. 6) Missing rcu read lock in __inet6_bind() when operating on mapped addresses, from David Ahern. 7) Memory leak in tipc-nl_compat_publ_dump(), from Gustavo A. R. Silva. 8) Fix PHY vs r8169 module loading ordering issues, from Heiner Kallweit. 9) Fix bridge vlan memory leak, from Ido Schimmel. 10) Dev refcount leak in AF_PACKET, from Jason Gunthorpe. 11) Infoleak in ipv6_local_error(), flow label isn't completely initialized. From Eric Dumazet. 12) Handle mv88e6390 errata, from Andrew Lunn. 13) Making vhost/vsock CID hashing consistent, from Zha Bin. 14) Fix lack of UMH cleanup when it unexpectedly exits, from Taehee Yoo. 15) Bridge forwarding must clear skb->tstamp, from Paolo Abeni. * git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: (87 commits) bnxt_en: Fix context memory allocation. bnxt_en: Fix ring checking logic on 57500 chips. mISDN: hfcsusb: Use struct_size() in kzalloc() net: clear skb->tstamp in bridge forwarding path net: bpfilter: disallow to remove bpfilter module while being used net: bpfilter: restart bpfilter_umh when error occurred net: bpfilter: use cleanup callback to release umh_info umh: add exit routine for UMH process isdn: i4l: isdn_tty: Fix some concurrency double-free bugs vhost/vsock: fix vhost vsock cid hashing inconsistent net: stmmac: Prevent RX starvation in stmmac_napi_poll() net: stmmac: Fix the logic of checking if RX Watchdog must be enabled net: stmmac: Check if CBS is supported before configuring net: stmmac: dwxgmac2: Only clear interrupts that are active net: stmmac: Fix PCI module removal leak tools/bpf: fix bpftool map dump with bitfields tools/bpf: test btf bitfield with >=256 struct member offset bpf: fix bpffs bitfield pretty print net: ethernet: mediatek: fix warning in phy_start_aneg tcp: change txhash on SYN-data timeout ...
| * | soc/fsl/qe: fix err handling of ucc_of_parse_tdmWen Yang2019-01-041-55/+0
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently there are some issues with the ucc_of_parse_tdm function: 1, a possible null pointer dereference in ucc_of_parse_tdm, detected by the semantic patch deref_null.cocci, with the following warning: drivers/soc/fsl/qe/qe_tdm.c:177:21-24: ERROR: pdev is NULL but dereferenced. 2, dev gets modified, so in any case that devm_iounmap() will fail even when the new pdev is valid, because the iomap was done with a different pdev. 3, there is no driver bind with the "fsl,t1040-qe-si" or "fsl,t1040-qe-siram" device. So allocating resources using devm_*() with these devices won't provide a cleanup path for these resources when the caller fails. This patch fixes them. Suggested-by: Li Yang <leoyang.li@nxp.com> Suggested-by: Christophe LEROY <christophe.leroy@c-s.fr> Signed-off-by: Wen Yang <wen.yang99@zte.com.cn> Reviewed-by: Peng Hao <peng.hao2@zte.com.cn> CC: Julia Lawall <julia.lawall@lip6.fr> CC: Zhao Qiang <qiang.zhao@nxp.com> CC: David S. Miller <davem@davemloft.net> CC: netdev@vger.kernel.org CC: linuxppc-dev@lists.ozlabs.org CC: linux-kernel@vger.kernel.org Signed-off-by: David S. Miller <davem@davemloft.net>
* | Merge tag 'armsoc-fixes' of ↵Linus Torvalds2019-01-142-20/+5
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC fixes from Olof Johansson: "A bigger batch than I anticipated this week, for two reasons: - Some fallout on Davinci from board file -> DTB conversion, that also includes a few longer-standing fixes (i.e. not recent regressions). - drivers/reset material that has been in linux-next for a while, but didn't get sent to us until now for a variety of reasons (maintainer out sick, holidays, etc). There's a functional dependency in there such that one platform (Altera's SoCFPGA) won't boot without one of the patches; instead of reverting the patch that got merged, I looked at this set and decided it was small enough that I'll pick it up anyway. If you disagree I can revisit with a smaller set. That being said, there's also a handful of the usual stuff: - Fix for a crash on Armada 7K/8K when the kernel touches PSCI-reserved memory - Fix for PCIe reset on Macchiatobin (Armada 8K development board, what this email is sent from in fact :) - Enable a few new-merged modules for Amlogic in arm64 defconfig - Error path fixes on Integrator - Build fix for Renesas and Qualcomm - Initialization fix for Renesas RZ/G2E .. plus a few more fixlets" * tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (28 commits) ARM: integrator: impd1: use struct_size() in devm_kzalloc() qcom-scm: Include <linux/err.h> header gpio: pl061: handle failed allocations ARM: dts: kirkwood: Fix polarity of GPIO fan lines arm64: dts: marvell: mcbin: fix PCIe reset signal arm64: dts: marvell: armada-ap806: reserve PSCI area ARM: dts: da850-lcdk: Correct the sound card name ARM: dts: da850-lcdk: Correct the audio codec regulators ARM: dts: da850-evm: Correct the sound card name ARM: dts: da850-evm: Correct the audio codec regulators ARM: davinci: omapl138-hawk: fix label names in GPIO lookup entries ARM: davinci: dm644x-evm: fix label names in GPIO lookup entries ARM: davinci: dm355-evm: fix label names in GPIO lookup entries ARM: davinci: da850-evm: fix label names in GPIO lookup entries ARM: davinci: da830-evm: fix label names in GPIO lookup entries arm64: defconfig: enable modules for amlogic s400 sound card reset: uniphier-glue: Add AHCI reset control support in glue layer dt-bindings: reset: uniphier: Add AHCI core reset description reset: uniphier-usb3: Rename to reset-uniphier-glue dt-bindings: reset: uniphier: Replace the expression of USB3 with generic peripherals ...
| * | soc: renesas: r8a774c0-sysc: Fix initialization order of 3DG-{A,B}Biju Das2019-01-071-19/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The workaround for the wrong hierarchy of the 3DG-{A,B} power domains on RZ/G2E ES1.0 corrected the parent domains. However, the 3DG-{A,B} power domains were still initialized and powered in the wrong order, causing 3DG operation to fail. Fix this by changing the order in the table at runtime, when running on an affected SoC. This work is based on the work done by Geert for R-Car E3. Fixes: f37d211c687588328 ("soc: renesas: rcar-sysc: Add r8a774c0 support") Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | ARM: shmobile: fix build regressionsArnd Bergmann2019-01-071-1/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A number of Kconfig options have become available now to random ARM platforms outside of ARCH_MULTIPLATFORM, which now causes Kconfig warnings, and other build errors when those select options that lack additional dependencies, e.g.: WARNING: unmet direct dependencies detected for HAVE_ARM_ARCH_TIMER Depends on [n]: CPU_V7 [=n] Selected by [y]: - ARCH_RCAR_GEN2 [=y] && SOC_RENESAS [=y] - ARCH_R8A73A4 [=y] && SOC_RENESAS [=y] && ARM [=y] WARNING: unmet direct dependencies detected for SYS_SUPPORTS_EM_STI Depends on [n]: GENERIC_CLOCKEVENTS [=n] Selected by [y]: - ARCH_EMEV2 [=y] && SOC_RENESAS [=y] && ARM [=y] Put the old dependency on ARCH_RENESAS back for the moment to restore the previous behavior. Fixes: 062887bf5ef7 ("ARM: shmobile: Move SoC Kconfig symbols to drivers/soc/renesas/") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* / cross-tree: phase out dma_zalloc_coherent()Luis Chamberlain2019-01-081-1/+1
|/ | | | | | | | | | | | | | | | | | | We already need to zero out memory for dma_alloc_coherent(), as such using dma_zalloc_coherent() is superflous. Phase it out. This change was generated with the following Coccinelle SmPL patch: @ replace_dma_zalloc_coherent @ expression dev, size, data, handle, flags; @@ -dma_zalloc_coherent(dev, size, handle, flags) +dma_alloc_coherent(dev, size, handle, flags) Suggested-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Luis Chamberlain <mcgrof@kernel.org> [hch: re-ran the script on the latest tree] Signed-off-by: Christoph Hellwig <hch@lst.de>
* Merge tag 'armsoc-drivers' of ↵Linus Torvalds2018-12-3132-263/+1544
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC driver updates from Olof Johansson: "Misc driver updates for platforms, many of them power related. - Rockchip adds power domain support for rk3066 and rk3188 - Amlogic adds a power measurement driver - Allwinner adds SRAM support for three platforms (F1C100, H5, A64 C1) - Wakeup and ti-sysc (platform bus) fixes for OMAP/DRA7 - Broadcom fixes suspend/resume with Thumb2 kernels, and improves stability of a handful of firmware/platform interfaces - PXA completes their conversion to dmaengine framework - Renesas does a bunch of PM cleanups across many platforms - Tegra adds support for suspend/resume on T186/T194, which includes some driver cleanups and addition of wake events - Tegra also adds a driver for memory controller (EMC) on Tegra2 - i.MX tweaks power domain bindings, and adds support for i.MX8MQ in GPC - Atmel adds identifiers and LPDDR2 support for a new SoC, SAM9X60 and misc cleanups across several platforms" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (73 commits) ARM: at91: add support in soc driver for new SAM9X60 ARM: at91: add support in soc driver for LPDDR2 SiP memory: omap-gpmc: Use of_node_name_eq for node name comparisons bus: ti-sysc: Check for no-reset and no-idle flags at the child level ARM: OMAP2+: Check also the first dts child for hwmod flags soc: amlogic: meson-clk-measure: Add missing REGMAP_MMIO dependency soc: imx: gpc: Increase GPC_CLK_MAX to 7 soc: renesas: rcar-sysc: Fix power domain control after system resume soc: renesas: rcar-sysc: Merge PM Domain registration and linking soc: renesas: rcar-sysc: Remove rcar_sysc_power_{down,up}() helpers soc: renesas: r8a77990-sysc: Fix initialization order of 3DG-{A,B} dt-bindings: sram: sunxi: Add compatible for the A64 SRAM C1 dt-bindings: sram: sunxi: Add bindings for the H5 with SRAM C1 dt-bindings: sram: Add Allwinner suniv F1C100s soc: sunxi: sram: Add support for the H5 SoC system control soc: sunxi: sram: Enable EMAC clock access for H3 variant soc: imx: gpcv2: add support for i.MX8MQ SoC soc: imx: gpcv2: move register access table to domain data soc: imx: gpcv2: prefix i.MX7 specific defines dmaengine: pxa: make the filter function internal ...
| * Merge tag 'at91-4.21-soc' of ↵Olof Johansson2018-12-122-0/+17
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into next/drivers AT91 SoC for 4.21: - Add new SoC IDs * tag 'at91-4.21-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: at91: add support in soc driver for new SAM9X60 ARM: at91: add support in soc driver for LPDDR2 SiP Signed-off-by: Olof Johansson <olof@lixom.net>
| | * ARM: at91: add support in soc driver for new SAM9X60Sandeep Sheriker Mallikarjun2018-12-122-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add detection of new SAM9X60 by this soc.c driver. Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> [nicolas.ferre@microchip.com: split patch] Signed-off-by: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
| | * ARM: at91: add support in soc driver for LPDDR2 SiPNicolas Ferre2018-12-122-0/+12
| | | | | | | | | | | | | | | | | | | | | Add some more SiP components to be detected by this soc.c driver. Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
| * | Merge tag 'amlogic-drivers-2' of ↵Olof Johansson2018-12-121-0/+1
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/drivers soc: amlogic: updates for v4.21, round 2 - meson-clk-measure: Add missing REGMAP_MMIO dependency * tag 'amlogic-drivers-2' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: soc: amlogic: meson-clk-measure: Add missing REGMAP_MMIO dependency Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | soc: amlogic: meson-clk-measure: Add missing REGMAP_MMIO dependencyCorentin Labbe2018-12-101-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patchs adds a missing dependency on REGMAP_MMIO. This cause the following build failure on SPARC: drivers/soc/amlogic/meson-clk-measure.o: In function `meson_msr_probe': meson-clk-measure.c:(.text+0xc4): undefined reference to `__devm_regmap_init_mmio_clk' Signed-off-by: Corentin Labbe <clabbe@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
| * | | Merge tag 'imx-drivers-4.21' of ↵Olof Johansson2018-12-124-48/+258
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/drivers i.MX drivers change for 4.21: - A series from Aisheng that improves SCU power domain bindings by defining '#power-domain-cells' as 1, and adds i.MX8 SCU power domain driver support on top of it. - A series from Lucas that updates gpcv2 driver for scalability and adds i.MX8MQ support into the driver. - Increase gpc driver GPC_CLK_MAX definition to 7, as DISPLAY power domain on imx6sx has 7 clocks. * tag 'imx-drivers-4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: soc: imx: gpc: Increase GPC_CLK_MAX to 7 soc: imx: gpcv2: add support for i.MX8MQ SoC soc: imx: gpcv2: move register access table to domain data soc: imx: gpcv2: prefix i.MX7 specific defines firmware: imx: add SCU power domain driver firmware: imx: add pm svc headfile dt-bindings: fsl: scu: update power domain binding firmware: imx: remove resource id enums dt-bindings: imx: add scu resource id headfile Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | soc: imx: gpc: Increase GPC_CLK_MAX to 7Leonard Crestez2018-12-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DISPLAY power domain on imx6sx has 7 clocks. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| | * | | soc: imx: gpcv2: add support for i.MX8MQ SoCLucas Stach2018-12-053-5/+211
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The GPCv2 on the Freescale i.MX8MQ SoC works in the same way as the GPCv2 on the i.MX7, but only controls more power domains with a different mapping. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| | * | | soc: imx: gpcv2: move register access table to domain dataLucas Stach2018-12-051-20/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The valid register ranges are defined by the implemented power domains, which are different between the individual SoCs where the GPCv2 is used. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| | * | | soc: imx: gpcv2: prefix i.MX7 specific definesLucas Stach2018-12-051-28/+28
| | | |/ | | |/| | | | | | | | | | | | | | | | | | | | | So we can add i.MX8M support without introducing name clashes. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| * | | Merge tag 'v4.20-next-soc' of ↵Olof Johansson2018-12-123-0/+313
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into next/drivers add helper functions to create and send commands to the global command engine (GCE) device using the command queue driver (cmdq). * tag 'v4.20-next-soc' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: soc: mediatek: Add Mediatek CMDQ helper Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | soc: mediatek: Add Mediatek CMDQ helperHoulong Wei2018-12-023-0/+313
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add Mediatek CMDQ helper to create CMDQ packet and assemble GCE op code. Signed-off-by: Houlong Wei <houlong.wei@mediatek.com> Signed-off-by: HS Liao <hs.liao@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
| * | | Merge tag 'sunxi-drivers-for-4.21' of ↵Olof Johansson2018-12-121-12/+10
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/drivers Allwinner drivers changes for 4.21 Those patches are all about our SRAM driver, to enable new SoCs: the F1c100s, the H5 and the A64 C1 SRAM, that is used by the video decoding engine. * tag 'sunxi-drivers-for-4.21' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: dt-bindings: sram: sunxi: Add compatible for the A64 SRAM C1 dt-bindings: sram: sunxi: Add bindings for the H5 with SRAM C1 dt-bindings: sram: Add Allwinner suniv F1C100s soc: sunxi: sram: Add support for the H5 SoC system control soc: sunxi: sram: Enable EMAC clock access for H3 variant soc: sunxi: Change to use DEFINE_SHOW_ATTRIBUTE macro Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | soc: sunxi: sram: Add support for the H5 SoC system controlPaul Kocialkowski2018-12-051-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds the H5 SoC compatible to the list of device-tree matches for the SRAM driver. Since the variant is the same as the A64 (that precedes the H5), the same variant description is used. Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | soc: sunxi: sram: Enable EMAC clock access for H3 variantPaul Kocialkowski2018-12-051-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Just like the A64 and H5, the H3 SoC uses the system control block to enable the EMAC clock. Add a variant structure definition for the H3 and use it over the A10 one. This will allow using the H3-specific binding for the syscon node attached to the EMAC instead of the generic syscon binding. Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | soc: sunxi: Change to use DEFINE_SHOW_ATTRIBUTE macroYangtao Li2018-11-221-11/+1
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | Use DEFINE_SHOW_ATTRIBUTE macro to simplify the code. Signed-off-by: Yangtao Li <tiny.windzz@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| * | | Merge tag 'tegra-for-4.21-soc' of ↵Olof Johansson2018-12-122-37/+441
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers soc/tegra: Changes for v4.21-rc1 These changes are mostly cleanups to the PMC driver, but they also add support for wake events on Tegra186 and Tegra194, which can be used to wake the system from sleep. With this and the corresponding device tree additions suspend/resume is finally working on these SoCs. * tag 'tegra-for-4.21-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: soc/tegra: pmc: Add initial Tegra194 wake events soc/tegra: pmc: Add initial Tegra186 wake events soc/tegra: pmc: Add wake event support soc/tegra: pmc: Add Tegra194 support soc/tegra: pmc: Change to use DEFINE_SHOW_ATTRIBUTE macro soc/tegra: Don't leak device tree node reference soc/tegra: fuse: Remove duplicated function declaration soc/tegra: pmc: Drop locking from tegra_powergate_is_powered() soc/tegra: pmc: Add sysfs entries for reset info soc/tegra: pmc: Don't power-up XUSB power-domains Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | soc/tegra: pmc: Add initial Tegra194 wake eventsThierry Reding2018-11-281-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tegra194 supports 96 wake events in total. Many of them are never used, so only the most common ones (RTC alarm and power key) are currently defined. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | soc/tegra: pmc: Add initial Tegra186 wake eventsThierry Reding2018-11-281-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tegra186 support 96 wake events in total. Many of them are never used, so only the most common ones (RTC alarm and power key) are currently defined. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | soc/tegra: pmc: Add wake event supportThierry Reding2018-11-281-0/+225
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The power management controller has top-level controls that allow certain interrupts (such as from the RTC or a subset of GPIOs) to wake the system from sleep. Implement infrastructure to support these wake events. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | soc/tegra: pmc: Add Tegra194 supportThierry Reding2018-11-281-1/+65
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PMC controller on Tegra194 has a couple of new I/O pads and drops others compared to Tegra186. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | soc/tegra: pmc: Change to use DEFINE_SHOW_ATTRIBUTE macroYangtao Li2018-11-221-11/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use DEFINE_SHOW_ATTRIBUTE macro to simplify the code. Signed-off-by: Yangtao Li <tiny.windzz@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | soc/tegra: Don't leak device tree node referenceYangtao Li2018-11-221-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | of_find_node_by_path() acquires a reference to the node returned by it and that reference needs to be dropped by its caller. soc_is_tegra() doesn't do that, so fix it. Signed-off-by: Yangtao Li <tiny.windzz@gmail.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> [treding: slightly rewrite to avoid inline comparison] Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | soc/tegra: pmc: Drop locking from tegra_powergate_is_powered()Dmitry Osipenko2018-11-081-7/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes splats like the one below if CONFIG_DEBUG_ATOMIC_SLEEP=y and machine (Tegra30) booted with SMP=n or all secondary CPU's are put offline. Locking isn't needed because it protects atomic operation. BUG: sleeping function called from invalid context at kernel/locking/mutex.c:254 in_atomic(): 1, irqs_disabled(): 128, pid: 0, name: swapper/0 CPU: 0 PID: 0 Comm: swapper/0 Tainted: G C 4.18.0-next-20180821-00180-gc3ebb6544e44-dirty #823 Hardware name: NVIDIA Tegra SoC (Flattened Device Tree) [<c01134f4>] (unwind_backtrace) from [<c010db2c>] (show_stack+0x20/0x24) [<c010db2c>] (show_stack) from [<c0bd0f3c>] (dump_stack+0x94/0xa8) [<c0bd0f3c>] (dump_stack) from [<c0151df8>] (___might_sleep+0x13c/0x174) [<c0151df8>] (___might_sleep) from [<c0151ea0>] (__might_sleep+0x70/0xa8) [<c0151ea0>] (__might_sleep) from [<c0bec2b8>] (mutex_lock+0x2c/0x70) [<c0bec2b8>] (mutex_lock) from [<c0589844>] (tegra_powergate_is_powered+0x44/0xa8) [<c0589844>] (tegra_powergate_is_powered) from [<c0581a60>] (tegra30_cpu_rail_off_ready+0x30/0x74) [<c0581a60>] (tegra30_cpu_rail_off_ready) from [<c0122244>] (tegra30_idle_lp2+0xa0/0x108) [<c0122244>] (tegra30_idle_lp2) from [<c0853438>] (cpuidle_enter_state+0x140/0x540) [<c0853438>] (cpuidle_enter_state) from [<c08538a4>] (cpuidle_enter+0x40/0x4c) [<c08538a4>] (cpuidle_enter) from [<c01595e0>] (call_cpuidle+0x30/0x48) [<c01595e0>] (call_cpuidle) from [<c01599f8>] (do_idle+0x238/0x28c) [<c01599f8>] (do_idle) from [<c0159d28>] (cpu_startup_entry+0x28/0x2c) [<c0159d28>] (cpu_startup_entry) from [<c0be76c8>] (rest_init+0xd8/0xdc) [<c0be76c8>] (rest_init) from [<c1200f50>] (start_kernel+0x41c/0x430) Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | soc/tegra: pmc: Add sysfs entries for reset infoSandipan Patra2018-11-081-1/+128
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement read-only reset_reason and reset_level sysfs attributes that can be used to query the reset reason and level at runtime. Signed-off-by: Sandipan Patra <spatra@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | | soc/tegra: pmc: Don't power-up XUSB power-domainsJon Hunter2018-11-081-16/+0
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that the Tegra xHCI driver manages the XUSB power-domains itself, remove the code to power-up the power-domains used by the xHCI device from the PMC driver on boot. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| * | | Merge tag 'renesas-drivers-for-v4.21' of ↵Olof Johansson2018-12-125-75/+29
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers Renesas ARM Based SoC Drivers Updates for v4.21 SYSC Driver: * Common - Fix power domain control after system resume - Merge PM Domain registration and linking - Remove rcar_sysc_power_{down,up}() helpers * R-Car E3 (r8a77990) SoC - Fix initialization order of 3DG-{A,B} * R-Car V3H (r8a77980) SoC - Correct A3VIP[012] power domain hierarchy - Correct names of A2DP[01] power domains * R-Car V3M (r8a77970) SoC - Correct names of A2DP/A2CN power domains - emove non-existent CR7 power domain * R-Car M3-N (r8a77965) SoC - Remove non-existent A3IR power domain * tag 'renesas-drivers-for-v4.21' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: soc: renesas: rcar-sysc: Fix power domain control after system resume soc: renesas: rcar-sysc: Merge PM Domain registration and linking soc: renesas: rcar-sysc: Remove rcar_sysc_power_{down,up}() helpers soc: renesas: r8a77990-sysc: Fix initialization order of 3DG-{A,B} soc: renesas: r8a77980-sysc: Correct A3VIP[012] power domain hierarchy soc: renesas: r8a77980-sysc: Correct names of A2DP[01] power domains soc: renesas: r8a77970-sysc: Correct names of A2DP/A2CN power domains soc: renesas: r8a77970-sysc: Remove non-existent CR7 power domain soc: renesas: r8a77965-sysc: Remove non-existent A3IR power domain Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | soc: renesas: rcar-sysc: Fix power domain control after system resumeGeert Uytterhoeven2018-12-061-19/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To control power to a power domain, the System Controller (SYSC) needs the corresponding interrupt source to be enabled, but masked, to prevent the CPU from receiving it. Currently this is handled in the driver's probe() routine, and set up for every domain present, even if it will not be controlled directly by SYSC (CPU domains are powered through the APMU on R-Car Gen2 and later). On R-Car Gen3, PSCI powers down the SoC during system suspend, thus losing any configured interrupt state. Hence after system resume, power domains not controlled through the APMU (e.g. A3IR, A3VC, A3VP) fail to power up. Fix this by replacing the global interrupt setup in the probe() routine by a domain-specific interrupt setup in rcar_sysc_power(), where the domain's power is actually controlled. This brings the code more in line with the flowchart in the Hardware User's Manual. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | | soc: renesas: rcar-sysc: Merge PM Domain registration and linkingGeert Uytterhoeven2018-12-061-13/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 977d5ba4507dfe5b ("soc: renesas: rcar-sysc: Make PM domain initialization more robust") split PM Domain registration and the linking of children to their parents, to accommodate PM Domain tables that list child domains before their parents. However, this failed to realize that parent power domains must be powered up before their children anyway, and that this thus must be reflected by the order in the PM Domain tables. Revert the split, as it did not help anyway. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | | soc: renesas: rcar-sysc: Remove rcar_sysc_power_{down,up}() helpersGeert Uytterhoeven2018-12-061-15/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Until commit 7e8a50df26f4e700 ("soc: renesas: rcar-sysc: Drop legacy handling"), the rcar_sysc_power_{down,up}() helpers were public, as they were called by the legacy (pre-DT) CPU power management code on R-Car H1 and R-Car Gen2 before. As they are just one-line wrappers around rcar_sysc_power(), it makes sense to just remove them. This also avoids a bool/helper/bool conversion in rcar_sysc_power_cpu(), where a bool is checked to call one of two helper functions, which just call rcar_sysc_power() with hardcoded boolean values again. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | | soc: renesas: r8a77990-sysc: Fix initialization order of 3DG-{A,B}Geert Uytterhoeven2018-12-061-19/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The workaround for the wrong hierarchy of the 3DG-{A,B} power domains on R-Car E3 ES1.0 corrected the parent domains. However, the 3DG-{A,B} power domains were still initialized and powered in the wrong order, causing 3DG operation to fail. Fix this by changing the order in the table at runtime, when running on an affected SoC. Fixes: 086b399965a7ee7e ("soc: renesas: r8a77990-sysc: Add workaround for 3DG-{A,B}") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | | soc: renesas: r8a77980-sysc: Correct A3VIP[012] power domain hierarchyGeert Uytterhoeven2018-11-301-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018) renamed the A3VIP power domain on R-Car V3H to A3VIP0, and clarified the power domain hierarchy for the A3VIP[012] power domains. As the definition for the A3VIP0 domain is not yet used from DT, it can just be renamed. Fixes: 7755b40d07a8dba7 ("dt-bindings: power: add R8A77980 SYSC power domain definitions") Fixes: 41d6d8bd8ae94ca9 ("soc: renesas: rcar-sysc: add R8A77980 support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | | soc: renesas: r8a77980-sysc: Correct names of A2DP[01] power domainsGeert Uytterhoeven2018-11-301-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018) renamed the A2PD0 and A2DP0 power domains on R-Car V3H to A2DP0 resp. A2DP1. As these definitions are not yet used from DT, they can just be renamed. Fixes: 7755b40d07a8dba7 ("dt-bindings: power: add R8A77980 SYSC power domain definitions") Fixes: 41d6d8bd8ae94ca9 ("soc: renesas: rcar-sysc: add R8A77980 support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | | soc: renesas: r8a77970-sysc: Correct names of A2DP/A2CN power domainsGeert Uytterhoeven2018-11-301-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018) renamed the A2IR2 and A2IR3 power domains on R-Car V3M to A2DP resp. A2CN. As these definitions are not yet used from DT, they can just be renamed. While at it, fix the indentation of the A3IR definition. Fixes: 833bdb47c826a1a6 ("dt-bindings: power: add R8A77970 SYSC power domain definitions") Fixes: bab9b2a74fe9da96 ("soc: renesas: rcar-sysc: add R8A77970 support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | | soc: renesas: r8a77970-sysc: Remove non-existent CR7 power domainGeert Uytterhoeven2018-11-301-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018) removed the CR7 power domain on R-Car V3M, as this SoC does not have an ARM Cortex-R7 Realtime Core. As this definition was never used from DT, it can just be removed. Fixes: 833bdb47c826a1a6 ("dt-bindings: power: add R8A77970 SYSC power domain definitions") Fixes: bab9b2a74fe9da96 ("soc: renesas: rcar-sysc: add R8A77970 support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | | soc: renesas: r8a77965-sysc: Remove non-existent A3IR power domainGeert Uytterhoeven2018-11-301-1/+0
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018) removed the A3IR power domain on R-Car M3-N, as this SoC does not have an Image Processing Unit (IMP-X5). The definition in the DT bindings header cannot be removed yet, until its (incorrect) user has been removed. Fixes: a527709b78b3c997 ("soc: renesas: rcar-sysc: Add R-Car M3-N support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | | Merge tag 'qcom-drivers-for-4.21' of ↵Olof Johansson2018-12-036-84/+59
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/drivers Qualcomm ARM Based Driver Updates for v4.21 * Fix llcc license, includes, and error checks * Remove use of memcpy in cmd-db and fix API breakage * Add QCS404 compatible to SMD-RPM * Minor fixes for QMI * Add irq clear handling in QCOM Geni SE during init * tag 'qcom-drivers-for-4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux: drm: msm: Check cmd_db_read_aux_data() for failure soc: qcom: smd-rpm: Add QCS404 compatible soc: qcom: llcc-slice: Remove duplicated include from llcc-slice.c soc: qcom: cmd-db: Stop memcpy()ing in cmd_db_read_aux_data() soc: qcom: cmd-db: Remove memcpy()ing from cmd_db_get_header() soc: qcom: Drop help text for QCOM_QMI_HELPERS soc: qcom: qmi_interface: Limit txn ids to U16_MAX soc: qcom: llcc-slice: Add error checks for API functions soc: qcom/llcc: add MODULE_LICENSE tag soc: qcom: Add irq clear handling during SE init Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | soc: qcom: smd-rpm: Add QCS404 compatibleBjorn Andersson2018-11-291-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a compatible for the rpm on the Qualcomm QCS404 platform. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
| | * | | soc: qcom: llcc-slice: Remove duplicated include from llcc-slice.cYueHaibing2018-11-281-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove duplicated include. Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: Andy Gross <andy.gross@linaro.org>
| | * | | soc: qcom: cmd-db: Stop memcpy()ing in cmd_db_read_aux_data()Stephen Boyd2018-11-141-35/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let's change the function signature to return the pointer to memory or an error pointer on failure, and take an argument that lets us return the size of the aux data read. This way we can remove the cmd_db_read_aux_data_len() API entirely and also get rid of the memcpy operation from cmd_db to the caller. Updating the only user of this code shows that making this change allows us to remove a function and put the lookup where the user is. Cc: Mahesh Sivasubramanian <msivasub@codeaurora.org> Cc: Lina Iyer <ilina@codeaurora.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Evan Green <evgreen@chromium.org> Cc: Jordan Crouse <jcrouse@codeaurora.org> Cc: Rob Clark <robdclark@gmail.com> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
| | * | | soc: qcom: cmd-db: Remove memcpy()ing from cmd_db_get_header()Stephen Boyd2018-11-141-34/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The cmd_db_get_header() function is a static local function that doesn't need to copy anything from one place to another. Instead, it can just point into the region by returning pointers to what we're looking for. If we do that, we should mark what we're returning as const so that code can't modify cmd-db without an obvious cast. Cc: Mahesh Sivasubramanian <msivasub@codeaurora.org> Cc: Lina Iyer <ilina@codeaurora.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Evan Green <evgreen@chromium.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-08-09 22:43:03 +0000