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* Merge tag 'char-misc-6.8-rc1' of ↵Linus Torvalds2024-01-172-8/+27
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc Pull char/misc and other driver updates from Greg KH: "Here is the big set of char/misc and other driver subsystem changes for 6.8-rc1. Other than lots of binder driver changes (as you can see by the merge conflicts) included in here are: - lots of iio driver updates and additions - spmi driver updates - eeprom driver updates - firmware driver updates - ocxl driver updates - mhi driver updates - w1 driver updates - nvmem driver updates - coresight driver updates - platform driver remove callback api changes - tags.sh script updates - bus_type constant marking cleanups - lots of other small driver updates All of these have been in linux-next for a while with no reported issues" * tag 'char-misc-6.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (341 commits) android: removed duplicate linux/errno uio: Fix use-after-free in uio_open drivers: soc: xilinx: add check for platform firmware: xilinx: Export function to use in other module scripts/tags.sh: remove find_sources scripts/tags.sh: use -n to test archinclude scripts/tags.sh: add local annotation scripts/tags.sh: use more portable -path instead of -wholename scripts/tags.sh: Update comment (addition of gtags) firmware: zynqmp: Convert to platform remove callback returning void firmware: turris-mox-rwtm: Convert to platform remove callback returning void firmware: stratix10-svc: Convert to platform remove callback returning void firmware: stratix10-rsu: Convert to platform remove callback returning void firmware: raspberrypi: Convert to platform remove callback returning void firmware: qemu_fw_cfg: Convert to platform remove callback returning void firmware: mtk-adsp-ipc: Convert to platform remove callback returning void firmware: imx-dsp: Convert to platform remove callback returning void firmware: coreboot_table: Convert to platform remove callback returning void firmware: arm_scpi: Convert to platform remove callback returning void firmware: arm_scmi: Convert to platform remove callback returning void ...
| * drivers: soc: xilinx: add check for platformJay Buddhabhatti2024-01-041-5/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | Some error event IDs for Versal and Versal NET are different. Both the platforms should access their respective error event IDs so use sub_family_code to check for platform and check error IDs for respective platforms. The family code is passed via platform data to avoid platform detection again. Platform data is setup when even driver is registered. Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com> Link: https://lore.kernel.org/r/20231219055025.27570-3-jay.buddhabhatti@amd.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| * drivers: soc: xilinx: Fix error message on SGI registration failureJay Buddhabhatti2023-12-071-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Failure to register SGI for firmware event notification is non-fatal error when feature is not supported by other modules such as Xen and TF-A. Add _info level log message for such special case. Also add XST_PM_INVALID_VERSION error code and map it to -EOPNOSUPP Linux kernel error code. If feature is not supported or EEMI API version is mismatch, firmware can return XST_PM_INVALID_VERSION = 4 or XST_PM_NO_FEATURE = 19 error code. Co-developed-by: Tanmay Shah <tanmay.shah@amd.com> Signed-off-by: Tanmay Shah <tanmay.shah@amd.com> Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com> Link: https://lore.kernel.org/r/20231129112713.22718-5-jay.buddhabhatti@amd.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| * firmware: xilinx: Update firmware call interface to support additional argsJay Buddhabhatti2023-12-072-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | System-level platform management layer (do_fw_call()) has support for maximum of 5 arguments as of now (1 EEMI API ID + 4 command arguments). In order to support new EEMI PM_IOCTL IDs (Secure Read/Write), this support must be extended to support one additional argument, which results in a configuration of - 1 EEMI API ID + 5 command arguments. Update zynqmp_pm_invoke_fn() and do_fw_call() with this new definition containing variable arguments. As a result, update all the references to pm invoke function with the updated definition. Co-developed-by: Izhar Ameer Shaikh <izhar.ameer.shaikh@amd.com> Signed-off-by: Izhar Ameer Shaikh <izhar.ameer.shaikh@amd.com> Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com> Link: https://lore.kernel.org/r/20231129112713.22718-2-jay.buddhabhatti@amd.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* | Merge tag 'drm-next-2024-01-10' of git://anongit.freedesktop.org/drm/drmLinus Torvalds2024-01-122-24/+10
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull drm updates from Dave Airlie: "This contains two major new drivers: - imagination is a first driver for Imagination Technologies devices, it only covers very specific devices, but there is hope to grow it - xe is a reboot of the i915 GPU (shares display) side using a more upstream focused development model, and trying to maximise code sharing. It's not enabled for any hw by default, and will hopefully get switched on for Intel's Lunarlake. This also drops a bunch of the old UMS ioctls. It's been dead long enough. amdgpu has a bunch of new color management code that is being used in the Steam Deck. amdgpu also has a new ACPI WBRF interaction to help avoid radio interference. Otherwise it's the usual lots of changes in lots of places. Detailed summary: new drivers: - imagination - new driver for Imagination Technologies GPU - xe - new driver for Intel GPUs using core drm concepts core: - add CLOSE_FB ioctl - remove old UMS ioctls - increase max objects to accomodate AMD color mgmt encoder: - create per-encoder debugfs directory edid: - split out drm_eld - SAD helpers - drop edid_firmware module parameter format-helper: - cache format conversion buffers sched: - move from kthread to workqueue - rename some internals - implement dynamic job-flow control gpuvm: - provide more features to handle GEM objects client: - don't acquire module reference displayport: - add mst path property documentation fdinfo: - alignment fix dma-buf: - add fence timestamp helper - add fence deadline support bridge: - transparent aux-bridge for DP/USB-C - lt8912b: add suspend/resume support and power regulator support panel: - edp: AUO B116XTN02, BOE NT116WHM-N21,836X2, NV116WHM-N49 - chromebook panel support - elida-kd35t133: rework pm - powkiddy RK2023 panel - himax-hx8394: drop prepare/unprepare and shutdown logic - BOE BP101WX1-100, Powkiddy X55, Ampire AM8001280G - Evervision VGG644804, SDC ATNA45AF01 - nv3052c: register docs, init sequence fixes, fascontek FS035VG158 - st7701: Anbernic RG-ARC support - r63353 panel controller - Ilitek ILI9805 panel controller - AUO G156HAN04.0 simplefb: - support memory regions - support power domains amdgpu: - add new 64-bit sequence number infrastructure - add AMD specific color management - ACPI WBRF support for RF interference handling - GPUVM updates - RAS updates - DCN 3.5 updates - Rework PCIe link speed handling - Document GPU reset types - DMUB fixes - eDP fixes - NBIO 7.9/7.11 updates - SubVP updates - XGMI PCIe state dumping for aqua vanjaram - GFX11 golden register updates - enable tunnelling on high pri compute amdkfd: - Migrate TLB flushing logic to amdgpu - Trap handler fixes - Fix restore workers handling on suspend/resume - Fix possible memory leak in pqm_uninit() - support import/export of dma-bufs using GEM handles radeon: - fix possible overflows in command buffer checking - check for errors in ring_lock i915: - reorg display code for reuse in xe driver - fdinfo memory stats printing - DP MST bandwidth mgmt improvements - DP panel replay enabling - MTL C20 phy state verification - MTL DP DSC fractional bpp support - Audio fastset support - use dma_fence interfaces instead of i915_sw_fence - Separate gem and display code - AUX register macro refactoring - Separate display module/device parameters - Move display capabilities debugfs under display - Makefile cleanups - Register cleanups - Move display lock inits under display/ - VLV/CHV DPIO PHY register and interface refactoring - DSI VBT sequence refactoring - C10/C20 PHY PLL hardware readout - DPLL code cleanups - Cleanup PXP plane protection checks - Improve display debug msgs - PSR selective fetch fixes/improvements - DP MST fixes - Xe2LPD FBC restrictions removed - DGFX uses direct VBT pin mapping - more MTL WAs - fix MTL eDP bug - eliminate use of kmap_atomic habanalabs: - sysfs entry to identify a device minor id with debugfs path - sysfs entry to expose device module id - add signed device info retrieval through INFO ioctl - add Gaudi2C device support - pcie reset prepare/done hooks msm: - Add support for SDM670, SM8650 - Handle the CFG interconnect to fix the obscure hangs / timeouts - Kconfig fix for QMP dependency - use managed allocators - DPU: SDM670, SM8650 support - DPU: Enable SmartDMA on SM8350 and SM8450 - DP: enable runtime PM support - GPU: add metadata UAPI - GPU: move devcoredumps to GPU device - GPU: convert to drm_exec ivpu: - update FW API - new debugfs file - a new NOP job submission test mode - improve suspend/resume - PM improvements - MMU PT optimizations - firmware profile frequency support - support for uncached buffers - switch to gem shmem helpers - replace kthread with threaded irqs rockchip: - rk3066_hdmi: convert to atomic - vop2: support nv20 and nv30 - rk3588 support mediatek: - use devm_platform_ioremap_resource - stop using iommu_present - MT8188 VDOSYS1 display support panfrost: - PM improvements - improve interrupt handling as poweroff qaic: - allow to run with single MSI - support host/device time sync - switch to persistent DRM devices exynos: - fix potential error pointer dereference - fix wrong error checking - add missing call to drm_atomic_helper_shutdown omapdrm: - dma-fence lockdep annotation fix tidss: - dma-fence lockdep annotation fix - support for AM62A7 v3d: - BCM2712 - rpi5 support - fdinfo + gputop support - uapi for CPU job handling virtio-gpu: - add context debug name" * tag 'drm-next-2024-01-10' of git://anongit.freedesktop.org/drm/drm: (2340 commits) drm/amd/display: Allow z8/z10 from driver drm/amd/display: fix bandwidth validation failure on DCN 2.1 drm/amdgpu: apply the RV2 system aperture fix to RN/CZN as well drm/amd/display: Move fixpt_from_s3132 to amdgpu_dm drm/amd/display: Fix recent checkpatch errors in amdgpu_dm Revert "drm/amdkfd: Relocate TBA/TMA to opposite side of VM hole" drm/amd/display: avoid stringop-overflow warnings for dp_decide_lane_settings() drm/amd/display: Fix power_helpers.c codestyle drm/amd/display: Fix hdcp_log.h codestyle drm/amd/display: Fix hdcp2_execution.c codestyle drm/amd/display: Fix hdcp_psp.h codestyle drm/amd/display: Fix freesync.c codestyle drm/amd/display: Fix hdcp_psp.c codestyle drm/amd/display: Fix hdcp1_execution.c codestyle drm/amd/pm/smu7: fix a memleak in smu7_hwmgr_backend_init drm/amdkfd: Fix iterator used outside loop in 'kfd_add_peer_prop()' drm/amdgpu: Drop 'fence' check in 'to_amdgpu_amdkfd_fence()' drm/amdkfd: Confirm list is non-empty before utilizing list_first_entry in kfd_topology.c drm/amdgpu: Fix '*fw' from request_firmware() not released in 'amdgpu_ucode_request()' drm/amdgpu: Fix variable 'mca_funcs' dereferenced before NULL check in 'amdgpu_mca_smu_get_mca_entry()' ...
| * | soc: qcom: pmic-glink: switch to DRM_AUX_HPD_BRIDGEDmitry Baryshkov2023-12-042-24/+10
| |/ | | | | | | | | | | | | | | | | | | Use the freshly defined DRM_AUX_HPD_BRIDGE instead of open-coding the same functionality for the DRM bridge chain termination. Reviewed-by: Bjorn Andersson <andersson@kernel.org> Acked-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20231203114333.1305826-6-dmitry.baryshkov@linaro.org
* | Merge tag 'soc-arm-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds2024-01-111-2/+2
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM SoC code updates from Arnd Bergmann: "There are two notable changes this time: - add a arch/arm/Kconfig.platforms file to simplify the platforms that have no code except their Kconfig file (Andrew Davis) - remove support for the ARM11MPCore CPU in the versatile/realview platform. Since this is the last remaining one after removing ox820, some core code can go as well (Linus Walleij) The other changes are minor cleanups and bugfixes" * tag 'soc-arm-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: ARM: davinci: always select CONFIG_CPU_ARM926T soc: pxa: ssp: fix casts ARM: debug: fix DEBUG_UNCOMPRESS help for !MULTIPLATFORM ARM: MAINTAINERS: drop empty entries for removed boards ARM: Delete ARM11MPCore perf leftovers ARM: mach-nspire: Rework support and directory structure ARM: mach-sunplus: Rework support and directory structure ARM: mach-airoha: Rework support and directory structure ARM: mach-moxart: Move MOXA ART support into Kconfig.platforms ARM: mach-uniphier: Move Socionext UniPhier support into Kconfig.platforms ARM: mach-rda: Move RDA Micro support into Kconfig.platforms ARM: mach-asm9260: Move ASM9260 support into Kconfig.platforms ARM: Kconfig: move platform selection into its own Kconfig file ARM: Delete ARM11MPCore (ARM11 ARMv6K SMP) support MAINTAINERS: add Marvell MBus driver to Marvell EBU SoCs support ARM: mxs: Do not search for "fsl,clkctrl" ARM: imx: Use device_get_match_data() MAINTAINERS: add omap bus drivers to OMAP2+ SUPPORT ARM: at91: pm: set soc_pm.data.mode in at91_pm_secure_init()
| * | soc: pxa: ssp: fix castsDuje Mihanović2024-01-091-2/+2
| |/ | | | | | | | | | | | | | | | | | | | | | | On ARM64 platforms, id->data is a 64-bit value and casting it to a 32-bit integer causes build errors. Cast it to uintptr_t instead. The id->driver_data cast is unnecessary, so drop it. Signed-off-by: Duje Mihanović <duje.mihanovic@skole.hr> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/20240106-pxa-ssp-v2-1-69ac9f028bba@skole.hr Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* | Merge tag 'riscv-cache-for-v6.8' of ↵Arnd Bergmann2023-12-225-287/+0
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/drivers RISC-V cache drivers for v6.8 The SiFive composable cache driver moves to the cache driver subdirectory from the drivers/soc and grows support for non-coherent cache operations. The immediate user for these is the jh7100 SoC, that a rake of people have on VisionFive v1 or Beagle-V Starlight boards. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> * tag 'riscv-cache-for-v6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux: riscv: errata: Make ERRATA_STARFIVE_JH7100 depend on !DMA_DIRECT_REMAP riscv: errata: Add StarFive JH7100 errata soc: sifive: ccache: Add StarFive JH7100 support dt-bindings: cache: sifive,ccache0: Add StarFive JH7100 compatible soc: sifive: shunt ccache driver to drivers/cache Link: https://lore.kernel.org/r/20231221-catatonic-monday-d4c61283b136@spud Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | soc: sifive: shunt ccache driver to drivers/cacheConor Dooley2023-11-225-287/+0
| |/ | | | | | | | | | | | | | | | | | | Move the ccache driver over to drivers/cache, out of the drivers/soc dumping ground, to this new collection point for cache controller drivers. Reviewed-by: Samuel Holland <samuel.holland@sifive.com> Tested-by: Samuel Holland <samuel.holland@sifive.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
* | Merge tag 'riscv-soc-drivers-for-v6.8' of ↵Arnd Bergmann2023-12-222-3/+31
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/drivers RISC-V SoC drivers for v6.8 There's only one set of changes here, the addition of "Auto Update" support for PolarFire SoC. Auto Update is one of the ways that the FPGA bitstream can be updated, and the only one suitable for use from Linux as it does not immediately initiate a reboot when started. The driver was not accepted in the FPGA manager subsystem as the update only occurs after a reboot and makes no use of the FPGA manager framework. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> * tag 'riscv-soc-drivers-for-v6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux: MAINTAINERS: add auto-update driver to mpfs entry firmware: microchip: Replace of_device.h with explicit include firmware: microchip: add PolarFire SoC Auto Update support soc: microchip: mpfs: add auto-update subdev to system controller soc: microchip: mpfs: print service status in warning message soc: microchip: mpfs: enable access to the system controller's flash dt-bindings: soc: microchip: add a property for system controller flash firmware_loader: Expand Firmware upload error codes with firmware invalid error Link: https://lore.kernel.org/r/20231221-droop-unblock-81e4fe14acee@spud Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | soc: microchip: mpfs: add auto-update subdev to system controllerConor Dooley2023-12-061-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PolarFire SoC's system controller offers the ability to re-program the FPGA from a user application via two, related, mechanisms. In-Application Programming (IAP) is not ideal for use in Linux, as it will immediately take down the system when requested. Auto Update is preferred, as it will only take affect at device power up*, allowing the OS (and potential applications in AMP) to be shut down gracefully. * Auto Update occurs at device initialisation, which can also be triggered by device reset - possible with the v2023.02 version of the Hart Software Services (HSS) and reference design. Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
| * | soc: microchip: mpfs: print service status in warning messageConor Dooley2023-12-061-1/+3
| | | | | | | | | | | | | | | | | | | | | Now that resp_status is set for failed services, print the status in the error path's warning. Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
| * | soc: microchip: mpfs: enable access to the system controller's flashConor Dooley2023-12-062-0/+21
| |/ | | | | | | | | | | | | | | | | The system controller has a flash that contains images used to reprogram the FPGA using IAP (In-Application Programming). Introduce a function that allows a driver with a reference to the system controller to get one to a flash device attached to it. Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
* | Merge tag 'samsung-drivers-6.8' of ↵Arnd Bergmann2023-12-221-0/+1
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/drivers Samsung SoC driver changes for v6.8 1. Add support for Google GS101 SoC to different drivers: clock controller, serial and watchdog. The clock driver changes depend on few bindings headers, which I put in a topic branch with the bindings refactoring and GS101 support, therefore this this pull request includes that bindings topic branch. The rest of the bindings topic branch is not necessary here, however keeping everything together makes it easier to share between branches. The bindings topic branch is mostly refactoring all the compatibles to add SoC-specific compatible followed by fallback. 2. Exynos ChipID: recognize ExynosAutov920. * tag 'samsung-drivers-6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (40 commits) dt-bindings: clock: google,gs101: rename CMU_TOP gate defines watchdog: s3c2410_wdt: Add support for Google gs101 SoC watchdog: s3c2410_wdt: Update QUIRK macros to use BIT macro watchdog: s3c2410_wdt: Add support for WTCON register DBGACK_MASK bit tty: serial: samsung: Add gs101 compatible and common fifoszdt_serial_drv_data clk: samsung: clk-gs101: Add cmu_top, cmu_misc and cmu_apm support clk: samsung: clk-pll: Add support for pll_{0516,0517,518} dt-bindings: clock: google,gs101: fix incorrect numbering and DGB suffix dt-bindings: soc: samsung: usi: add google,gs101-usi compatible dt-bindings: serial: samsung: Make samsung,uart-fifosize a required property dt-bindings: serial: samsung: Add google-gs101-uart compatible dt-bindings: watchdog: Document Google gs101 watchdog bindings dt-bindings: samsung: exynos-sysreg: combine exynosautov920 with other enum dt-bindings: soc: google: exynos-sysreg: add dedicated SYSREG compatibles to GS101 dt-bindings: clock: Add Google gs101 clock management unit bindings dt-bindings: soc: samsung: exynos-pmu: Add gs101 compatible dt-bindings: watchdog: samsung: add specific compatible for Tesla FSD dt-bindings: samsung: exynos-pmu: add specific compatible for Tesla FSD dt-bindings: serial: samsung: add specific compatible for Tesla FSD dt-bindings: pwm: samsung: add specific compatible for Tesla FSD ... Link: https://lore.kernel.org/r/20231220084722.22149-1-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | soc: samsung: exynos-chipid: add exynosautov920 SoC supportJaewon Kim2023-11-151-0/+1
| |/ | | | | | | | | | | | | | | | | Add EXYNOSAUTOV920 information to soc_ids tables. This SoC product id is "0x0A920000". Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com> Link: https://lore.kernel.org/r/20231115095609.39883-10-jaewon02.kim@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
* | Merge tag 'qcom-drivers-for-6.8' of ↵Arnd Bergmann2023-12-228-22/+345
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers Qualcomm driver updates for v6.8 Support for SM8650 and X1E is added to the LLCC driver, the LLCC_TRP_ATTR2_CFGn register stride is corrected, and a bug where for each iteration looping over slices previous settings for dis_cap_alloc and retain_on_pc are overwritten. A quirk is introduced in UCSI, for implementations that does not handle UCSI_GET_PDOS for non-PD partners. With this, USCI support is enabled by default in pmic_glink. It is later reverted for SC8280XP due reported errors. A few memory leaks in error paths of qseecom are taken care of. A small driver to expose the ADSP PDCharger ULOG debug log is introduced, to aid debugging issues with pmic_glink. The identiy of SM8650, PM8937 and a few DSPs are added to the Qualcomm socinfo driver. The Qualcomm sleep stats driver is extended to allow getting detailed statistics about usage of various DDR states. Unfortunately this ABI does not seem to be stable across platforms, so this addition is dropped again while the reported problems are investigated further. Andy is moved from MAINTAINERS to CREDITS. Thank you, Andy. * tag 'qcom-drivers-for-6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (34 commits) soc: qcom: llcc: Fix LLCC_TRP_ATTR2_CFGn offset firmware: qcom: qseecom: fix memory leaks in error paths soc: qcom: llcc: Fix typo in kernel-doc dt-bindings: soc: qcom,aoss-qmp: document the X1E80100 Always-On Subsystem side channel MAINTAINERS: qcom: move Andy Gross to credits soc: qcom: pmic_glink: drop stray semicolons soc: qcom: pmic_glink: disable UCSI on sc8280xp soc: qcom: llcc: Fix dis_cap_alloc and retain_on_pc configuration soc: qcom: pmic_pdcharger_ulog: Fix hypothetical ulog request message endianess soc: qcom: pmic_pdcharger_ulog: Move TRACE_SYSTEM out of #if protection soc: qcom: pmic_pdcharger_ulog: Search current directory for headers soc: qcom: socinfo: Add few DSPs to get their image details soc: qcom: llcc: Add missing description for members in slice config Revert "soc: qcom: stats: Add DDR sleep stats" dt-bindings: firmware: qcom,scm: Allow interconnect for everyone dt-bindings: firmware: qcom,scm: document SCM on X1E80100 SoCs soc: qcom: socinfo: Add PM8937 Power IC soc: qcom: llcc: Add configuration data for X1E80100 dt-bindings: cache: qcom,llcc: Add X1E80100 compatible soc: qcom: pmic_glink_altmode: fix port sanity check ... Link: https://lore.kernel.org/r/20231219041855.732578-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | soc: qcom: llcc: Fix LLCC_TRP_ATTR2_CFGn offsetAbel Vesa2023-12-181-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to documentation, it has increments of 4, not 8. Fixes: c72ca343f911 ("soc: qcom: llcc: Add v4.1 HW version support") Reported-by: Unnathi Chalicheemala <quic_uchalich@quicinc.com> Reviewed-by: Satya Durga Srinivasu Prabhala <quic_satyap@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20231012160509.184891-1-abel.vesa@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
| * | soc: qcom: llcc: Fix typo in kernel-docGhanshyam Agrawal2023-12-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Fixed spelling of "descriptor". Signed-off-by: Ghanshyam Agrawal <ghanshyam1898@gmail.com> Link: https://lore.kernel.org/r/20231215070707.560350-1-ghanshyam1898@gmail.com [bjorn: Rewrote commit message] Signed-off-by: Bjorn Andersson <andersson@kernel.org>
| * | soc: qcom: pmic_glink: drop stray semicolonsJohan Hovold2023-12-152-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | Drop stray semicolons after function definitions to avoid having this be reproduced elsewhere. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20231208125827.10363-1-johan+linaro@kernel.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
| * | soc: qcom: pmic_glink: disable UCSI on sc8280xpJohan Hovold2023-12-151-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enabling UCSI on sc8280xp and the Lenovo ThinkPad X13s in particular results in a number of errors and timeouts during boot: [ 9.012421] ucsi_glink.pmic_glink_ucsi pmic_glink.ucsi.0: GET_CONNECTOR_STATUS failed (-95) [ 14.047379] ucsi_glink.pmic_glink_ucsi pmic_glink.ucsi.0: timeout waiting for UCSI sync write response [ 14.050708] ucsi_glink.pmic_glink_ucsi pmic_glink.ucsi.0: GET_CONNECTOR_STATUS failed (-110) [ 20.192382] ucsi_glink.pmic_glink_ucsi pmic_glink.ucsi.0: timeout waiting for UCSI sync write response [ 20.192542] ucsi_glink.pmic_glink_ucsi pmic_glink.ucsi.0: GET_CONNECTOR_STATUS failed (-110) Disable UCSI on sc8280xp until this has been resolved. Fixes: 4db09e7b967b ("soc: qcom: pmic_glink: enable UCSI by default) Link: https://lore.kernel.org/r/ZXL5jvDHr-MuxMoz@hovoldconsulting.com Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20231208125730.10323-1-johan+linaro@kernel.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
| * | soc: qcom: llcc: Fix dis_cap_alloc and retain_on_pc configurationAtul Dhudase2023-12-151-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit c14e64b46944 ("soc: qcom: llcc: Support chipsets that can write to llcc") add the support for chipset where capacity based allocation and retention through power collapse can be programmed based on content of SCT table mentioned in the llcc driver where the target like sdm845 where the entire programming related to it is controlled in firmware. However, the commit introduces a bug where capacity/retention register get overwritten each time it gets programmed for each slice and that results in misconfiguration of the register based on SCT table and that is not expected behaviour instead it should be read modify write to retain the configuration of other slices. This issue is totally caught from code review and programming test and not through any power/perf numbers so, it is not known what impact this could make if we don't have this change however, this feature are for these targets and they should have been programmed accordingly as per their configuration mentioned in SCT table like others bits information. This change brings one difference where it keeps capacity/retention bits of the slices that are not mentioned in SCT table in unknown state where as earlier it was initialized to zero. Fixes: c14e64b46944 ("soc: qcom: llcc: Support chipsets that can write to llcc") Signed-off-by: Atul Dhudase <quic_adhudase@quicinc.com> Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/1701876771-10695-1-git-send-email-quic_mojha@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
| * | soc: qcom: pmic_pdcharger_ulog: Fix hypothetical ulog request message endianessAndrew Halaney2023-12-151-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sparse reports the following: % ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- make C=2 W=1 drivers/soc/qcom/pmic_pdcharger_ulog.o ... CC drivers/soc/qcom/pmic_pdcharger_ulog.o CHECK drivers/soc/qcom/pmic_pdcharger_ulog.c drivers/soc/qcom/pmic_pdcharger_ulog.c:57:34: warning: incorrect type in initializer (different base types) drivers/soc/qcom/pmic_pdcharger_ulog.c:57:34: expected restricted __le32 [usertype] owner drivers/soc/qcom/pmic_pdcharger_ulog.c:57:34: got int drivers/soc/qcom/pmic_pdcharger_ulog.c:58:33: warning: incorrect type in initializer (different base types) drivers/soc/qcom/pmic_pdcharger_ulog.c:58:33: expected restricted __le32 [usertype] type drivers/soc/qcom/pmic_pdcharger_ulog.c:58:33: got int drivers/soc/qcom/pmic_pdcharger_ulog.c:59:35: warning: incorrect type in initializer (different base types) drivers/soc/qcom/pmic_pdcharger_ulog.c:59:35: expected restricted __le32 [usertype] opcode drivers/soc/qcom/pmic_pdcharger_ulog.c:59:35: got int Let's deal with endianness conversion in the rare case this ever runs on a big-endian machine (and to quiet down sparse for this file). Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202312060355.M0eJtq4X-lkp@intel.com/ Fixes: 086fdb48bc65 ("soc: qcom: add ADSP PDCharger ULOG driver") Signed-off-by: Andrew Halaney <ahalaney@redhat.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20231205-pmicpdcharger-ulog-fixups-v1-3-71c95162cb84@redhat.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
| * | soc: qcom: pmic_pdcharger_ulog: Move TRACE_SYSTEM out of #if protectionAndrew Halaney2023-12-151-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As specified in samples/trace_events/trace-events-sample.h: * Notice that TRACE_SYSTEM should be defined outside of #if * protection, just like TRACE_INCLUDE_FILE. Fixes: 086fdb48bc65 ("soc: qcom: add ADSP PDCharger ULOG driver") Signed-off-by: Andrew Halaney <ahalaney@redhat.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20231205-pmicpdcharger-ulog-fixups-v1-2-71c95162cb84@redhat.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
| * | soc: qcom: pmic_pdcharger_ulog: Search current directory for headersAndrew Halaney2023-12-151-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As specified in samples/trace_events/Makefile: If you include a trace header outside of include/trace/events then the file that does the #define CREATE_TRACE_POINTS must have that tracer file in its main search path. This is because define_trace.h will include it, and must be able to find it from the include/trace directory. Without this the following compilation error is seen: CC drivers/soc/qcom/pmic_pdcharger_ulog.o In file included from drivers/soc/qcom/pmic_pdcharger_ulog.h:36, from drivers/soc/qcom/pmic_pdcharger_ulog.c:15: ./include/trace/define_trace.h:95:42: fatal error: ./pmic_pdcharger_ulog.h: No such file or directory 95 | #include TRACE_INCLUDE(TRACE_INCLUDE_FILE) | ^ compilation terminated. Fixes: 086fdb48bc65 ("soc: qcom: add ADSP PDCharger ULOG driver") Signed-off-by: Andrew Halaney <ahalaney@redhat.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20231205-pmicpdcharger-ulog-fixups-v1-1-71c95162cb84@redhat.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
| * | soc: qcom: socinfo: Add few DSPs to get their image detailsNaman Jain2023-12-151-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support to get image details from SMEM for DSPs like DSPS (Sensors DSP), CDSP (Compute DSP), GPDSP (General purpose DSP) while also supporting this for more than one DSP of certain types. Signed-off-by: Naman Jain <quic_namajain@quicinc.com> Link: https://lore.kernel.org/r/20231205101018.6079-1-quic_namajain@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
| * | soc: qcom: llcc: Add missing description for members in slice configAbel Vesa2023-12-151-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix all warnings thrown due to missing description for some of the members in llcc_slice_config. Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202312050519.mup4Q8mD-lkp@intel.com/ Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20231205-llcc-fix-slice-config-warnings-v1-1-d6331d601dd3@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
| * | Revert "soc: qcom: stats: Add DDR sleep stats"Konrad Dybcio2023-12-151-186/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After recent reports ([1], [2]) of older platforms (particularly 8150 and 7180) breaking after DDR sleep stats introduction, revert the following: Commit 73380e2573c3 ("soc: qcom: stats: fix 64-bit division") Commit e84e61bdb97c ("soc: qcom: stats: Add DDR sleep stats") The feature itself is rather useful for debugging DRAM power management, however it looks like the shared RPMh stats data structures differ on previous SoCs. Revert its addition for now to un-break booting on these earlier SoCs, while I try to come up with a better way to enable it conditionally. [1] https://lore.kernel.org/linux-arm-msm/20231209215601.3543895-2-dmitry.baryshkov@linaro.org/ [2] https://lore.kernel.org/linux-arm-msm/CAD=FV=XX4wLg1NNVL15RK4D4tLvuSzZyUv=k_tS4bSb3=7QJzQ@mail.gmail.com/ Reported-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reported-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20231214-topic-undo_ddr_stats-v1-1-1fe32c258e56@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
| * | soc: qcom: socinfo: Add PM8937 Power ICDang Huynh2023-12-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PM8917 and PM8937 uses the same SUBTYPE ID. The PM8937 is found in boards with MSM8917, MSM8937 and MSM8940 and APQ variants. Signed-off-by: Dang Huynh <danct12@riseup.net> Link: https://lore.kernel.org/r/20231121-pm8937-v2-4-b0171ab62075@riseup.net Signed-off-by: Bjorn Andersson <andersson@kernel.org>
| * | soc: qcom: llcc: Add configuration data for X1E80100Rajendra Nayak2023-12-071-0/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add LLCC configuration data for X1E80100 SoC. Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> Co-developed-by: Sibi Sankar <quic_sibis@quicinc.com> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Link: https://lore.kernel.org/r/20231117095315.2087-3-quic_sibis@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
| * | soc: qcom: pmic_glink_altmode: fix port sanity checkJohan Hovold2023-12-071-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PMIC GLINK altmode driver currently supports at most two ports. Fix the incomplete port sanity check on notifications to avoid accessing and corrupting memory beyond the port array if we ever get a notification for an unsupported port. Fixes: 080b4e24852b ("soc: qcom: pmic_glink: Introduce altmode support") Cc: stable@vger.kernel.org # 6.3 Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231109093100.19971-1-johan+linaro@kernel.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
| * | soc: qcom: llcc: Add configuration data for SM8650Neil Armstrong2023-12-071-0/+43
| | | | | | | | | | | | | | | | | | | | | | | | Add Last Level Cache Controller support for the SM8650 platform. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20231030-topic-sm8650-upstream-llcc-v2-2-f281cec608e2@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
| * | soc: qcom: socinfo: Add SM8650 SoC ID table entryNeil Armstrong2023-12-071-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add SoC Info support for the SM8650 platform. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Mukesh Ojha <quic_mojha@quicinc.com> Link: https://lore.kernel.org/r/20231030-topic-sm8650-upstream-socinfo-v2-2-4751e7391dc9@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
| * | soc: qcom: pmic_glink: enable UCSI by defaultDmitry Baryshkov2023-12-071-10/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now as the issue with the UCSI_GET_PDOS is worked around, enable UCSI support for all PMIC_GLINK platforms except Qualcomm SC8180X. The mentioned SoC has slightly different UCSI implementation, which I would like be tested properly before enabling it. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20231025115620.905538-3-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
| * | soc: qcom: stats: Express AOSS QMP module dependencyBjorn Andersson2023-12-071-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the case that the Qualcomm Sleep stats driver is builtin and the AOSS QMP driver is built as a module, neither the implementation nor the stub functions are available during linking, resulting in the following errors: qcom_stats.c:(.text+0x33c): undefined reference to `qmp_send' qcom_stats.c:(.text+0x8a0): undefined reference to `qmp_get' Resolve this by expressing the dependency between the two modules. Fixes: e84e61bdb97c ("soc: qcom: stats: Add DDR sleep stats") Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/linux-arm-msm/202312061258.nAVYPFq2-lkp@intel.com/ Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231205-qcom_stats-aoss_qmp-dependency-v1-1-8dabe1b5c32a@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
| * | soc: qcom: stats: fix 64-bit divisionArnd Bergmann2023-12-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Unguarded 64-bit division is not allowed on 32-bit kernels because this is very slow. The result of trying anyway is a link failure: arm-linux-gnueabi-ld: drivers/soc/qcom/qcom_stats.o: in function `qcom_ddr_stats_show': qcom_stats.c:(.text+0x334): undefined reference to `__aeabi_uldivmod' As this function is only used for debugging and not performance critical, rewrite it to use div_u64() instead. ARCH_TIMER_FREQ is a multiple of MSEC_PER_SEC anyway, so there is no loss in precisison. Fixes: e84e61bdb97c ("soc: qcom: stats: Add DDR sleep stats") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/20231206123717.524009-1-arnd@kernel.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
| * | soc: qcom: stats: Add DDR sleep statsKonrad Dybcio2023-12-031-1/+186
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add DDR sleep stats that include: - the available RAM low power states - per-state residency information - per-frequency residency information (for some freqs only, it seems) - DDR vote information (AB/IB) and some magic thing that we're yet to decode. Based on the msm-5.4 downstream implementation, debugged with some help from Qualcomm's Maulik Shah. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231130-topic-ddr_sleep_stats-v1-2-5981c2e764b6@linaro.org [bjorn: Add missing bitfield.h include] Signed-off-by: Bjorn Andersson <andersson@kernel.org>
| * | soc: qcom: add ADSP PDCharger ULOG driverNeil Armstrong2023-11-144-0/+215
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Qualcomm PMIC PDCharger ULOG driver provides access to logs of the ADSP firmware PDCharger module in charge of Battery and Power Delivery on modern systems. Implement trace events as a simple rpmsg driver with an 1s interval to retrieve the messages. The interface allows filtering the messages by subsystem and priority level, this could be implemented later on. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230908-topic-sm8550-upstream-pdcharge-ulog-v1-1-d1b16b02ced2@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
* | Merge tag 'ti-driver-soc-for-v6.8' of ↵Arnd Bergmann2023-12-221-16/+57
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into soc/drivers TI SoC driver updates for v6.8 - ti_sci: Minor fixup for off by one error in debugfs_create - k3-socinfo: Refactoring and add j721e detection, j722s * tag 'ti-driver-soc-for-v6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: soc: ti: k3-socinfo: Add JTAG ID for J722S soc: ti: k3-socinfo: Revamp driver to accommodate different rev structs firmware: ti_sci: Fix an off-by-one in ti_sci_debugfs_create() Link: https://lore.kernel.org/r/20231218153043.r5psxbjjpccusjg4@september Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | soc: ti: k3-socinfo: Add JTAG ID for J722SVaishnav Achath2023-12-131-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add JTAG ID info for the J722S SoC family to enable SoC detection. More details about this SoC can be found in the TRM: https://www.ti.com/lit/zip/sprujb3 Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com> Reviewed-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20231211132600.25289-1-vaishnav.a@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
| * | soc: ti: k3-socinfo: Revamp driver to accommodate different rev structsNeha Malcom Francis2023-12-061-16/+55
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | k3-socinfo.c driver assumes silicon revisions for every platform are incremental and one-to-one, corresponding to JTAG_ID's variant field: 1.0, 2.0 etc. This assumption is wrong for SoCs such as J721E, where the variant field to revision mapping is 1.0, 1.1. Further, there are SoCs such as AM65x where the sub-variant version requires custom decoding of other registers. Address this by using conditional handling per JTAG ID that requires an exception with J721E as the first example. To facilitate this conversion, use macros to identify the JTAG_ID part number and map them to predefined string array. Signed-off-by: Neha Malcom Francis <n-francis@ti.com> Co-developed-by: Thejasvi Konduru <t-konduru@ti.com> Signed-off-by: Thejasvi Konduru <t-konduru@ti.com> Link: https://lore.kernel.org/r/20231016101608.993921-4-n-francis@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
* | Merge tag 'zynqmp-soc-for-6.8' of https://github.com/Xilinx/linux-xlnx into ↵Arnd Bergmann2023-12-222-10/+13
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | soc/drivers arm64: ZynqMP SoC changes for 6.8 power driver: - Move to remove_new hook - Report error around unsupported callback - Fix long messages event driver: - Fix cpu_id handling - Fix warning message * tag 'zynqmp-soc-for-6.8' of https://github.com/Xilinx/linux-xlnx: soc: xilinx: Add error message for invalid payload received from IPI callback. soc: xilinx: fix unhandled SGI warning message soc: xilinx: fix quoted string split across lines soc: xilinx: Fix for call trace due to the usage of smp_processor_id() soc/xilinx: zynqmp_power: Convert to platform remove callback returning void Link: https://lore.kernel.org/r/CAHTX3dJ=6y=vEgmH7Qqe=6TJZT=D-egKDmLLER4fS0=OHJRGZA@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | soc: xilinx: Add error message for invalid payload received from IPI callback.Naman Trivedi Manojbhai2023-12-131-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | payload[0] of response buffer of zynqmp_pm_get_callback_data() contains valid payload or error code in case of error. Added error message to inform user about the error code received in payload[0]. Signed-off-by: Naman Trivedi Manojbhai <naman.trivedimanojbhai@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/85749bde3e71148533d31ea2092f4514ec347768.1701962639.git.michal.simek@amd.com
| * | soc: xilinx: fix unhandled SGI warning messageTanmay Shah2023-11-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Xen broadcasts SGI to each VM when multiple VMs run on Xen hypervisor. In such case spurious SGI is expected if one event is registered by one VM and not registered by another VM. We let users know that Unhandled SGI is not error and expected if kernel is running on Xen hypervisor. Signed-off-by: Tanmay Shah <tanmay.shah@xilinx.com> Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com> Link: https://lore.kernel.org/r/1698431039-2734260-1-git-send-email-radhey.shyam.pandey@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
| * | soc: xilinx: fix quoted string split across linesMichal Simek2023-11-151-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | Fix checkpatch warning "quoted string split across lines". No functional change. Signed-off-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com> Link: https://lore.kernel.org/r/1698430295-2731040-1-git-send-email-radhey.shyam.pandey@amd.com
| * | soc: xilinx: Fix for call trace due to the usage of smp_processor_id()HariBabu Gattem2023-11-151-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When preemption is enabled in kernel and if any task which can be preempted should not use smp_processor_id() directly, since CPU switch can happen at any time, the previous value of cpu_id differs with current cpu_id. As a result we see the below call trace during xlnx_event_manager_probe. [ 6.140197] dump_backtrace+0x0/0x190 [ 6.143884] show_stack+0x18/0x40 [ 6.147220] dump_stack_lvl+0x7c/0xa0 [ 6.150907] dump_stack+0x18/0x34 [ 6.154241] check_preemption_disabled+0x124/0x134 [ 6.159068] debug_smp_processor_id+0x20/0x2c [ 6.163453] xlnx_event_manager_probe+0x48/0x250 To protect cpu_id, It is recommended to use get_cpu()/put_cpu() to disable preemption, get the cpu_id and enable preemption respectively. (For Reference, Documentation/locking/preempt-locking.rst and Documentation/kernel-hacking/hacking.rst) Use preempt_disable()/smp_processor_id()/preempt_enable() API's to achieve the same. Signed-off-by: HariBabu Gattem <haribabu.gattem@xilinx.com> Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com> Link: https://lore.kernel.org/r/20231027055622.21544-1-jay.buddhabhatti@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
| * | soc/xilinx: zynqmp_power: Convert to platform remove callback returning voidUwe Kleine-König2023-11-151-4/+2
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is ignored (apart from emitting a warning) and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Eventually after all drivers are converted, .remove_new() will be renamed to .remove(). Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/20230925095532.1984344-41-u.kleine-koenig@pengutronix.de Signed-off-by: Michal Simek <michal.simek@amd.com>
* | Merge tag 'renesas-drivers-for-v6.8-tag1' of ↵Arnd Bergmann2023-12-222-4/+1
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/drivers Renesas driver updates for v6.8 - Remove duplicate setup of soc_device_attribute.family, - Make RZ/Five depend on !DMA_DIRECT_REMAP. * tag 'renesas-drivers-for-v6.8-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: soc: renesas: Make RZ/Five depend on !DMA_DIRECT_REMAP soc: renesas: Remove duplicate setup of soc_device_attribute.family Link: https://lore.kernel.org/r/cover.1702642340.git.geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | soc: renesas: Make RZ/Five depend on !DMA_DIRECT_REMAPConor Dooley2023-12-131-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Randy reported yet another build issue with randconfigs on rv32: WARNING: unmet direct dependencies detected for DMA_GLOBAL_POOL Depends on [n]: !ARCH_HAS_DMA_SET_UNCACHED [=n] && !DMA_DIRECT_REMAP [=y] Selected by [y]: - ARCH_R9A07G043 [=y] && SOC_RENESAS [=y] && RISCV [=y] && NONPORTABLE [=y] && RISCV_ALTERNATIVE [=y] && !RISCV_ISA_ZICBOM [=n] && RISCV_SBI [=y] This happens when DMA_DIRECT_REMAP is selected by the T-Head CMO erratum option and DMA_GLOBAL_POOL is selected by the Andes CMO erratum. Block selecting the RZ/Five config option, and by extension DMA_GLOBAL_POOL, if DMA_DIRECT_REMAP has already been enabled. Reported-by: Randy Dunlap <rdunlap@infradead.org> Closes: https://lore.kernel.org/all/24942b4d-d16a-463f-b39a-f9dfcb89d742@infradead.org/ Tested-by: Randy Dunlap <rdunlap@infradead.org> # build-tested Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20231211-primate-arbitrate-fbcd307a0b00@spud Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| * | soc: renesas: Remove duplicate setup of soc_device_attribute.familyGeert Uytterhoeven2023-12-131-4/+0
| |/ | | | | | | | | | | | | | | | | | | As of commit 3f84aa5ec052dba9 ("base: soc: populate machine name in soc_device_register if empty") in v6.4, soc_device_register() fills in soc_device_attribute.family when it is still empty. Hence the identical code in renesas_soc_init() doing the same can be removed. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/4c5e4d0d1819028466748ed684254fec41aae816.1701696627.git.geert+renesas@glider.be
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