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* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152Thomas Gleixner2019-05-301-5/+1
| | | | | | | | | | | | | | | | | | | | | Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 3029 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* spi: Do not print a message if spi_controller_{suspend,resume}() failsGeert Uytterhoeven2018-09-051-3/+1
| | | | | | | | | | | | | | spi_controller_{suspend,resume}() already prints an error message on failure, so there is no need to repeat this in individual drivers. Note: spi_master_{suspend,resume}() is an alias for spi_controller_{suspend,resume}(). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Reviewed-by: Daniel Mack <daniel@zonque.org> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: spi-fsl-espi: Log fifo counters on errorTiago Brusamarello2018-07-261-1/+4
| | | | | | | | Log RX and TX fifo counters when a transfer is done and these are not zero. Signed-off-by: Tiago Brusamarello <tiago.brusamarello@datacom.ind.br> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: fsl-espi: fix ioread16/iowrite16 endiannessHeiner Kallweit2016-12-011-2/+2
| | | | | | | | | fsl_espi_read_reg16 / fsl_espi_write_reg16 are supposed to read / write big endian values. Therefore ioread16be / iowrite16be have to be used. Fixes: 058234328445 ("eliminate need for linearization when writing to hardware") Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: fsl-espi: remove unused linearization codeHeiner Kallweit2016-11-301-80/+0
| | | | | | | | | | After introducing direct transfers between hardware and transfer buffers remove all code which is unused now. This includes getting rid of the 64k linearization buffer. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: fsl-espi: eliminate need for linearization when reading from hardwareHeiner Kallweit2016-11-301-14/+63
| | | | | | | | Eliminate need for linearization when reading from the hardware and write to the transfer buffers directly. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: fsl-espi: eliminate need for linearization when writing to hardwareHeiner Kallweit2016-11-301-14/+65
| | | | | | | | Eliminate need for linearization when writing to the hardware and read from the transfer buffers directly. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: fsl-espi: determine need for byte swap only onceHeiner Kallweit2016-11-301-2/+6
| | | | | | | | Determine need for byte swap only once and store it in new member swab in struct fsl_espi. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: fsl-espi: set spi_master members min_speed_hz and max_speed_hzHeiner Kallweit2016-11-161-10/+3
| | | | | | | | | | | | | | | | | | | | | ESPI has a max and min supported SPI frequency, determined by the clock divider range. Set master->min_speed_hz/max_speed_hz to inform the SPI core about these limits. Then the SPI core handles cases where a transfer requests a frequency outside the supported range. So far the driver simply set the lowest supported frequency if the requested frequency was below the supported range. This is not necessarily an appropriate action as the device might not support frequencies greater than the requested one. With this patch the SPI core will reject transfers requesting a too low frequency. The check in fsl_espi_setup can be removed because the SPI core sets spi->max_speed_hz to master->max_speed_hz if it's not set already. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: fsl-espi: simplify of_fsl_espi_suspendHeiner Kallweit2016-11-161-5/+1
| | | | | | | Simplify of_fsl_espi_suspend a little. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: fsl-espi: separate fsl-espi from fsl-lib completelyHeiner Kallweit2016-11-141-2/+0
| | | | | | | | After having removed all code dependencies we can make fsl-espi completely independent of fsl-lib now. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: fsl-espi: introduce struct fsl_espiHeiner Kallweit2016-11-141-127/+143
| | | | | | | | | Only few members of struct mpc8xxx_spi are relevant for fsl-espi. Therefore replace it with a ESPI-specific struct fsl_espi. Replace variable names mpc8xxx_spi and mspi with espi. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: fsl-espi: factor out fsl_espi_init_regsHeiner Kallweit2016-11-141-60/+50
| | | | | | | | | | | | The register initialization is the same in fsl_espi_probe and in of_fsl_espi_resume. Therefore factor it out into fsl_espi_init_regs. It was actually a bug that CSMODE_BEF and CSMODE_AFT were not set in of_fsl_espi_resume. Seems like nobody ever used values other than zero for these parameters. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: fsl-espi: introduce struct fsl_espi_csHeiner Kallweit2016-11-141-3/+7
| | | | | | | | Very little from struct spi_mpc8xxx_cs is relevant for fsl-espi. Therefore replace it with struct fsl_espi_cs. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: fsl-espi: migrate relevant parts of mpc8xxx_spi_probe and ↵Heiner Kallweit2016-11-141-7/+13
| | | | | | | | | | | | | | of_mpc8xxx_spi_probe Very little of the library functions mpc8xxx_spi_probe and of_mpc8xxx_spi_probe is relevant for fsl-espi. Therefore migrate the relevant parts to fsl-espi (considering that get_brgfreq() always returns -1 on systems with ESPI) and remove use of these functions. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: fsl-espi: remove usage of mpc8xxx_spi->irqHeiner Kallweit2016-11-141-4/+3
| | | | | | | | There's no need to access mpc8xxx_spi->irq, we can use function parameter irq directly. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: fsl-espi: remove usage of mpc8xxx_spi->flagsHeiner Kallweit2016-11-141-6/+5
| | | | | | | | | Change the check to access property "mode" directly. This allows us to get rid of mpc8xxx_spi->flags in a subsequent patch in this patch series as it's used nowhere else. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: fsl-espi: remove remaining usage of struct fsl_spi_platform_dataHeiner Kallweit2016-11-141-15/+11
| | | | | | | | | | | Use master->num_chipselect directly instead of pdata->max_chipselect. In this context let of_fsl_espi_get_chipselects return max_chipselect. This change allows us to get rid of struct fsl_spi_platform_data completely in the fsl-espi driver. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: fsl-espi: don't set pdata->cs_controlHeiner Kallweit2016-11-141-1/+0
| | | | | | | Don't set pdata->cs_control as it's nowhere used in fsl-espi and fsl-lib. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: fsl-espi: remove usage of pdata->initial_spmodeHeiner Kallweit2016-11-141-2/+2
| | | | | | | Remove pdata->initial_spmode as it is nowhere set. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: fsl-espi: add support for dual output read modeHeiner Kallweit2016-11-111-1/+12
| | | | | | | | | | This patch adds support for dual output read mode. It was successfully tested on a P1014-based device with S25FL128S SPINOR flash. With 50MHz SPI clock the read rate is 11MByte/s. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: fsl-espi: add support for ESPI RXSKIP modeHeiner Kallweit2016-11-111-4/+47
| | | | | | | | | | | | | This patch adds support for ESPI RXSKIP mode. This mode is optimized for flash reads: - sends a number of bytes and then reads a number of bytes - shifts out zeros automatically when reading Supporting RXSKIP mode is a prerequisite for supporting dual output read mode. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: fsl-espi: don't write ESPI_SPMODE register if the mode doesn't changeHeiner Kallweit2016-11-041-2/+5
| | | | | | | There's no need to bother the chip if the mode doesn't change. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: fsl-espi: remove unneeded call to fsl_espi_setup_transferHeiner Kallweit2016-11-041-2/+0
| | | | | | | | Resetting the chip to a default transfer mode after each transfer doesn't provide any benefit. Therefore remove this call. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: fsl-espi: fix support for all available clock ratesPaulo Zaneti2016-10-291-16/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to NXP ESPI datasheet, the SPI clock rate is: spi_clk = System_Clock / ( 2 * DIV16 * ( 1 + PM ) ) Where System_Clock is the platform clock divided by 2, DIV16 may be 1 or 16, and PM is a 4 bits integer (0 to 15). Isolating PM on the expression, we get: PM = (System_Clock / ( 2 * DIV16 * spi_clk ) ) - 1 Where System_Clock = mpc8xxx_spi->spibrg / 2, spi_clk = hz, and DIV16 = 1 or DIV16 = 16. So, PM = (mpc8xxx_spi->spibrg / ( 4 * hz) ) - 1 or PM = (mpc8xxx_spi->spibrg / ( 16 * 4 * hz) ) - 1 Current spi-fsl-espi driver can't configure the HW for all supported clock rates. It filters out clock rates for PM = 0 and PM = 1. This patch allows all range of supported clock rates to be configured on the ESPI controller. Signed-off-by: Paulo Zaneti <paulo.zaneti@datacom.ind.br> Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: fsl-espi: small fix to error path in fsl_espi_irqHeiner Kallweit2016-10-291-1/+1
| | | | | | | | spin_lock is used to obtain the spinlock, so spin_unlock has to be used here. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: fsl-espi: fix and improve reading from RX FIFOHeiner Kallweit2016-10-281-47/+20
| | | | | | | | | | Currently the driver polls in the ISR for enough bytes in the RX FIFO. An ISR should never do this. Change it to read as much as possible whenever the ISR is called. This also allows to significantly simplify the code. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: fsl-espi: make better use of the RX FIFOHeiner Kallweit2016-10-281-3/+8
| | | | | | | | | | | | | | | So far an interrupt is triggered whenever there's at least one byte in the RX FIFO. This results in a unnecessarily high number of interrupts. Change this to generate an interrupt if - RX FIFO is half full (except if all bytes to read fit into the RX FIFO anyway) - end of transfer has been reached This way the number of interrupts can be significantly reduced. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: fsl-espi: extend and improve transfer error handlingHeiner Kallweit2016-10-281-5/+17
| | | | | | | | | | | | Extend and improve transfer error handling - in case of timeout report also number of remaining rx bytes - in case of timeout return ETIMEDOUT instead of EMSGSIZE - add sanity checks after all bytes have been sent / read: - check that HW has flag SPIE_DON set - check that RX / TX FIFO are empty Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: fsl-espi: simplify and inline function fsl_espi_change_modeHeiner Kallweit2016-10-281-21/+2
| | | | | | | | | | | The ESPI spec mentions no requirement to turn off the ESPI unit prior to changing the mode. Most likely the ESPI unit is only turned off to clear the FIFO's as before this patch series single bytes could remain in the TX FIFO after transfer end. Therefore remove disabling / re-enabling the ESPI unit. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: fsl-espi: Rename len in struct mpc8xxx_spi to rx_len and make it unsignedHeiner Kallweit2016-10-281-11/+11
| | | | | | | | | Now that we introduced element tx_len in struct mpc8xxx_spi let's rename element len to rx_len as it actually is the number of bytes to receive. In addition make it unsigned. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: fsl-espi: fix and improve writing to TX FIFOHeiner Kallweit2016-10-281-26/+42
| | | | | | | | | | | | | | | | | | | | | | This change addresses two issues: - If the TX FIFO is full the ISR polls until there's free space again. An ISR should never wait for something. - Currently the number of bytes to transfer is rounded up to the next multiple of 4. For most transfers therefore few bytes remain in the TX FIFO after end of transfer. This would cause the next transfer to fail and as a workaround the ESPI block is disabled / re-enabled in fsl_espi_change_mode. This seems to clear the FIFO's (although it's not mentioned in the spec). With this change the TX FIFO is filled as much as possible initially and whenever the ISR is called. Also the exact number of bytes is transferred. The spinlock protects against a potential race if the first interrupt occurs whilst the TX FIFO is still being initially filled. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: fsl-espi: improve check for SPI_QE_CPU_MODEHeiner Kallweit2016-10-281-2/+3
| | | | | | | | | | SPI_QE_CPU_MODE doesn't exist for ESPI and is set by of_mpc8xxx_spi_probe based on DT property "mode". This property is not defined for ESPI, see Documentation/devicetree/bindings/spi/fsl-spi.txt. So print an error message and bail out if SPI_QE_CPU_MODE is set. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: fsl-espi: fix merge conflict for commit "avoid processing uninitalized ↵Heiner Kallweit2016-10-281-1/+1
| | | | | | | | | | | data on error" Commit 5c0ba57744b1 ("spi: fsl-espi: avoid processing uninitalized data on error") applied fine to stable but caused a merge conflict on next. This patch fixes that. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* Merge branch 'fix/fsl-espi' of ↵Mark Brown2016-10-261-2/+2
|\ | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi into spi-fsl-espi
| * spi: fsl-espi: avoid processing uninitalized data on errorArnd Bergmann2016-10-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When we get a spurious interrupt in fsl_espi_irq, we end up processing four uninitalized bytes of data, as shown in this warning message: drivers/spi/spi-fsl-espi.c: In function 'fsl_espi_irq': drivers/spi/spi-fsl-espi.c:462:4: warning: 'rx_data' may be used uninitialized in this function [-Wmaybe-uninitialized] This adds another check so we skip the data in this case. Fixes: 6319a68011b8 ("spi/fsl-espi: avoid infinite loops on fsl_espi_cpu_irq()") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
* | spi: fsl-espi: fix handling of word sizes other than 8 bitHeiner Kallweit2016-10-211-48/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The code in fsl_espi_tx_buf_lsb and parts of fsl_espi_setup_transfer look very weird and don't reflect the ESPI spec. ESPI stores values with <= 8 bit word size right justified as 8 bit value and values with > 8 bit word size right justified as 16 bit value. Therefore no such shifting is needed. Only case MSB-first with 8 bit word size is correctly handled, and most likely nobody ever used this driver with a different config. On ESPI only the case LSB-first with word size > 8 bit needs a special handling. In this case a little endian 16 bit value has to be written to the TX FIFO what requires a byte swap as the host system is big endian. The same applies to reading from the RX FIFO. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: fsl-espi: reject MSB-first transfers with word sizes other than 8 or 16Heiner Kallweit2016-10-211-0/+10
| | | | | | | | | | | | | | | | | | | | According to the ESPI spec MSB-first transfers are supported for word size 8 and 16 only. Check for this and reject MSB-first transfers with other word sizes. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: fsl-espi: replace of_get_property with of_property_read_u32Heiner Kallweit2016-10-211-21/+20
|/ | | | | | | | | of_property_read_u32 is better here than generic of_get_property: - implicit endianness conversion if needed - implicit checking of size of property Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: fsl-espi: improve return value handling in fsl_espi_probeHeiner Kallweit2016-09-241-16/+8
| | | | | | | | | The return value of fsl_espi_probe (currently struct spi_master *) is just used for checking whether an error occurred. Change the return value type to int and simplify the code. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: fsl-espi: simplify of_fsl_espi_probeHeiner Kallweit2016-09-241-14/+7
| | | | | | | Simplify of_fsl_espi_probe. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: fsl-espi: remove unused variable in fsl_espi_setupHeiner Kallweit2016-09-241-2/+0
| | | | | | | Remove an unused variable. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: fsl-espi: improve and extend register bit definitionsHeiner Kallweit2016-09-141-19/+33
| | | | | | | | | | Add definition of further register bits for use in upcoming driver extensions and improve current bit definitions: - use BIT macro - use bit names as in the chip spec Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: fsl-espi: align register access with other driversHeiner Kallweit2016-09-141-63/+72
| | | | | | | | | | | | | Change register access to the method used in other drivers too. - use register names as in the chip spec for constants - avoid hard to read statements like __be32 __iomem *espi_mode = &reg_base->mode - get rid of old powerpc-specific functions like in_8 In addition annotate reg_base in struct mpc8xxx_spi as __iomem. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: fsl-espi: improve and simplify interrupt handlerHeiner Kallweit2016-09-141-10/+6
| | | | | | | | Simplify the interrupt handler a little. In addition don't call fsl_espi_cpu_irq() if no event bit is set. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: fsl-espi: simplify fsl_espi_setup_transferHeiner Kallweit2016-09-141-14/+2
| | | | | | | | If t is not null then the SPI core takes care that bits_per_word and speed_hz are populated. This allows to simplify fsl_espi_setup_transfer. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: fsl-espi: merge fsl_espi_trans and fsl_espi_do_transHeiner Kallweit2016-09-121-14/+4
| | | | | | | | Merge both functions to reduce source code size and improve readability. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: fsl-espi: improve message length handlingHeiner Kallweit2016-09-121-7/+5
| | | | | | | | | Move checking for a zero-length message up in the call chain and use m->frame_length instead of re-calculating the overall length of all transfers in the message. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: fsl-espi: factor out handling of read dataHeiner Kallweit2016-09-121-20/+21
| | | | | | | | | Factor out copying read data to the read buffers in the original message to a new function fsl_espi_copy_from_buf. This also allows to simplify fsl_espi_copy_to_buf. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: fsl-espi: centralize populating struct spi_transferHeiner Kallweit2016-09-121-12/+12
| | | | | | | | Better structure the code by population all elements of struct spi_transfer in one place. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>