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* spi: lantiq: Add support to Lightning Mountain SoCDilip Kota2020-07-222-2/+42
| | | | | | | | | Add support to SPI controller on Intel Atom based Lightning Mountain SoC which reuses Lantiq SPI controller IP. Signed-off-by: Dilip Kota <eswara.kota@linux.intel.com> Link: https://lore.kernel.org/r/4d61a75381aca9479f9fc15d07a7b05534da6bb3.1594957019.git.eswara.kota@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: lantiq: Move interrupt configuration to SoC specific data structureDilip Kota2020-07-221-25/+39
| | | | | | | | | | Moving interrupt configuration to SoC specific data structure helps to add support for newer SoCs on which SPI controller with lesser interrupt lines compared to existing chipsets. Signed-off-by: Dilip Kota <eswara.kota@linux.intel.com> Link: https://lore.kernel.org/r/7eb6d863515245fedfa0296c72082df107367d07.1594957019.git.eswara.kota@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: lantiq: Add fifo size bit mask in SoC specific data structureDilip Kota2020-07-221-10/+9
| | | | | | | | | On newer chipsets, SPI controller has fifos of larger size. So add the fifo size bit mask entry in SoC specific data structure. Signed-off-by: Dilip Kota <eswara.kota@linux.intel.com> Link: https://lore.kernel.org/r/a0889abf17a9fbc7077f10be0f0342b7ebdf9361.1594957019.git.eswara.kota@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: lantiq: Add support to acknowledge interruptDilip Kota2020-07-221-0/+13
| | | | | | | | | | On newer chipsets interrupt need to be acknowledged as they use different interrupt controller which does not acknowledge the interrupts automatically. Signed-off-by: Dilip Kota <eswara.kota@linux.intel.com> Link: https://lore.kernel.org/r/608923b484d9ef239b44bb545c0b79b27030a6ae.1594957019.git.eswara.kota@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: lantiq: Move interrupt control register offesets to SoC specific data ↵Dilip Kota2020-07-221-8/+12
| | | | | | | | | | | structure Address of Interrupt control registers are different on new chipsets. So move them to SoC specific data structure. Signed-off-by: Dilip Kota <eswara.kota@linux.intel.com> Link: https://lore.kernel.org/r/f0f9723a30ea9c2ee48d2199f7512af9e15803b0.1594957019.git.eswara.kota@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: lantiq: Add SMP supportDilip Kota2020-07-221-0/+7
| | | | | | | | | | Existing driver supports only single core SoC. New multicore platforms uses the same driver/IP so SMP support is required. This patch adds multicore support in the driver. Signed-off-by: Dilip Kota <eswara.kota@linux.intel.com> Link: https://lore.kernel.org/r/d6663296b41f102c582fda08e71f62b72ca05d5d.1594957019.git.eswara.kota@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: lantiq: fix: Rx overflow error in full duplex modeDilip Kota2020-07-221-0/+10
| | | | | | | | | | In full duplex mode, rx overflow error is observed. To overcome the error, wait until the complete data got received and proceed further. Fixes: 17f84b793c01 ("spi: lantiq-ssc: add support for Lantiq SSC SPI controller") Signed-off-by: Dilip Kota <eswara.kota@linux.intel.com> Link: https://lore.kernel.org/r/efb650b0faa49a00788c4e0ca8ef7196bdba851d.1594957019.git.eswara.kota@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: spi-topcliff-pch: use generic power managementVaibhav Gupta2020-07-221-38/+13
| | | | | | | | | | | | | | | | | | | | | | Drivers using legacy PM have to manage PCI states and device's PM states themselves. They also need to take care of configuration registers. With improved and powerful support of generic PM, PCI Core takes care of above mentioned, device-independent, jobs. This driver makes use of PCI helper functions like pci_save/restore_state(), pci_enable/disable_device(), pci_enable_wake() and pci_set_power_state() to do required operations. In generic mode, they are no longer needed. Change function parameter in both .suspend() and .resume() to "struct device*" type. Use dev_get_drvdata() to get drv data. Compile-tested only. Signed-off-by: Vaibhav Gupta <vaibhavgupta40@gmail.com> Link: https://lore.kernel.org/r/20200720155714.714114-1-vaibhavgupta40@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: ppc4xx: Convert to use GPIO descriptorsLinus Walleij2020-07-221-95/+11
| | | | | | | | | | | | | | | | This converts the PPC4xx SPI driver to use GPIO descriptors. The driver is already just picking some GPIOs from the device tree so the conversion is pretty straight forward. However this driver is looking form a pure "gpios" property rather than the standard binding "cs-gpios" so we need to add a new exception to the gpiolib OF parser to allow this for this driver's compatibles. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Cc: linuxppc-dev@lists.ozlabs.org Link: https://lore.kernel.org/r/20200714072226.26071-1-linus.walleij@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: spi-cadence: add support for chip select highShreyas Joshi2020-07-221-1/+1
| | | | | | | | | | The spi cadence driver should support spi-cs-high in mode bits so that the peripherals that needs the chip select to be high active can use it. Add the SPI-CS-HIGH flag in the supported mode bits. Signed-off-by: Shreyas Joshi <shreyas.joshi@biamp.com> Link: https://lore.kernel.org/r/20200710211655.1564-1-shreyas.joshi@biamp.com Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: lpspi: fix the imbalance of runtime pm function callClark Wang2020-07-221-1/+6
| | | | | | | | | | | | Call the put function after probe successfully. Otherwise, the lpspi module will keep active status until the first spi transfer called. Disable runtime pm when probe fails. There is no need to active runtime pm after probe failed. Signed-off-by: Clark Wang <xiaoning.wang@nxp.com> Link: https://lore.kernel.org/r/20200714075251.12777-2-xiaoning.wang@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: spi-amd: Do not define 'struct acpi_device_id' when !CONFIG_ACPILee Jones2020-07-171-0/+2
| | | | | | | | | | | | | | | | Since ACPI_PTR() is used to NULLify the value when !CONFIG_ACPI, struct 'spi_acpi_match' becomes defined but unused. Fixes the following W=1 kernel build warning(s): drivers/spi/spi-amd.c:297:36: warning: ‘spi_acpi_match’ defined but not used [-Wunused-const-variable=] 297 | static const struct acpi_device_id spi_acpi_match[] = { | ^~~~~~~~~~~~~~ Signed-off-by: Lee Jones <lee.jones@linaro.org> Cc: Sanjay R Mehta <sanju.mehta@amd.com> Link: https://lore.kernel.org/r/20200717135424.2442271-15-lee.jones@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: spi-pxa2xx: Do not define 'struct acpi_device_id' when !CONFIG_ACPILee Jones2020-07-171-0/+2
| | | | | | | | | | | | | | | | | | Since ACPI_PTR() is used to NULLify the value when !CONFIG_ACPI, struct 'pxa2xx_spi_acpi_match' becomes defined but unused. Fixes the following W=1 kernel build warning(s): drivers/spi/spi-pxa2xx.c:1435:36: warning: ‘pxa2xx_spi_acpi_match’ defined but not used [-Wunused-const-variable=] 1435 | static const struct acpi_device_id pxa2xx_spi_acpi_match[] = { | ^~~~~~~~~~~~~~~~~~~~~ Signed-off-by: Lee Jones <lee.jones@linaro.org> Cc: Daniel Mack <daniel@zonque.org> Cc: Haojian Zhuang <haojian.zhuang@gmail.com> Cc: Robert Jarzmik <robert.jarzmik@free.fr> Link: https://lore.kernel.org/r/20200717135424.2442271-14-lee.jones@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: spi-at91-usart: Remove unused OF table 'struct of_device_id'Lee Jones2020-07-171-7/+0
| | | | | | | | | | | | | | | | | | | | | The only way this driver can be probed by MFD via its parent device. No other reference to 'microchip,at91sam9g45-usart-spi' exists in the kernel. Fixes the following W=1 kernel build warning(s): drivers/spi/spi-at91-usart.c:684:34: warning: ‘at91_usart_spi_dt_ids’ defined but not used [-Wunused-const-variable=] 684 | static const struct of_device_id at91_usart_spi_dt_ids[] = { | ^~~~~~~~~~~~~~~~~~~~~ Suggested-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Cc: Radu Pirea <radu_nicolae.pirea@upb.ro> Cc: Nicolas Ferre <nicolas.ferre@microchip.com> Cc: Ludovic Desroches <ludovic.desroches@microchip.com> Link: https://lore.kernel.org/r/20200717135424.2442271-13-lee.jones@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: spi-topcliff-pch: Add missing descriptions to 'struct pch_spi_data'Lee Jones2020-07-171-2/+6
| | | | | | | | | | | | | | | Fixes the following W=1 kernel build warning(s): drivers/spi/spi-topcliff-pch.c:184: warning: Function parameter or member 'io_base_addr' not described in 'pch_spi_data' drivers/spi/spi-topcliff-pch.c:184: warning: Function parameter or member 'pkt_tx_buff' not described in 'pch_spi_data' drivers/spi/spi-topcliff-pch.c:184: warning: Function parameter or member 'pkt_rx_buff' not described in 'pch_spi_data' drivers/spi/spi-topcliff-pch.c:184: warning: Function parameter or member 'dma' not described in 'pch_spi_data' drivers/spi/spi-topcliff-pch.c:184: warning: Function parameter or member 'use_dma' not described in 'pch_spi_data' drivers/spi/spi-topcliff-pch.c:184: warning: Function parameter or member 'save_total_len' not described in 'pch_spi_data' Signed-off-by: Lee Jones <lee.jones@linaro.org> Link: https://lore.kernel.org/r/20200717135424.2442271-12-lee.jones@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: spi-zynqmp-gqspi: Correct a couple of misspellings in kerneldocLee Jones2020-07-171-3/+3
| | | | | | | | | | | | | | | | Fixes the following W=1 kernel build warning(s): drivers/spi/spi-zynqmp-gqspi.c:205: warning: Function parameter or member 'slavecs' not described in 'zynqmp_gqspi_selectslave' drivers/spi/spi-zynqmp-gqspi.c:205: warning: Function parameter or member 'slavebus' not described in 'zynqmp_gqspi_selectslave' drivers/spi/spi-zynqmp-gqspi.c:205: warning: Excess function parameter 'flashcs' description in 'zynqmp_gqspi_selectslave' drivers/spi/spi-zynqmp-gqspi.c:205: warning: Excess function parameter 'flashbus' description in 'zynqmp_gqspi_selectslave' drivers/spi/spi-zynqmp-gqspi.c:902: warning: Function parameter or member 'dev' not described in 'zynqmp_qspi_suspend' drivers/spi/spi-zynqmp-gqspi.c:902: warning: Excess function parameter '_dev' description in 'zynqmp_qspi_suspend' Signed-off-by: Lee Jones <lee.jones@linaro.org> Reviewed-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/20200717135424.2442271-11-lee.jones@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: spi-zynq-qspi: Add description for 2 missing attributes/parametersLee Jones2020-07-171-1/+2
| | | | | | | | | | | | | | Fixes the following W=1 kernel build warning(s): drivers/spi/spi-zynq-qspi.c:143: warning: Function parameter or member 'dev' not described in 'zynq_qspi' drivers/spi/spi-zynq-qspi.c:334: warning: Function parameter or member 'spi' not described in 'zynq_qspi_config_op' drivers/spi/spi-zynq-qspi.c:334: warning: Excess function parameter 'qspi' description in 'zynq_qspi_config_op' Signed-off-by: Lee Jones <lee.jones@linaro.org> Reviewed-by: Michal Simek <michal.simek@xilinx.com> Cc: Sureshkumar Relli <nagasure@xilinx.com> Link: https://lore.kernel.org/r/20200717135424.2442271-10-lee.jones@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: spi-pl022: Provide missing struct attribute/function param docsLee Jones2020-07-171-3/+9
| | | | | | | | | | | | | | | | | | | | | | | Also demote non-worthy kerneldoc headers to standard comment blocks. Fixes the following W=1 kernel build warning(s): drivers/spi/spi-pl022.c:304: warning: cannot understand function prototype: 'enum ssp_writing ' drivers/spi/spi-pl022.c:330: warning: Function parameter or member 'loopback' not described in 'vendor_data' drivers/spi/spi-pl022.c:398: warning: Function parameter or member 'rx_lev_trig' not described in 'pl022' drivers/spi/spi-pl022.c:398: warning: Function parameter or member 'tx_lev_trig' not described in 'pl022' drivers/spi/spi-pl022.c:398: warning: Function parameter or member 'dma_running' not described in 'pl022' drivers/spi/spi-pl022.c:670: warning: Function parameter or member 'pl022' not described in 'readwriter' drivers/spi/spi-pl022.c:1250: warning: Function parameter or member 'irq' not described in 'pl022_interrupt_handler' drivers/spi/spi-pl022.c:1250: warning: Function parameter or member 'dev_id' not described in 'pl022_interrupt_handler' drivers/spi/spi-pl022.c:1343: warning: Function parameter or member 'pl022' not described in 'set_up_next_transfer' drivers/spi/spi-pl022.c:1343: warning: Function parameter or member 'transfer' not described in 'set_up_next_transfer' Signed-off-by: Lee Jones <lee.jones@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Cc: Sachin Verma <sachin.verma@st.com> Link: https://lore.kernel.org/r/20200717135424.2442271-9-lee.jones@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: spi-s3c64xx: Add missing entries for structs 's3c64xx_spi_dma_data' and ↵Lee Jones2020-07-171-1/+8
| | | | | | | | | | | | | | | | | | | | | | | 's3c64xx_spi_dma_data' Fixes the following W=1 kernel build warning(s): drivers/spi/spi-s3c64xx.c:150: warning: Function parameter or member 'quirks' not described in 's3c64xx_spi_port_config' drivers/spi/spi-s3c64xx.c:150: warning: Function parameter or member 'clk_ioclk' not described in 's3c64xx_spi_port_config' drivers/spi/spi-s3c64xx.c:189: warning: Function parameter or member 'pdev' not described in 's3c64xx_spi_driver_data' drivers/spi/spi-s3c64xx.c:189: warning: Function parameter or member 'rx_dma' not described in 's3c64xx_spi_driver_data' drivers/spi/spi-s3c64xx.c:189: warning: Function parameter or member 'tx_dma' not described in 's3c64xx_spi_driver_data' drivers/spi/spi-s3c64xx.c:189: warning: Function parameter or member 'port_conf' not described in 's3c64xx_spi_driver_data' drivers/spi/spi-s3c64xx.c:189: warning: Function parameter or member 'port_id' not described in 's3c64xx_spi_driver_data' Signed-off-by: Lee Jones <lee.jones@linaro.org> Cc: Kukjin Kim <kgene@kernel.org> Cc: Krzysztof Kozlowski <krzk@kernel.org> Cc: Andi Shyti <andi@etezian.org> Cc: Jaswinder Singh <jassi.brar@samsung.com> Cc: linux-samsung-soc@vger.kernel.org Link: https://lore.kernel.org/r/20200717135424.2442271-8-lee.jones@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: spi-meson-spicc: Remove set but never used variable 'data' from ↵Lee Jones2020-07-171-3/+1
| | | | | | | | | | | | | | | | | | | | meson_spicc_reset_fifo() Looks like it hasn't ever been checked. Fixes the following W=1 kernel build warning(s): drivers/spi/spi-meson-spicc.c: In function ‘meson_spicc_reset_fifo’: drivers/spi/spi-meson-spicc.c:365:6: warning: variable ‘data’ set but not used [-Wunused-but-set-variable] 365 | u32 data; | ^~~~ Signed-off-by: Lee Jones <lee.jones@linaro.org> Cc: Kevin Hilman <khilman@baylibre.com> Cc: Neil Armstrong <narmstrong@baylibre.com> Cc: linux-amlogic@lists.infradead.org Link: https://lore.kernel.org/r/20200717135424.2442271-7-lee.jones@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: spi-meson-spifc: Fix misdocumenting of 'dev' in 'struct meson_spifc'Lee Jones2020-07-171-1/+1
| | | | | | | | | | | | | Fixes the following W=1 kernel build warning(s): drivers/spi/spi-meson-spifc.c:80: warning: Function parameter or member 'dev' not described in 'meson_spifc' Signed-off-by: Lee Jones <lee.jones@linaro.org> Cc: Kevin Hilman <khilman@baylibre.com> Cc: Beniamino Galvani <b.galvani@gmail.com> Cc: linux-amlogic@lists.infradead.org Link: https://lore.kernel.org/r/20200717135424.2442271-6-lee.jones@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: spi-ep93xx: Fix API slippageLee Jones2020-07-171-1/+1
| | | | | | | | | | | | | | | ep93xx_spi_read_write() changed is parameters, but the function documentation was left unchanged. Let's realign. Fixes the following W=1 kernel build warning(s): drivers/spi/spi-ep93xx.c:227: warning: Function parameter or member 'master' not described in 'ep93xx_spi_read_write' drivers/spi/spi-ep93xx.c:227: warning: Excess function parameter 'espi' description in 'ep93xx_spi_read_write' Signed-off-by: Lee Jones <lee.jones@linaro.org> Cc: Mika Westerberg <mika.westerberg@iki.fi> Link: https://lore.kernel.org/r/20200717135424.2442271-5-lee.jones@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: spi-davinci: Fix a few kerneldoc misspellings and API slippagesLee Jones2020-07-171-3/+4
| | | | | | | | | | | | | | | | Fixes the following W=1 kernel build warning(s): drivers/spi/spi-davinci.c:249: warning: Function parameter or member 'dspi' not described in 'davinci_spi_get_prescale' drivers/spi/spi-davinci.c:249: warning: Function parameter or member 'max_speed_hz' not described in 'davinci_spi_get_prescale' drivers/spi/spi-davinci.c:249: warning: Excess function parameter 'maxspeed_hz' description in 'davinci_spi_get_prescale' drivers/spi/spi-davinci.c:719: warning: Function parameter or member 'data' not described in 'dummy_thread_fn' drivers/spi/spi-davinci.c:719: warning: Excess function parameter 'context_data' description in 'dummy_thread_fn' drivers/spi/spi-davinci.c:735: warning: Function parameter or member 'data' not described in 'davinci_spi_irq' drivers/spi/spi-davinci.c:735: warning: Excess function parameter 'context_data' description in 'davinci_spi_irq' Signed-off-by: Lee Jones <lee.jones@linaro.org> Link: https://lore.kernel.org/r/20200717135424.2442271-4-lee.jones@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: spi-bitbang: Demote obvious misuse of kerneldoc to standard comment blocksLee Jones2020-07-171-3/+3
| | | | | | | | | | | | | | No attempt has been made to document any of the demoted functions here. Fixes the following W=1 kernel build warning(s): drivers/spi/spi-bitbang.c:181: warning: Function parameter or member 'spi' not described in 'spi_bitbang_setup' drivers/spi/spi-bitbang.c:215: warning: Function parameter or member 'spi' not described in 'spi_bitbang_cleanup' drivers/spi/spi-bitbang.c:434: warning: Function parameter or member 'bitbang' not described in 'spi_bitbang_stop' Signed-off-by: Lee Jones <lee.jones@linaro.org> Link: https://lore.kernel.org/r/20200717135424.2442271-3-lee.jones@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: spi-loopback-test: Fix formatting issues in function header blocksLee Jones2020-07-171-8/+8
| | | | | | | | | | | | | | | | | | | | | | Kerneldoc function parameter descriptions must be in '@.*: ' format. Fixes the following W=1 kernel build warning(s): drivers/spi/spi-loopback-test.c:897: warning: Function parameter or member 'spi' not described in 'spi_test_execute_msg' drivers/spi/spi-loopback-test.c:897: warning: Function parameter or member 'test' not described in 'spi_test_execute_msg' drivers/spi/spi-loopback-test.c:897: warning: Function parameter or member 'tx' not described in 'spi_test_execute_msg' drivers/spi/spi-loopback-test.c:897: warning: Function parameter or member 'rx' not described in 'spi_test_execute_msg' drivers/spi/spi-loopback-test.c:970: warning: Function parameter or member 'spi' not described in 'spi_test_run_test' drivers/spi/spi-loopback-test.c:970: warning: Function parameter or member 'test' not described in 'spi_test_run_test' drivers/spi/spi-loopback-test.c:970: warning: Function parameter or member 'tx' not described in 'spi_test_run_test' drivers/spi/spi-loopback-test.c:970: warning: Function parameter or member 'rx' not described in 'spi_test_run_test' Signed-off-by: Lee Jones <lee.jones@linaro.org> Cc: Mark Brown <broonie@kernel.org> Cc: Martin Sperl <kernel@martin.sperl.org> Cc: linux-spi@vger.kernel.org Link: https://lore.kernel.org/r/20200717135424.2442271-2-lee.jones@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
* Merge series "spi: bcm2835/bcm2835aux: support effective_speed_hz" from Marc ↵Mark Brown2020-07-172-6/+6
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Kleine-Budde <mkl@pengutronix.de>: Hello, I've picked up and forward ported Martin Sperl's patches which add support for effective_speed_hz to the SPI controllers found on all raspberry pi models. See the following patch, which adds this feature to the SPI core, for more information: 5d7e2b5ed585 spi: core: allow reporting the effectivly used speed_hz for a transfer regards, Marc _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
| * spi: bcm2835aux: support effective_speed_hzMartin Sperl2020-07-171-3/+3
| | | | | | | | | | | | | | | | | | | | | | Setting spi_transfer->effective_speed_hz in transfer_one so that it can get used in cs_change_delay configured with delay as a muliple of SPI clock cycles. Signed-off-by: Martin Sperl <kernel@martin.sperl.org> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> Link: https://lore.kernel.org/r/20200709074120.110069-3-mkl@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
| * spi: bcm2835: support effective_speed_hzMartin Sperl2020-07-171-3/+3
| | | | | | | | | | | | | | | | | | | | | | Setting spi_transfer->effective_speed_hz in transfer_one so that it can get used in cs_change_delay configured with delay as a muliple of SPI clock cycles. Signed-off-by: Martin Sperl <kernel@martin.sperl.org> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> Link: https://lore.kernel.org/r/20200709074120.110069-2-mkl@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: coldfire-qspi: Use clk_prepare_enable and clk_disable_unprepareQing Zhang2020-07-171-2/+2
| | | | | | | | | | | | | | | | | | Convert clk_enable() to clk_prepare_enable() and clk_disable() to clk_disable_unprepare() respectively in the spi-coldfire-qspi.c. Signed-off-by: Qing Zhang <zhangqing@loongson.cn> Link: https://lore.kernel.org/r/1594790807-32319-2-git-send-email-zhangqing@loongson.cn Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: Fix SPI NOR and SPI NAND acronymsTudor Ambarus2020-07-173-7/+7
| | | | | | | | | | | | | | | | | | The industry refers to these flash types as "SPI NOR" and "SPI NAND". Be consistent and use the same acronyms. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200716051144.568606-1-tudor.ambarus@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: atmel-quadspi: Use optimezed memcpy_fromio()/memcpy_toio()Tudor Ambarus2020-07-172-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Optimezed mem*io operations are defined for LE platforms, use them. The ARM and !ARCH_EBSA110 dependencies for COMPILE_TEST were added only for the _memcpy_fromio()/_memcpy_toio() functions. Drop these dependencies. Tested unaligned accesses on both sama5d2 and sam9x60 QSPI controllers using SPI NOR flashes, everything works ok. The following performance improvement can be seen when running mtd_speedtest: sama5d2_xplained (mx25l25635e) - before: mtd_speedtest: eraseblock write speed is 983 KiB/s mtd_speedtest: eraseblock read speed is 6150 KiB/s - after: mtd_speedtest: eraseblock write speed is 1055 KiB/s mtd_speedtest: eraseblock read speed is 20144 KiB/s sam9x60ek (sst26vf064b) - before: mtd_speedtest: eraseblock write speed is 4770 KiB/s mtd_speedtest: eraseblock read speed is 8062 KiB/s - after: mtd_speedtest: eraseblock write speed is 4524 KiB/s mtd_speedtest: eraseblock read speed is 21186 KiB/s Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200716043139.565734-1-tudor.ambarus@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: Only defer to thread for cleanup when neededMark Brown2020-07-171-7/+19
|/ | | | | | | | | | | | | | | | Currently we always defer idling of controllers to the SPI thread, the goal being to ensure that we're doing teardown that's not suitable for atomic context in an appropriate context and to try to batch up more expensive teardown operations when the system is under higher load, allowing more work to be started before the SPI thread is scheduled. However when the controller does not require any substantial work to idle there is no need to do this, we can instead save the context switch and immediately mark the controller as idle. This is particularly useful for systems where there is frequent but not constant activity. Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20200715163610.9475-1-broonie@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: omap-uwire: Use clk_prepare_enable and clk_disable_unprepareQing Zhang2020-07-151-2/+2
| | | | | | | | | Convert clk_enable() to clk_prepare_enable() and clk_disable() to clk_disable_unprepare() respectively in the spi-omap-uwire.c. Signed-off-by: Qing Zhang <zhangqing@loongson.cn> Link: https://lore.kernel.org/r/1594790807-32319-1-git-send-email-zhangqing@loongson.cn Signed-off-by: Mark Brown <broonie@kernel.org>
* Merge series "mtd: spi-nor: add xSPI Octal DTR support" from Pratyush Yadav ↵Mark Brown2020-07-145-14/+32
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | <p.yadav@ti.com>: Hi, This series adds support for octal DTR flashes in the spi-nor framework, and then adds hooks for the Cypress Semper and Mircom Xcella flashes to allow running them in octal DTR mode. This series assumes that the flash is handed to the kernel in Legacy SPI mode. Tested on TI J721e EVM with 1-bit ECC on the Cypress flash. Changes in v10: - Rebase on latest linux-next/master. Drop a couple patches that made it in the previous release. - Move the code that sets 20 dummy cycles for MT35XU512ABA to its octal enable function. This way, if the controller doesn't support 8D mode 20 dummy cycles won't be used. Changes in v9: - Do not use '& 0xff' to get the opcode LSB in spi-mxic and spi-zynq-qspi. The cast to u8 will do that anyway. - Do not use if (opcode) as a check for whether the command phase exists in spi-zynq-qspi because the opcode 0 can be valid. Use the new cmd.nbytes instead. Changes in v8: - Move controller changes in spi-mxic to the commit which introduces 2-byte opcodes to avoid problems when bisecting. - Replace usage of sizeof(op->cmd.opcode) with op->cmd.nbytes. - Extract opcode in spi-zynq-qspi instead of using &op->cmd.opcode. Changes in v7: - Reject ops with more than 1 command byte in spi_mem_default_supports_op(). - Reject ops with more than 1 command byte in atmel and mtk controllers. - Reject ops with 0 command bytes in spi_mem_check_op(). - Set cmd.nbytes to 1 when using SPI_MEM_OP_CMD(). - Avoid endianness problems in spi-mxic. Changes in v6: - Instead of hard-coding 8D-8D-8D Fast Read dummy cycles to 20, find them out from the Profile 1.0 table. Changes in v5: - Do not enable stateful X-X-X modes if the reset line is broken. - Instead of setting SNOR_READ_HWCAPS_8_8_8_DTR from Profile 1.0 table parsing, do it in spi_nor_info_init_params() instead based on the SPI_NOR_OCTAL_DTR_READ flag instead. - Set SNOR_HWCAPS_PP_8_8_8_DTR in s28hs post_sfdp hook since this capability is no longer set in Profile 1.0 parsing. - Instead of just checking for spi_nor_get_protocol_width() in spi_nor_octal_dtr_enable(), make sure the protocol is SNOR_PROTO_8_8_8_DTR since get_protocol_width() only cares about data width. - Drop flag SPI_NOR_SOFT_RESET. Instead, discover soft reset capability via BFPT. - Do not make an invalid Quad Enable BFPT field a fatal error. Silently ignore it by assuming no quad enable bit is present. - Set dummy cycles for Cypress Semper flash to 24 instead of 20. This allows for 200MHz operation in 8D mode compared to the 166MHz with 20. - Rename spi_nor_cypress_octal_enable() to spi_nor_cypress_octal_dtr_enable(). - Update spi-mtk-nor.c to reject DTR ops since it doesn't call spi_mem_default_supports_op(). Changes in v4: - Refactor the series to use the new spi-nor framework with the manufacturer-specific bits separated from the core. - Add support for Micron MT35XU512ABA. - Use cmd.nbytes as the criteria of whether the data phase exists or not instead of cmd.buf.in || cmd.buf.out in spi_nor_spimem_setup_op(). - Update Read FSR to use the same dummy cycles and address width as Read SR. - Fix BFPT parsing stopping too early for JESD216 rev B flashes. - Use 2 byte reads for Read SR and FSR commands in DTR mode. Changes in v3: - Drop the DT properties "spi-rx-dtr" and "spi-tx-dtr". Instead, if later a need is felt to disable DTR in case someone has a board with Octal DTR capable flash but does not support DTR transactions for some reason, a property like "spi-no-dtr" can be added. - Remove mode bits SPI_RX_DTR and SPI_TX_DTR. - Remove the Cadence Quadspi controller patch to un-block this series. I will submit it as a separate patch. - Rebase on latest 'master' and fix merge conflicts. - Update read and write dirmap templates to use DTR. - Rename 'is_dtr' to 'dtr'. - Make 'dtr' a bitfield. - Reject DTR ops in spi_mem_default_supports_op(). - Update atmel-quadspi to reject DTR ops. All other controller drivers call spi_mem_default_supports_op() so they will automatically reject DTR ops. - Add support for both enabling and disabling DTR modes. - Perform a Software Reset on flashes that support it when shutting down. - Disable Octal DTR mode on suspend, and re-enable it on resume. - Drop enum 'spi_mem_cmd_ext' and make command opcode u16 instead. Update spi-nor to use the 2-byte command instead of the command extension. Since we still need a "extension type", mode that enum to spi-nor and name it 'spi_nor_cmd_ext'. - Default variable address width to 3 to fix SMPT parsing. - Drop non-volatile change to uniform sector mode and rely on parsing SMPT. Changes in v2: - Add DT properties "spi-rx-dtr" and "spi-tx-dtr" to allow expressing DTR capabilities. - Set the mode bits SPI_RX_DTR and SPI_TX_DTR when we discover the DT properties "spi-rx-dtr" and spi-tx-dtr". - spi_nor_cypress_octal_enable() was updating nor->params.read[] with the intention of setting the correct number of dummy cycles. But this function is called _after_ selecting the read so setting nor->params.read[] will have no effect. So, update nor->read_dummy directly. - Fix spi_nor_spimem_check_readop() and spi_nor_spimem_check_pp() passing nor->read_proto and nor->write_proto to spi_nor_spimem_setup_op() instead of read->proto and pp->proto respectively. - Move the call to cqspi_setup_opcode_ext() inside cqspi_enable_dtr(). This avoids repeating the 'if (f_pdata->is_dtr) cqspi_setup_opcode_ext()...` snippet multiple times. - Call the default 'supports_op()' from cqspi_supports_mem_op(). This makes sure the buswidth requirements are also enforced along with the DTR requirements. - Drop the 'is_dtr' argument from spi_check_dtr_req(). We only call it when a phase is DTR so it is redundant. Pratyush Yadav (17): spi: spi-mem: allow specifying whether an op is DTR or not spi: spi-mem: allow specifying a command's extension spi: atmel-quadspi: reject DTR ops spi: spi-mtk-nor: reject DTR ops mtd: spi-nor: add support for DTR protocol mtd: spi-nor: sfdp: get command opcode extension type from BFPT mtd: spi-nor: sfdp: parse xSPI Profile 1.0 table mtd: spi-nor: core: use dummy cycle and address width info from SFDP mtd: spi-nor: core: do 2 byte reads for SR and FSR in DTR mode mtd: spi-nor: core: enable octal DTR mode when possible mtd: spi-nor: sfdp: do not make invalid quad enable fatal mtd: spi-nor: sfdp: detect Soft Reset sequence support from BFPT mtd: spi-nor: core: perform a Soft Reset on shutdown mtd: spi-nor: core: disable Octal DTR mode on suspend. mtd: spi-nor: core: expose spi_nor_default_setup() in core.h mtd: spi-nor: spansion: add support for Cypress Semper flash mtd: spi-nor: micron-st: allow using MT35XU512ABA in Octal DTR mode drivers/mtd/spi-nor/core.c | 446 +++++++++++++++++++++++++++----- drivers/mtd/spi-nor/core.h | 22 ++ drivers/mtd/spi-nor/micron-st.c | 103 +++++++- drivers/mtd/spi-nor/sfdp.c | 131 +++++++++- drivers/mtd/spi-nor/sfdp.h | 8 + drivers/mtd/spi-nor/spansion.c | 166 ++++++++++++ drivers/spi/atmel-quadspi.c | 6 + drivers/spi/spi-mem.c | 16 +- drivers/spi/spi-mtk-nor.c | 10 +- drivers/spi/spi-mxic.c | 3 +- drivers/spi/spi-zynq-qspi.c | 11 +- include/linux/mtd/spi-nor.h | 53 +++- include/linux/spi/spi-mem.h | 14 +- 13 files changed, 889 insertions(+), 100 deletions(-) -- 2.27.0 base-commit: b3a9e3b9622ae10064826dccb4f7a52bd88c7407 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
| * spi: spi-mtk-nor: reject DTR opsPratyush Yadav2020-07-141-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | Double Transfer Rate (DTR) ops are added in spi-mem. But this controller doesn't support DTR transactions. Since we don't use the default supports_op(), which rejects all DTR ops, do that explicitly in our supports_op(). Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200623183030.26591-5-p.yadav@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * spi: atmel-quadspi: reject DTR opsPratyush Yadav2020-07-141-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | Double Transfer Rate (DTR) ops are added in spi-mem. But this controller doesn't support DTR transactions. Since we don't use the default supports_op(), which rejects all DTR ops, do that explicitly in our supports_op(). Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200623183030.26591-4-p.yadav@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * spi: spi-mem: allow specifying a command's extensionPratyush Yadav2020-07-144-14/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In xSPI mode, flashes expect 2-byte opcodes. The second byte is called the "command extension". There can be 3 types of extensions in xSPI: repeat, invert, and hex. When the extension type is "repeat", the same opcode is sent twice. When it is "invert", the second byte is the inverse of the opcode. When it is "hex" an additional opcode byte based is sent with the command whose value can be anything. So, make opcode a 16-bit value and add a 'nbytes', similar to how multiple address widths are handled. Some places use sizeof(op->cmd.opcode). Replace them with op->cmd.nbytes The spi-mxic and spi-zynq-qspi drivers directly use op->cmd.opcode as a buffer. Now that opcode is a 2-byte field, this can result in different behaviour depending on if the machine is little endian or big endian. Extract the opcode in a local 1-byte variable and use that as the buffer instead. Both these drivers would reject multi-byte opcodes in their supports_op() hook anyway, so we only need to worry about single-byte opcodes for now. The above two changes are put in this commit to keep the series bisectable. Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200623183030.26591-3-p.yadav@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * spi: spi-mem: allow specifying whether an op is DTR or notPratyush Yadav2020-07-141-0/+3
| | | | | | | | | | | | | | | | | | | | Each phase is given a separate 'dtr' field so mixed protocols like 4S-4D-4D can be supported. Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200623183030.26591-2-p.yadav@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: omap-100k: Drop includeLinus Walleij2020-07-141-1/+0
| | | | | | | | | | | | | | | | | | The OMAP-100k driver includes <linux/gpio.h> but does not use any symbols from it, so drop the include. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20200714073357.34879-1-linus.walleij@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: imx/fsl-lpspi: Convert to GPIO descriptorsLinus Walleij2020-07-132-120/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This converts the two Freescale i.MX SPI drivers Freescale i.MX (CONFIG_SPI_IMX) and Freescale i.MX LPSPI (CONFIG_SPI_FSL_LPSPI) to use GPIO descriptors handled in the SPI core for GPIO chip selects whether defined in the device tree or a board file. The reason why both are converted at the same time is that they were both using the same platform data and platform device population helpers when using board files intertwining the code so this gives a cleaner cut. The platform device creation was passing a platform data container from each boardfile down to the driver using struct spi_imx_master from <linux/platform_data/spi-imx.h>, but this was only conveying the number of chipselects and an int * array of the chipselect GPIO numbers. The imx27 and imx31 platforms had code passing the now-unused platform data when creating the platform devices, this has been repurposed to pass around GPIO descriptor tables. The platform data struct that was just passing an array of integers and number of chip selects for the GPIO lines has been removed. The number of chipselects used to be passed from the board file, because this number also limits the number of native chipselects that the platform can use. To deal with this we just augment the i.MX (CONFIG_SPI_IMX) driver to support 3 chipselects if the platform does not define "num-cs" as a device property (such as from the device tree). This covers all the legacy boards as these use <= 3 native chip selects (or GPIO lines, and in that case the number of chip selects is determined by the core from the number of available GPIO lines). Any new boards should use device tree, so this is a reasonable simplification to cover all old boards. The LPSPI driver never assigned the number of chipselects and thus always fall back to the core default of 1 chip select if no GPIOs are defined in the device tree. The Freescale i.MX driver was already partly utilizing the SPI core to obtain the GPIO numbers from the device tree, so this completes the transtion to let the core handle all of it. All board files and the core i.MX boardfile registration code is augmented to account for these changes. This has been compile-tested with the imx_v4_v5_defconfig and the imx_v6_v7_defconfig. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Shawn Guo <shawnguo@kernel.org> Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Cc: Robin Gong <yibin.gong@nxp.com> Cc: Trent Piepho <tpiepho@impinj.com> Cc: Clark Wang <xiaoning.wang@nxp.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Pengutronix Kernel Team <kernel@pengutronix.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: NXP Linux Team <linux-imx@nxp.com> Link: https://lore.kernel.org/r/20200625200252.207614-1-linus.walleij@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
* | SPI SUBSYSTEM: Replace HTTP links with HTTPS onesAlexander A. Klimov2020-07-093-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rationale: Reduces attack surface on kernel devs opening the links for MITM as HTTPS traffic is much harder to manipulate. Deterministic algorithm: For each file: If not .svg: For each line: If doesn't contain `\bxmlns\b`: For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`: If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`: If both the HTTP and HTTPS versions return 200 OK and serve the same content: Replace HTTP with HTTPS. Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de> Link: https://lore.kernel.org/r/20200708194400.22213-1-grandmaster@al2klimov.de Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: atmel: remove redundant label out_freeColin Ian King2020-07-091-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | The error exit label out_free is no longer being used, it is redundant and can be removed. Cleans up warning: drivers/spi/spi-atmel.c:1680:1: warning: label ‘out_free’ defined but not used [-Wunused-label] Fixes: 2d9a744685bc ("spi: atmel: No need to call spi_master_put() if spi_alloc_master() failed") Signed-off-by: Colin Ian King <colin.king@canonical.com> Link: https://lore.kernel.org/r/20200709101203.1374117-1-colin.king@canonical.com Signed-off-by: Mark Brown <broonie@kernel.org>
* | spi: use kthread_create_worker() helperMarek Szyprowski2020-07-091-14/+12
| | | | | | | | | | | | | | | | | | | | | | | | Use kthread_create_worker() helper to simplify the code. It uses the kthread worker API the right way. It will eventually allow to remove the FIXME in kthread_worker_fn() and add more consistency checks in the future. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Petr Mladek <pmladek@suse.com> Link: https://lore.kernel.org/r/20200709065007.26896-1-m.szyprowski@samsung.com Signed-off-by: Mark Brown <broonie@kernel.org>
* | Merge series "spi: spi-geni-qcom: Avoid a bunch of per-transfer overhead" ↵Mark Brown2020-07-071-0/+2
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | from Douglas Anderson <dianders@chromium.org>: This series tries to reduce a whole bunch of overhead in each SPI transfer. Much of this overhead is new with the recent interconnect changes, but even without those changes we still had some overhead that we could avoid. Let's avoid all of it. These changes are atop the Qualcomm tree to avoid merge conflicts. If they look good, the most expedient way to land them is probably to get Ack's from Mark and land then via the Qualcomm tree. Most testing was done on the Chrome OS 5.4 tree, but sanity check was done on mainline. Douglas Anderson (3): spi: spi-geni-qcom: Avoid clock setting if not needed spi: spi-geni-qcom: Set an autosuspend delay of 250 ms spi: spi-geni-qcom: Get rid of most overhead in prepare_message() drivers/spi/spi-geni-qcom.c | 67 ++++++++++++++++++------------------- 1 file changed, 32 insertions(+), 35 deletions(-) -- 2.27.0.383.g050319c2ae-goog
| * | spi: spi-geni-qcom: Set an autosuspend delay of 250 msDouglas Anderson2020-07-071-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In commit 0e3b8a81f5df ("spi: spi-geni-qcom: Add interconnect support") the spi_geni_runtime_suspend() and spi_geni_runtime_resume() became a bit slower. Measuring on my hardware I see numbers in the hundreds of microseconds now. Let's use autosuspend to help avoid some of the overhead. Now if we're doing a bunch of transfers we won't need to be constantly chruning. The number 250 ms for the autosuspend delay was picked a bit arbitrarily, so if someone has measurements showing a better value we could easily change this. Fixes: 0e3b8a81f5df ("spi: spi-geni-qcom: Add interconnect support") Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Akash Asthana<akashast@codeaurora.org> Link: https://lore.kernel.org/r/20200701174506.2.I9b8f6bb1e7e6d8847e2ed2cf854ec55678db427f@changeid Signed-off-by: Mark Brown <broonie@kernel.org>
* | | Merge series "spi: spi-sun6i: One fix and some improvements" from Marc ↵Mark Brown2020-07-076-106/+114
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Kleine-Budde <mkl@pengutronix.de>: Hello, this series first fixes the calculation of the clock rate. The driver will round up to the nearest clock rate instead of rounding down. Resulting in SPI devices accessed with a too high SPI clock. The remaining patches improve the performance of the driver. The changes range from micro-optimizations like reducing MMIO writes to the controller to reducing the number of needed interrupts in some use cases. regards, Marc changes since v1: - added Maxime Ripard's to the existing patches - 06/10: (was 05/10 in v1) "spi: spi-sun6i: sun6i_spi_drain_fifo(): introduce sun6i_spi_get_rx_fifo_count() and make use of it" use FIELD_GET instead of open coding it (tnx: Maxime Ripard) - 05/10: "spi: spi-sun6i: sun6i_spi_get_tx_fifo_count: Convert manual shift+mask to FIELD_GET()" new patch _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
| * | | spi: spi-sun6i: sun6i_spi_transfer_one(): enable RF_RDY interrupt only if neededMarc Kleine-Budde2020-07-071-4/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In sun6i_spi_transfer_one() the RX FIFO Ready (SUN6I_INT_CTL_RF_RDY) is unconditionally enabled. A RX interrupt is only needed, if more data than fits into the FIFO is going to be received during this transfer. As the RX-FIFO is drained during transfer complete interrupt, enable the RX FIFO Ready interrupt only if the data doesn't fit into the FIFO. Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> Acked-by: Maxime Ripard <mripard@kernel.org> Link: https://lore.kernel.org/r/20200706143443.9855-11-mkl@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
| * | | spi: spi-sun6i: sun6i_spi_transfer_one(): collate write to Interrupt Control ↵Marc Kleine-Budde2020-07-071-12/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Register In sun6i_spi_transfer_one() the Interrupt Control Register is written three times. This patch collates the three writes into one. Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> Acked-by: Maxime Ripard <mripard@kernel.org> Link: https://lore.kernel.org/r/20200706143443.9855-10-mkl@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
| * | | spi: spi-sun6i: sun6i_spi_fill_fifo(): remove not needed length argumentMarc Kleine-Budde2020-07-071-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The function sun6i_spi_fill_fifo() is called with a length argument of "sspi->fifo_depth" and "SUN6I_FIFO_DEPTH". The driver reads the number of free bytes in the FIFO from the hardware and uses the length argument to limit this value. This is not needed as the number of free bytes in the FIFO is always less or equal the depth of the FIFO. This patch removes the length argument and check. Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> Acked-by: Maxime Ripard <mripard@kernel.org> Link: https://lore.kernel.org/r/20200706143443.9855-9-mkl@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
| * | | spi: spi-sun6i: sun6i_spi_drain_fifo(): remove not needed length argumentMarc Kleine-Budde2020-07-071-8/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The function sun6i_spi_drain_fifo() is called with a length argument of "sspi->fifo_depth" and "SUN6I_FIFO_DEPTH". The driver reads the number of available bytes to read from the FIFO from the hardware and uses the length argument to limit this value. This is not needed as the FIFO can contain only the fifo depth number of bytes. This patch removes the length argument and check. Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> Acked-by: Maxime Ripard <mripard@kernel.org> Link: https://lore.kernel.org/r/20200706143443.9855-8-mkl@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
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