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* Merge tag 'spi-v6.5' of ↵Linus Torvalds2023-06-2824-347/+1437
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi Pull spi updates from Mark Brown: "One small core feature this time around but mostly driver improvements and additions for SPI: - Add support for controlling the idle state of MOSI, some systems can support this and depending on the system integration may need it to avoid glitching in some situations - Support for polling mode in the S3C64xx driver and DMA on the Qualcomm QSPI driver - Support for several Allwinner SoCs, AMD Pensando Elba, Intel Mount Evans, Renesas RZ/V2M, and ST STM32H7" * tag 'spi-v6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (66 commits) spi: dt-bindings: atmel,at91rm9200-spi: fix broken sam9x7 compatible spi: dt-bindings: atmel,at91rm9200-spi: add sam9x7 compatible spi: Add support for Renesas CSI spi: dt-bindings: Add bindings for RZ/V2M CSI spi: sun6i: Use the new helper to derive the xfer timeout value spi: atmel: Prevent false timeouts on long transfers spi: dt-bindings: stm32: do not disable spi-slave property for stm32f4-f7 spi: Create a helper to derive adaptive timeouts spi: spi-geni-qcom: correctly handle -EPROBE_DEFER from dma_request_chan() spi: stm32: disable spi-slave property for stm32f4-f7 spi: stm32: introduction of stm32h7 SPI device mode support spi: stm32: use dmaengine_terminate_{a}sync instead of _all spi: stm32: renaming of spi_master into spi_controller spi: dw: Remove misleading comment for Mount Evans SoC spi: dt-bindings: snps,dw-apb-ssi: Add compatible for Intel Mount Evans SoC spi: dw: Add compatible for Intel Mount Evans SoC spi: s3c64xx: Use dev_err_probe() spi: s3c64xx: Use the managed spi master allocation function spi: spl022: Probe defer is no error spi: spi-imx: fix mixing of native and gpio chipselects for imx51/imx53/imx6 variants ...
| * spi: Add support for Renesas CSIFabrizio Castro2023-06-233-0/+674
| | | | | | | | | | | | | | | | | | | | | | The RZ/V2M SoC comes with the Clocked Serial Interface (CSI) IP, which is a master/slave SPI controller. This commit adds a driver to support CSI master mode. Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com> Link: https://lore.kernel.org/r/Message-Id: <20230622113341.657842-4-fabrizio.castro.jz@renesas.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * spi: Helper for deriving timeout valuesMark Brown2023-06-232-8/+12
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge series from Miquel Raynal <miquel.raynal@bootlin.com>: I recently came across an issue with the Atmel spi controller driver which would stop my transfers after a too small timeout when performing big transfers (reading a 4MiB flash in one transfer). My initial idea was to derive a the maximum amount of time a transfer would take depending on its size and use that as value to avoid erroring-out when not relevant. Mark wanted to go further by creating a core helper doing that, based on the heuristics from the sun6i driver. Here is a small series of 3 patches doing exactly that.
| | * spi: sun6i: Use the new helper to derive the xfer timeout valueMiquel Raynal2023-06-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A helper was recently added to the core to factorize common code between drivers, like the amount of time a driver should wait for a transfer to happen. It is of course possible to use a default value (like eg. 1s) but it is way stronger to adapt this amount of time to the transfer. Indeed, long transfers (eg. 4MiB) on a slow single-spi bus might take more than the usual second of timeout and prevent lengthy transfers. The core helper was heavily inspired by the logic applied in this driver, the only difference being the minimum amount of time which was enlarged from 0.1s to 0.5s. Use this helper instead of open-coding it. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Jernej Škrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/Message-Id: <20230622090634.3411468-4-miquel.raynal@bootlin.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * spi: atmel: Prevent false timeouts on long transfersMiquel Raynal2023-06-221-7/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A slow SPI bus clocks at ~20MHz, which means it would transfer about 2500 bytes per second with a single data line. Big transfers, like when dealing with flashes can easily reach a few MiB. The current DMA timeout is set to 1 second, which means any working transfer of about 4MiB will always be cancelled. With the above derivations, on a slow bus, we can assume every byte will take at most 0.4ms. Said otherwise, we could add 4ms to the 1-second timeout delay every 10kiB. On a 4MiB transfer, it would bring the timeout delay up to 2.6s which still seems rather acceptable for a timeout. The consequence of this is that long transfers might be allowed, which hence requires the need to interrupt the transfer if wanted by the user. We can hence switch to the _interruptible variant of wait_for_completion. This leads to a little bit more handling to also handle the interrupted case but looks really acceptable overall. While at it, we drop the useless, noisy and redundant WARN_ON() call. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Ryan Wanner <ryan.wanner@microchip.com> Link: https://lore.kernel.org/r/Message-Id: <20230622090634.3411468-3-miquel.raynal@bootlin.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: spi-geni-qcom: correctly handle -EPROBE_DEFER from dma_request_chan()Neil Armstrong2023-06-191-0/+2
| |/ | | | | | | | | | | | | | | | | | | | | | | Now spi_geni_grab_gpi_chan() errors are correctly reported, the -EPROBE_DEFER error should be returned from probe in case the GPI dma driver is built as module and/or not probed yet. Fixes: b59c122484ec ("spi: spi-geni-qcom: Add support for GPI dma") Fixes: 6532582c353f ("spi: spi-geni-qcom: fix error handling in spi_geni_grab_gpi_chan()") Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230615-topic-sm8550-upstream-fix-spi-geni-qcom-probe-v2-1-670c3d9e8c9c@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
| * spi: stm32: introduction of stm32h7 SPI device mode supportValentin Caron2023-06-152-34/+79
| | | | | | | | | | | | | | | | | | | | | | Add support for stm32h7 to use SPI controller in device role. In such case, the spi instance should have the spi-slave property defined. Signed-off-by: Alain Volmat <alain.volmat@foss.st.com> Signed-off-by: Valentin Caron <valentin.caron@foss.st.com> Link: https://lore.kernel.org/r/20230615075815.310261-5-valentin.caron@foss.st.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * spi: stm32: use dmaengine_terminate_{a}sync instead of _allAlain Volmat2023-06-151-5/+5
| | | | | | | | | | | | | | | | | | | | Avoid usage of deprecated dmaengine_terminate_all and use dmaengine_terminate_sync and dmaengine_terminate_async instead. Signed-off-by: Alain Volmat <alain.volmat@foss.st.com> Signed-off-by: Valentin Caron <valentin.caron@foss.st.com> Link: https://lore.kernel.org/r/20230615075815.310261-3-valentin.caron@foss.st.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * spi: stm32: renaming of spi_master into spi_controllerAlain Volmat2023-06-151-77/+77
| | | | | | | | | | | | | | | | | | | | | | | | | | Preparing introduction of SPI device, rename the spi_master structure into spi_controller. This doesn't have any functional impact since spi_master was already a macro for spi_controller. Referring now to ctrl instead of master since the spi_controller structure might not be used as a master controller only. Signed-off-by: Alain Volmat <alain.volmat@foss.st.com> Signed-off-by: Valentin Caron <valentin.caron@foss.st.com> Link: https://lore.kernel.org/r/20230615075815.310261-2-valentin.caron@foss.st.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * spi: s3c64xx: CleanupsMark Brown2023-06-071-51/+30
| |\ | | | | | | | | | | | | | | | | | | | | | Merge series from Andi Shyti <andi.shyti@kernel.org>: Two small cleanups in the probe function. The first puts in use the managed spi master allocation while the second implements the dev_err_probe() function.
| | * spi: s3c64xx: Use dev_err_probe()Andi Shyti2023-06-061-38/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | Simplify the code by using dev_err_probe() instead of dev_err() and 'return'. Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/r/20230606012051.2139333-3-andi.shyti@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
| | * spi: s3c64xx: Use the managed spi master allocation functionAndi Shyti2023-06-061-18/+8
| | | | | | | | | | | | | | | | | | | | | | | | Use devm_spi_alloc_master() and get rid of one goto error path Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/r/20230606012051.2139333-2-andi.shyti@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: dw: Remove misleading comment for Mount Evans SoCAbe Kohandel2023-06-071-8/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove a misleading comment about the DMA operations of the Intel Mount Evans SoC's SPI Controller as requested by Serge. Signed-off-by: Abe Kohandel <abe.kohandel@intel.com> Link: https://lore.kernel.org/linux-spi/20230606191333.247ucbf7h3tlooxf@mobilestation/ Fixes: 0760d5d0e9f0 ("spi: dw: Add compatible for Intel Mount Evans SoC") Reviewed-by: Serge Semin <fancer.lancer@gmail.com> Link: https://lore.kernel.org/r/20230606231844.726272-1-abe.kohandel@intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: dw: Add compatible for Intel Mount Evans SoCAbe Kohandel2023-06-061-0/+29
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Intel Mount Evans SoC's Integrated Management Complex uses the SPI controller for access to a NOR SPI FLASH. However, the SoC doesn't provide a mechanism to override the native chip select signal. This driver doesn't use DMA for memory operations when a chip select override is not provided due to the native chip select timing behavior. As a result no DMA configuration is done for the controller and this configuration is not tested. The controller also has an errata where a full TX FIFO can result in data corruption. The suggested workaround is to never completely fill the FIFO. The TX FIFO has a size of 32 so the fifo_len is set to 31. Signed-off-by: Abe Kohandel <abe.kohandel@intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20230606145402.474866-2-abe.kohandel@intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * spi: spl022: Probe defer is no errorMårten Lindahl2023-06-021-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | When the spi controller is registered and the cs_gpiods cannot be assigned, causing a defer of the probe, there is an error print saying: "probe - problem registering spi master" This should not be announced as an error. Print this message for all errors except for the probe defer. Signed-off-by: Mårten Lindahl <marten.lindahl@axis.com> Link: https://lore.kernel.org/r/20230602-pl022-defer-fix-v2-1-383f6bc2293a@axis.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * spi: spi-imx: fix mixing of native and gpio chipselects for imx51/imx53/imx6 ↵Rasmus Villemoes2023-06-021-13/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | variants Commit 87c614175bbf (spi: spi-imx: fix MX51_ECSPI_* macros when cs > 3) ensured that the argument passed to the macros was masked with &3, so that we no longer write outside the intended fields in the various control registers. When all chip selects are gpios, this works just fine. However, when a mix of native and gpio chip selects are in use, that masking is too naive. Say, for example, that SS0 is muxed as native chip select, and there is also a chip at 4 (obviously with a gpio cs). In that case, when accessing the latter chip, both the SS0 pin and the gpio pin will be asserted low. The fix for this is to use the ->unused_native_cs value as channel number for any spi device which uses a gpio as chip select. Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Link: https://lore.kernel.org/r/20230602115731.708883-1-linux@rasmusvillemoes.dk Signed-off-by: Mark Brown <broonie@kernel.org>
| * spi: s3c64xx: Use devm_clk_get_enabled()Andi Shyti2023-06-011-34/+5
| | | | | | | | | | | | | | | | | | Replace the tuple devm_clk_get()/clk_prepare_enable() with the single function devm_clk_get_enabled(). Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/r/20230531205550.568340-1-andi.shyti@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
| * spi: dw: Drop empty line from DebugFS init functionSerge Semin2023-05-311-1/+0
| | | | | | | | | | | | | | | | | | | | | | Just drop a redundant empty line from the dw_spi_debugfs_init() function left in the framework of the commit 0178f1e5d984 ("spi-dw-core.c: Fix error checking for debugfs_create_dir") after removing the last return statement. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Link: https://lore.kernel.org/r/20230530221725.26319-1-Sergey.Semin@baikalelectronics.ru Signed-off-by: Mark Brown <broonie@kernel.org>
| * spi: spi-fsl-lpspi: downgrade log level for pio modeAlexander Stein2023-05-311-1/+1
| | | | | | | | | | | | | | | | | | | | Having no DMA is not an error. The simplest reason is not having it configured. SPI will still be usable, so raise a warning instead to get still some attention. Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Link: https://lore.kernel.org/r/20230531072850.739021-1-alexander.stein@ew.tq-group.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * spi: spi-qcom-qspi: Add newline to PIO fallback warningDouglas Anderson2023-05-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | A warning added in commit b5762d95607e ("spi: spi-qcom-qspi: Add DMA mode support") was missing a newline. Add it. Reported-by: Stephen Boyd <swboyd@chromium.org> Closes: https://chromium-review.googlesource.com/c/chromiumos/third_party/kernel/+/4573857/comment/44331d65_79128099/ Fixes: b5762d95607e ("spi: spi-qcom-qspi: Add DMA mode support") Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20230530111348.1.Ibd1f4827e18a26dc802cd6e5ac300d83dc1bc41c@changeid Signed-off-by: Mark Brown <broonie@kernel.org>
| * spi: Merge up fixes to help CIMark Brown2023-05-306-84/+78
| |\ | | | | | | | | | Get the fixes into CI for development.
| * \ spi: add SPI_MOSI_IDLE_LOW mode bitMark Brown2023-05-302-2/+10
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge series from Boerge Struempfel <boerge.struempfel@gmail.com>: Some spi controller switch the mosi line to high, whenever they are idle. This may not be desired in all use cases. For example neopixel leds can get confused and flicker due to misinterpreting the idle state. Therefore, we introduce a new spi-mode bit, with which the idle behaviour can be overwritten on a per device basis.
| | * | spi: spidev: add two new spi mode bitsBoerge Struempfel2023-05-301-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow userspace to set SPI_MOSI_IDLE_LOW and the SPI_3WIRE_HIZ mode bit using the SPI_IOC_WR_MODE32 ioctl. Signed-off-by: Boerge Struempfel <boerge.struempfel@gmail.com> Link: https://lore.kernel.org/r/20230530141641.1155691-4-boerge.struempfel@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | spi: spi-imx: add support for SPI_MOSI_IDLE_LOW mode bitBoerge Struempfel2023-05-301-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By default, the spi-imx controller pulls the mosi line high, whenever it is idle. This behaviour can be inverted per CS by setting the corresponding DATA_CTL bit in the config register of the controller. Also, since the controller mode-bits have to be touched anyways, the SPI_CPOL and SPI_CPHA are replaced by the combined SPI_MODE_X_MASK flag. Signed-off-by: Boerge Struempfel <boerge.struempfel@gmail.com> Link: https://lore.kernel.org/r/20230530141641.1155691-3-boerge.struempfel@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * | | spi: mt65xx: Convert to platform remove callbackMark Brown2023-05-301-13/+17
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge series from Uwe Kleine-König <u.kleine-koenig@pengutronix.de>: Hello, compared to (implicit) v1 sent in March with Message-Id: <20230309094704.2568531-1-u.kleine-koenig@pengutronix.de>, I reworked patch 1 on feedback by AngeloGioacchino Del Regno. Patches 2 and 3 got his Reviewed-by. Best regards Uwe Uwe Kleine-König (3): spi: mt65xx: Properly handle failures in .remove() spi: mt65xx: Convert to platform remove callback returning void spi: mt65xx: Don't disguise a "return 0" as "return ret" drivers/spi/spi-mt65xx.c | 30 +++++++++++++++++------------- 1 file changed, 17 insertions(+), 13 deletions(-) base-commit: ac9a78681b921877518763ba0e89202254349d1b -- 2.39.2
| | * | | spi: mt65xx: Don't disguise a "return 0" as "return ret"Uwe Kleine-König2023-05-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Because of the earlier if (ret) return ret; ret is always zero at the end of mtk_spi_suspend(). Write it as explicit return 0 for slightly improved clearness. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/20230530081648.2199419-4-u.kleine-koenig@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | | spi: mt65xx: Convert to platform remove callback returning voidUwe Kleine-König2023-05-301-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/20230530081648.2199419-3-u.kleine-koenig@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | | spi: mt65xx: Properly handle failures in .remove()Uwe Kleine-König2023-05-301-8/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Returning an error code in a platform driver's remove function is wrong most of the time and there is an effort to make the callback return void. To prepare this rework the function not to exit early. There wasn't a real problem because if pm runtime resume failed the only step missing was pm_runtime_disable() which isn't an issue. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20230530081648.2199419-2-u.kleine-koenig@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
| * | | | spi-dw-core.c: Fix error checking for debugfs_create_dirOsama Muhammad2023-05-301-6/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes the error checking in spi-dw-core.c in debugfs_create_dir. The DebugFS kernel API is developed in a way that the caller can safely ignore the errors that occur during the creation of DebugFS nodes. Signed-off-by: Osama Muhammad <osmtendev@gmail.com> Link: https://lore.kernel.org/r/20230520224025.14928-1-osmtendev@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * | | | spi: spi-sn-f-ospi: Make read-only array `width_available` static constLars-Peter Clausen2023-05-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The `width_available` array is currently placed on the `f_ospi_supports_op_width()` function's stack. But the array is never modified. Make it `static const`. This makes the code slightly smaller and more efficient. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Link: https://lore.kernel.org/r/20230528195830.164669-3-lars@metafoo.de Signed-off-by: Mark Brown <broonie@kernel.org>
| * | | | spi: spi-sn-f-ospi: Use min_t instead of opencoding itLars-Peter Clausen2023-05-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use `min_t` instead of `min` with casting the individual arguments. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Link: https://lore.kernel.org/r/20230528195830.164669-2-lars@metafoo.de Signed-off-by: Mark Brown <broonie@kernel.org>
| * | | | spi: spi-sn-f-ospi: Use devm_clk_get_enabled()Lars-Peter Clausen2023-05-301-12/+1
| | |/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace the combination of devm_clk_get_enable() plus clk_prepare_enable() with devm_clk_get_enabled(). Slightly reduces the amount of boilerplate code. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Link: https://lore.kernel.org/r/20230528195830.164669-1-lars@metafoo.de Signed-off-by: Mark Brown <broonie@kernel.org>
| * | | spi: Switch i2c drivers back to use .probe()Uwe Kleine-König2023-05-262-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After commit b8a1a4cd5a98 ("i2c: Provide a temporary .probe_new() call-back type"), all drivers being converted to .probe_new() and then 03c835f498b5 ("i2c: Switch .probe() to not take an id parameter") convert back to (the new) .probe() to be able to eventually drop .probe_new() from struct i2c_driver. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/20230525211047.735789-1-u.kleine-koenig@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
| * | | spi: mediatek: advertise the availability of Dual and Quad modeQii Wang2023-05-251-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | this patch advertise the availability of Dual and Quad SPI mode for ipm design. Signed-off-by: Qii Wang <qii.wang@mediatek.com> Signed-off-by: Tim.Kuo <Tim.kuo@mediatek.com> Link: https://lore.kernel.org/r/20230523112608.10298-1-qii.wang@mediatek.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * | | spi: spi-imx: set max_native_cs for imx51/imx53/imx6 variantsRasmus Villemoes2023-05-231-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ecspi IP block on imx51/imx53/imx6 have four native chip selects. Tell that to the spi core so that any non-gpio chip selects get validated against that upper bound. Also set the SPI_MASTER_GPIO_SS so that the core verifies that, in the case where both native and gpio chip selects are in use, there is at least one leftover native chip select (or "channel", in the ecspi language) for use by the slaves sitting on gpio chip selects. Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Link: https://lore.kernel.org/r/20230425134527.483607-3-linux@rasmusvillemoes.dk Signed-off-by: Mark Brown <broonie@kernel.org>
| * | | spi: spi-imx: use "controller" variable consistently in spi_imx_probe()Rasmus Villemoes2023-05-231-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Near the top of the function, spi_imx->controller is set to controller (and is of course never modified again). The rest of the function uses a mix of the two expressions. For consistency, readability and better code generation, drop all the spi_imx-> indirections. Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Link: https://lore.kernel.org/r/20230425134527.483607-2-linux@rasmusvillemoes.dk Signed-off-by: Mark Brown <broonie@kernel.org>
| * | | spi: spi-cadence: Add missing kernel doc for clk_rate in cdns_spiCharles Keepax2023-05-231-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the missing kernel documentation to silence the build warning. Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com> Link: https://lore.kernel.org/r/20230523090124.3132-1-ckeepax@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * | | spi: hisi-kunpeng: Fix error checkingYeqi Fu2023-05-181-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The function debugfs_create_dir returns ERR_PTR if an error occurs, and the appropriate way to verify for errors is to use the inline function IS_ERR. The patch will substitute the null-comparison with IS_ERR. Suggested-by: Ivan Orlov <ivan.orlov0322@gmail.com Signed-off-by: Yeqi Fu <asuk4.q@gmail.com Link: https://lore.kernel.org/r/20230518052515.368978-1-asuk4.q@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org
| * | | spi: cadence-quadspi: Add compatible for AMD Pensando Elba SoCBrad Larson2023-05-171-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The AMD Pensando Elba SoC has the Cadence QSPI controller integrated. The quirk CQSPI_NEEDS_APB_AHB_HAZARD_WAR is added and if enabled a dummy readback from the controller is performed to ensure synchronization. Signed-off-by: Brad Larson <blarson@amd.com Link: https://lore.kernel.org/r/20230515181606.65953-8-blarson@amd.com Signed-off-by: Mark Brown <broonie@kernel.org
| * | | spi: dw: Round of n_bytes to power of 2Joy Chakraborty2023-05-151-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | n_bytes variable in the driver represents the number of bytes per word that needs to be sent/copied to fifo. Bits/word can be between 8 and 32 bits from the client but in memory they are a power of 2, same is mentioned in spi.h header: " * @bits_per_word: Data transfers involve one or more words; word sizes * like eight or 12 bits are common. In-memory wordsizes are * powers of two bytes (e.g. 20 bit samples use 32 bits). * This may be changed by the device's driver, or left at the * default (0) indicating protocol words are eight bit bytes. * The spi_transfer.bits_per_word can override this for each transfer. " Hence, round of n_bytes to a power of 2 to avoid values like 3 which would generate unalligned/odd accesses to memory/fifo. * tested on Baikal-T1 based system with DW SPI-looped back interface transferring a chunk of data with DFS:8,12,16. Fixes: a51acc2400d4 ("spi: dw: Add support for 32-bits max xfer size") Suggested-by: Andy Shevchenko <andriy.shevchenko@intel.com Signed-off-by: Joy Chakraborty <joychakr@google.com Reviewed-by: Serge Semin <fancer.lancer@gmail.com Tested-by: Serge Semin <fancer.lancer@gmail.com Link: https://lore.kernel.org/r/20230512104746.1797865-4-joychakr@google.com Signed-off-by: Mark Brown <broonie@kernel.org
| * | | spi: dw: Add DMA address widths capability checkJoy Chakraborty2023-05-152-1/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Store address width capabilities of DMA controller during init and check the same per transfer to make sure the bits/word requirement can be met. Current DW DMA driver requires both tx and rx channel to be configured and functional hence a subset of both tx and rx channel address width capability is checked with the width requirement(n_bytes) for a transfer. * tested on Baikal-T1 based system with DW SPI-looped back interface transferring a chunk of data with DFS:8,12,16. Signed-off-by: Joy Chakraborty <joychakr@google.com Reviewed-by: Serge Semin <fancer.lancer@gmail.com Tested-by: Serge Semin <fancer.lancer@gmail.com Link: https://lore.kernel.org/r/20230512104746.1797865-3-joychakr@google.com Signed-off-by: Mark Brown <broonie@kernel.org
| * | | spi: dw: Add DMA directional capability checkJoy Chakraborty2023-05-151-9/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Check capabilities of DMA controller during init to make sure it is capable of handling MEM2DEV for tx channel, DEV2MEM for rx channel. Current DW DMA driver requires both tx and rx channel to be configured and functional for any kind of transfers to take effect including half duplex. Hence, check for both tx and rx direction and fail on unavailbility of either. * tested on Baikal-T1 based system with DW SPI-looped back interface transferring a chunk of data with DFS:8,12,16. Signed-off-by: Joy Chakraborty <joychakr@google.com Reviewed-by: Serge Semin <fancer.lancer@gmail.com Tested-by: Serge Semin <fancer.lancer@gmail.com Link: https://lore.kernel.org/r/20230512104746.1797865-2-joychakr@google.com Signed-off-by: Mark Brown <broonie@kernel.org
| * | | spi: sun6i: add support for R329/D1/R528/T113s SPI controllersMaksim Kiselev2023-05-121-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These SoCs has two SPI controllers. One of it is quite similar to previous ones, but with internal clock divider removed; the other added MIPI DBI Type-C offload based on the first one. Add basical support for these controllers. As we're not going to support the DBI functionality now, just implement the two kinds of controllers as the same. Co-developed-by: Icenowy Zheng <icenowy@aosc.io Signed-off-by: Maksim Kiselev <bigunclemax@gmail.com Reviewed-by: Andre Przywara <andre.przywara@arm.com Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com Link: https://lore.kernel.org/r/20230510081121.3463710-5-bigunclemax@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org
| * | | spi: sun6i: add quirk for in-controller clock dividerMaksim Kiselev2023-05-121-30/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously SPI controllers in Allwinner SoCs has a clock divider inside. However now the clock divider is removed and to set the transfer clock rate it's only needed to set the SPI module clock to the target value and configure a proper work mode. According to the datasheet there are three work modes: | SPI Sample Mode | SDM(bit13) | SDC(bit11) | Run Clock | |-------------------------|------------|------------|-----------| | normal sample | 1 | 0 | <= 24 MHz | | delay half cycle sample | 0 | 0 | <= 40 MHz | | delay one cycle sample | 0 | 1 | >= 80 MHz | Add a quirk for this kind of SPI controllers. Co-developed-by: Icenowy Zheng <icenowy@aosc.io Signed-off-by: Maksim Kiselev <bigunclemax@gmail.com Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com Reviewed-by: Andre Przywara <andre.przywara@arm.com Link: https://lore.kernel.org/r/20230510081121.3463710-4-bigunclemax@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org
| * | | spi: sun6i: change OF match data to a structIcenowy Zheng2023-05-121-10/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As we're adding more properties to the OF match data, convert it to a struct now. Signed-off-by: Icenowy Zheng <icenowy@aosc.io Signed-off-by: Maksim Kiselev <bigunclemax@gmail.com Reviewed-by: Samuel Holland <samuel@sholland.org Reviewed-by: Andre Przywara <andre.przywara@arm.com Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com Link: https://lore.kernel.org/r/20230510081121.3463710-3-bigunclemax@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org
| * | | spi: s3c64xx: Disable IRQ mode when using DMAJaewon Kim2023-05-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixing the problem of enabling DMA mode and IRQ mode at the same time. In this case, a value of more than 6bits is written to RDY_LVL, it can cause an invasion of other registers, potentially leading to SPI transfer failure. Fixes: 1ee806718d5e ("spi: s3c64xx: support interrupt based pio mode") Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com Reported-by: Marek Szyprowski <m.szyprowski@samsung.com Tested-by: Marek Szyprowski <m.szyprowski@samsung.com Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org Link: https://lore.kernel.org/r/20230510113942.89994-1-jaewon02.kim@samsung.com Signed-off-by: Mark Brown <broonie@kernel.org
| * | | spi: dw: DW SPI DMA Driver updatesMark Brown2023-05-081-10/+14
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge series from Joy Chakraborty <joychakr@google.com>: This Patch series adds support for 32 bits per word trasfers using DMA and some defensive checks around dma controller capabilities.
| | * | | spi: dw: Move dw_spi_can_dma()Joy Chakraborty2023-05-081-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move dw_spi_can_dma() implementation below dw_spi_dma_convert_width() for handing compile dependency in future patches. * tested on Baikal-T1 based system with DW SPI-looped back interface transferring a chunk of data with DFS:8,12,16. Signed-off-by: Joy Chakraborty <joychakr@google.com Reviewed-by: Serge Semin <fancer.lancer@gmail.com Tested-by: Serge Semin <fancer.lancer@gmail.com Link: https://lore.kernel.org/r/20230427123314.1997152-3-joychakr@google.com Signed-off-by: Mark Brown <broonie@kernel.org
| | * | | spi: dw: Add 32 bpw support to SPI DW DMA driverJoy Chakraborty2023-05-081-4/+8
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add Support for AxSize = 4 bytes configuration from dw dma driver if n_bytes i.e. number of bytes per write to fifo is 4. Number of bytes written to fifo per write is depended on the bits/word configuration being used which the DW core driver translates to n_bytes. Hence, for bits per word values between 17 and 32 n_bytes should be equal to 4. * tested on Baikal-T1 based system with DW SPI-looped back interface transferring a chunk of data with DFS:8,12,16. Signed-off-by: Joy Chakraborty <joychakr@google.com Reviewed-by: Serge Semin <fancer.lancer@gmail.com Tested-by: Serge Semin <fancer.lancer@gmail.com Link: https://lore.kernel.org/r/20230427123314.1997152-2-joychakr@google.com Signed-off-by: Mark Brown <broonie@kernel.org
| * | | spi: Add DMA mode support to spi-qcom-qspiMark Brown2023-05-081-6/+212
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge series from Vijaya Krishna Nivarthi <quic_vnivarth@quicinc.com>: There are large number of QSPI irqs that fire during boot/init and later on every suspend/resume. This could be made faster by doing DMA instead of PIO. Below is comparison for number of interrupts raised in 2 scenarios... Boot up and stabilise Suspend/Resume Sequence PIO DMA ======================= Boot-up 69088 19284 S/R 5066 3430 Speed test results... spi-nor read times in sec after 2 min uptime ============================================ PIO - Iterations-1000, min=3.18, max=3.74, avg=3.53 DMA - Iterations-1000, min=1.21, max=2.28, avg=1.79 spi-nor write times in sec after 2 min uptime ============================================= PIO - Iterations-1000, min=3.20, max=8.24, avg=3.58 DMA - Iterations-1000, min=1.25, max=5.13, avg=1.82 Further testing performed... a) multiple entries in sgt (simulated by max_dma_len = 1024) b) fallback to pio (simulated by dma setup failure)
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