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* Merge tag 'powerpc-5.12-1' of ↵Linus Torvalds2021-02-221-6/+6
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux Pull powerpc updates from Michael Ellerman: - A large series adding wrappers for our interrupt handlers, so that irq/nmi/user tracking can be isolated in the wrappers rather than spread in each handler. - Conversion of the 32-bit syscall handling into C. - A series from Nick to streamline our TLB flushing when using the Radix MMU. - Switch to using queued spinlocks by default for 64-bit server CPUs. - A rework of our PCI probing so that it happens later in boot, when more generic infrastructure is available. - Two small fixes to allow 32-bit little-endian processes to run on 64-bit kernels. - Other smaller features, fixes & cleanups. Thanks to: Alexey Kardashevskiy, Ananth N Mavinakayanahalli, Aneesh Kumar K.V, Athira Rajeev, Bhaskar Chowdhury, Cédric Le Goater, Chengyang Fan, Christophe Leroy, Christopher M. Riedl, Fabiano Rosas, Florian Fainelli, Frederic Barrat, Ganesh Goudar, Hari Bathini, Jiapeng Chong, Joseph J Allen, Kajol Jain, Markus Elfring, Michal Suchanek, Nathan Lynch, Naveen N. Rao, Nicholas Piggin, Oliver O'Halloran, Pingfan Liu, Po-Hsu Lin, Qian Cai, Ram Pai, Randy Dunlap, Sandipan Das, Stephen Rothwell, Tyrel Datwyler, Will Springer, Yury Norov, and Zheng Yongjun. * tag 'powerpc-5.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: (188 commits) powerpc/perf: Adds support for programming of Thresholding in P10 powerpc/pci: Remove unimplemented prototypes powerpc/uaccess: Merge raw_copy_to_user_allowed() into raw_copy_to_user() powerpc/uaccess: Merge __put_user_size_allowed() into __put_user_size() powerpc/uaccess: get rid of small constant size cases in raw_copy_{to,from}_user() powerpc/64: Fix stack trace not displaying final frame powerpc/time: Remove get_tbl() powerpc/time: Avoid using get_tbl() spi: mpc52xx: Avoid using get_tbl() powerpc/syscall: Avoid storing 'current' in another pointer powerpc/32: Handle bookE debugging in C in syscall entry/exit powerpc/syscall: Do not check unsupported scv vector on PPC32 powerpc/32: Remove the counter in global_dbcr0 powerpc/32: Remove verification of MSR_PR on syscall in the ASM entry powerpc/syscall: implement system call entry/exit logic in C for PPC32 powerpc/32: Always save non volatile GPRs at syscall entry powerpc/syscall: Change condition to check MSR_RI powerpc/syscall: Save r3 in regs->orig_r3 powerpc/syscall: Use is_compat_task() powerpc/syscall: Make interrupt.c buildable on PPC32 ...
| * spi: mpc52xx: Avoid using get_tbl()Christophe Leroy2021-02-111-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | get_tbl() is confusing as it returns the content TBL register on PPC32 but the concatenation of TBL and TBU on PPC64. Use mftb() instead. This will allow the removal of get_tbl() in a following patch. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Acked-by: Mark Brown <broonie@kernel.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/99bf008e2970de7f8ed3225cda69a6d06ae1a644.1612866360.git.christophe.leroy@csgroup.eu
* | Merge tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-armLinus Torvalds2021-02-221-3/+2
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM updates from Russell King: - Generalise byte swapping assembly - Update debug addresses for STI - Validate start of physical memory with DTB - Do not clear SCTLR.nTLSMD in decompressor - amba/locomo/sa1111 devices remove method return type is void - address markers for KASAN in page table dump * tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm: ARM: 9065/1: OABI compat: fix build when EPOLL is not enabled ARM: 9055/1: mailbox: arm_mhuv2: make remove callback return void amba: Make use of bus_type functions amba: Make the remove callback return void vfio: platform: simplify device removal amba: reorder functions amba: Fix resource leak for drivers without .remove ARM: 9054/1: arch/arm/mm/mmu.c: Remove duplicate header ARM: 9053/1: arm/mm/ptdump:Add address markers for KASAN regions ARM: 9051/1: vdso: remove unneded extra-y addition ARM: 9050/1: Kconfig: Select ARCH_HAVE_NMI_SAFE_CMPXCHG where possible ARM: 9049/1: locomo: make locomo bus's remove callback return void ARM: 9048/1: sa1111: make sa1111 bus's remove callback return void ARM: 9047/1: smp: remove unused variable ARM: 9046/1: decompressor: Do not clear SCTLR.nTLSMD for ARMv7+ cores ARM: 9045/1: uncompress: Validate start of physical memory against passed DTB ARM: 9042/1: debug: no uncompress debugging while semihosting ARM: 9041/1: sti LL_UART: add STiH418 SBC UART0 support ARM: 9040/1: use DEBUG_UART_PHYS and DEBUG_UART_VIRT for sti LL_UART ARM: 9039/1: assembler: generalize byte swapping macro into rev_l
| * | amba: Make the remove callback return voidUwe Kleine-König2021-02-021-3/+2
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All amba drivers return 0 in their remove callback. Together with the driver core ignoring the return value anyhow, it doesn't make sense to return a value here. Change the remove prototype to return void, which makes it explicit that returning an error value doesn't work as expected. This simplifies changing the core remove callback to return void, too. Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> # for drivers/memory Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com> # for hwtracing/coresight Acked-By: Vinod Koul <vkoul@kernel.org> # for dmaengine Acked-by: Guenter Roeck <linux@roeck-us.net> # for watchdog Acked-by: Wolfram Sang <wsa@kernel.org> # for I2C Acked-by: Takashi Iwai <tiwai@suse.de> # for sound Acked-by: Vladimir Zapolskiy <vz@mleia.com> # for memory/pl172 Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Link: https://lore.kernel.org/r/20210126165835.687514-5-u.kleine-koenig@pengutronix.de Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
* | Merge tag 'spi-v5.12' of ↵Linus Torvalds2021-02-2232-2434/+2272
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi Pull spi updates from Mark Brown: "The main focus of this release from a framework point of view has been spi-mem where we've acquired support for a few new hardware features which enable better performance on suitable hardware. Otherwise mostly thanks to Arnd's cleanup efforts on old platforms we've removed several obsolete drivers which just about balance out the newer drivers we've added this cycle. Summary: - Allow drivers to flag if they are unidirectional. - Support for DTR mode and hardware acceleration of dummy cycles in spi-mem. - Support for Allwinder H616, Intel Lightning Mountain, nVidia Tegra QuadSPI, Realtek RTL838x and RTL839x. - Removal of obsolete EFM32, Txx9 and SIRF Prima and Atlas drivers" * tag 'spi-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (76 commits) spi: Skip zero-length transfers in spi_transfer_one_message() spi: dw: Avoid stack content exposure spi: cadence-quadspi: Use spi_mem_dtr_supports_op() spi: spi-mem: add spi_mem_dtr_supports_op() spi: atmel-quadspi: Disable the QSPI IP at suspend() spi: pxa2xx: Add IDs for the controllers found on Intel Lynxpoint spi: pxa2xx: Fix the controller numbering for Wildcat Point spi: Change provied to provided in the file spi.h spi: mediatek: add set_cs_timing support spi: support CS timing for HW & SW mode spi: add power control when set_cs_timing spi: stm32: make spurious and overrun interrupts visible spi: stm32h7: replace private SPI_1HZ_NS with NSEC_PER_SEC spi: stm32: defer probe for reset spi: stm32: driver uses reset controller only at init spi: stm32h7: ensure message are smaller than max size spi: stm32: use bitfield macros spi: stm32: do not mandate cs_gpio spi: stm32: properly handle 0 byte transfer spi: clps711xx: remove redundant white-space ...
| * \ Merge remote-tracking branch 'spi/for-5.12' into spi-nextMark Brown2021-02-1228-2423/+2244
| |\ \
| | * | spi: cadence-quadspi: Use spi_mem_dtr_supports_op()Pratyush Yadav2021-02-111-59/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the newly introduced spi_mem_dtr_supports_op() to check DTR op support. This means the buswidth check does not need to be replicated. It also happens to fix a bug where STR ops with a 2-byte opcode would be reported as supported. Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Link: https://lore.kernel.org/r/20210204141218.32229-2-p.yadav@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | spi: spi-mem: add spi_mem_dtr_supports_op()Pratyush Yadav2021-02-111-3/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | spi_mem_default_supports_op() rejects DTR ops by default to ensure that the controller drivers that haven't been updated with DTR support continue to reject them. It also makes sure that controllers that don't support DTR mode at all (which is most of them at the moment) also reject them. This means that controller drivers that want to support DTR mode can't use spi_mem_default_supports_op(). Driver authors have to roll their own supports_op() function and mimic the buswidth checks. See spi-cadence-quadspi.c for example. Or even worse, driver authors might skip it completely or get it wrong. Add spi_mem_dtr_supports_op(). It provides a basic sanity check for DTR ops and performs the buswidth requirement check. Move the logic for checking buswidth in spi_mem_default_supports_op() to a separate function so the logic is not repeated twice. Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20210204141218.32229-1-p.yadav@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | spi: atmel-quadspi: Disable the QSPI IP at suspend()Tudor Ambarus2021-02-111-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is safer to disable the QSPI IP at suspend, in order to avoid possible impact of glitches on the internal FSMs. This is a theoretical fix, there were no problems seen as of now. Tested on sama5d2 and sam9x60 versions of the IP. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20210210135428.204134-1-tudor.ambarus@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | spi: mediatek: add set_cs_timing supportleilk.liu2021-02-081-16/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | this patch add set_cs_timing support for HW CS mode. Signed-off-by: leilk.liu <leilk.liu@mediatek.com> Link: https://lore.kernel.org/r/20210207030953.9297-4-leilk.liu@mediatek.com Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | spi: support CS timing for HW & SW modeleilk.liu2021-02-081-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | this patch supports the controller's HW CS and SW CS via use cs_gpio. Signed-off-by: leilk.liu <leilk.liu@mediatek.com> Link: https://lore.kernel.org/r/20210207030953.9297-3-leilk.liu@mediatek.com Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | spi: add power control when set_cs_timingleilk.liu2021-02-081-3/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As to set_cs_timing takes effect immediately, power spi is needed when call spi_set_cs_timing. Signed-off-by: leilk.liu <leilk.liu@mediatek.com> Link: https://lore.kernel.org/r/20210207030953.9297-2-leilk.liu@mediatek.com Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | spi: stm32: make spurious and overrun interrupts visibleAlain Volmat2021-02-051-11/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We do not expect to receive spurious interrupts so rise a warning if it happens. RX overrun is an error condition that signals a corrupted RX stream both in dma and in irq modes. Report the error and abort the transfer in either cases. Signed-off-by: Alain Volmat <alain.volmat@foss.st.com> Link: https://lore.kernel.org/r/1612551572-495-9-git-send-email-alain.volmat@foss.st.com Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | spi: stm32h7: replace private SPI_1HZ_NS with NSEC_PER_SECAmelie Delaunay2021-02-051-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace SPI_1HZ_NS private constant with NSEC_PER_SEC, which is easier to read and understand. Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com> Signed-off-by: Alain Volmat <alain.volmat@foss.st.com> Link: https://lore.kernel.org/r/1612551572-495-8-git-send-email-alain.volmat@foss.st.com Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | spi: stm32: defer probe for resetAlain Volmat2021-02-051-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Defer the probe operation when a reset controller device is expected but have not yet been probed. This change replaces use of devm_reset_control_get_exclusive() with devm_reset_control_get_optional_exclusive() as reset controller is optional which is now explicitly stated. Signed-off-by: Alain Volmat <alain.volmat@foss.st.com> Link: https://lore.kernel.org/r/1612551572-495-7-git-send-email-alain.volmat@foss.st.com Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | spi: stm32: driver uses reset controller only at initEtienne Carriere2021-02-051-6/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove reset controller device reference from the device private structure since it is used only at probe time and can be discarded once used to reset the SPI device. Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Alain Volmat <alain.volmat@foss.st.com> Link: https://lore.kernel.org/r/1612551572-495-6-git-send-email-alain.volmat@foss.st.com Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | spi: stm32h7: ensure message are smaller than max sizeAlain Volmat2021-02-051-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Ensure that messages given to transfer_one handler can actually be handled by it. For that purpose rely on the SPI framework spi_split_transfers_maxsize function to split messages whenever necessary. Signed-off-by: Alain Volmat <alain.volmat@foss.st.com> Link: https://lore.kernel.org/r/1612551572-495-5-git-send-email-alain.volmat@foss.st.com Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | spi: stm32: use bitfield macrosAmelie Delaunay2021-02-051-36/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To avoid defining shift and mask separately and hand-coding the bit manipulation, use the bitfield macros. Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com> Signed-off-by: Alain Volmat <alain.volmat@foss.st.com> Link: https://lore.kernel.org/r/1612551572-495-4-git-send-email-alain.volmat@foss.st.com Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | spi: stm32: do not mandate cs_gpioAlain Volmat2021-02-051-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CS gpios is not mandatory, the driver should allow working even when CS are not given. Signed-off-by: Alain Volmat <alain.volmat@foss.st.com> Link: https://lore.kernel.org/r/1612551572-495-3-git-send-email-alain.volmat@foss.st.com Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | spi: stm32: properly handle 0 byte transferAlain Volmat2021-02-051-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On 0 byte transfer request, return straight from the xfer function after finalizing the transfer. Fixes: dcbe0d84dfa5 ("spi: add driver for STM32 SPI controller") Signed-off-by: Alain Volmat <alain.volmat@foss.st.com> Link: https://lore.kernel.org/r/1612551572-495-2-git-send-email-alain.volmat@foss.st.com Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | Merge series "spi: Add support for Realtek RTL838x/RTL839x SoC SPI" from ↵Mark Brown2021-02-042-0/+210
| | |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Bert Vermeulen <bert@biot.com>: v5: - Changed SoC compatible to list exact models v4: - Added SoC series-specific compatible matches. v3: - Added cpu_relax() to busy loop. - Dropped .remove callback from driver struct. - Use (variations of) realtek-rtl as prefix. - Dropped Kconfig entry, and use MACH_REALTEK_RTL setting to build the driver, since there's no point booting without the SPI-connected flash. v2: - Rewrote from spi-nor driver to regular spi driver, implementing only set_cs() and transfer_one(). (Thanks Chuanhong Guo!) Bert Vermeulen (2): dt-bindings: spi: Realtek RTL838x/RTL839x SPI controller spi: realtek-rtl: Add support for Realtek RTL838x/RTL839x SPI controllers .../bindings/spi/realtek,rtl-spi.yaml | 41 ++++ drivers/spi/Makefile | 1 + drivers/spi/spi-realtek-rtl.c | 209 ++++++++++++++++++ 3 files changed, 251 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/realtek,rtl-spi.yaml create mode 100644 drivers/spi/spi-realtek-rtl.c -- 2.25.1
| | | * | spi: realtek-rtl: Add support for Realtek RTL838x/RTL839x SPI controllersBert Vermeulen2021-02-042-0/+210
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This driver likely also supports earlier (RTL8196) and later (RTL93xx) SoCs. The SPI hardware in these SoCs is specifically intended for connecting NOR bootflash chips, and only used for that in dozens of examined devices. However boiled down to basics, it's really just a half-duplex SPI controller. The hardware appears to have a vestigial second chip-select control, but it hasn't been seen in the wild and is thus not supported. Signed-off-by: Bert Vermeulen <bert@biot.com> Link: https://lore.kernel.org/r/20210120135928.246054-3-bert@biot.com Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | | spi: clps711xx: remove redundant white-spaceJunhao He2021-02-041-1/+1
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove redundant white-space, no functional change. Signed-off-by: Junhao He <hejunhao2@hisilicon.com> Signed-off-by: Yicong Yang <yangyicong@hisilicon.com> Link: https://lore.kernel.org/r/1612436886-42839-1-git-send-email-yangyicong@hisilicon.com Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | spi: hisi-sfc-v3xx: add address mode checkYicong Yang2021-01-271-1/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The address mode is either 3 or 4 for the controller, which is configured by the firmware and cannot be modified in the OS driver. Get the firmware configuration and add address mode check in the .supports_op() to block invalid operations. Signed-off-by: Yicong Yang <yangyicong@hisilicon.com> Acked-by: John Garry <john.garry@huawei.com> Link: https://lore.kernel.org/r/1611740450-47975-3-git-send-email-yangyicong@hisilicon.com Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | spi: spi-au1550: Fix various whitespace warningscorentin2021-01-221-10/+12
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: corentin <corentin.noel56@gmail.com> Link: https://lore.kernel.org/r/20210122082040.30788-1-corentin.noel.external@stormshield.eu Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | spi: spi-au1550: quoted string breakcorentin2021-01-221-6/+5
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: corentin <corentin.noel56@gmail.com> Link: https://lore.kernel.org/r/20210122113052.40429-1-corentin.noel56@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | spi: remove sirf prima/atlas driverArnd Bergmann2021-01-213-1244/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The CSR SiRF prima2/atlas platforms are getting removed, so this driver is no longer needed. Cc: Barry Song <baohua@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Barry Song <baohua@kernel.org> Link: https://lore.kernel.org/r/20210120161658.3820610-1-arnd@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | spi: atmel: Put allocated master before returnPan Bian2021-01-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The allocated master is not released. Goto error handling label rather than directly return. Fixes: 5e9af37e46bc ("spi: atmel: introduce probe deferring") Signed-off-by: Pan Bian <bianpan2016@163.com> Fixes: 5e9af37e46bc ("spi: atmel: introduce probe deferring") Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20210120050025.25426-1-bianpan2016@163.com Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | spi: spi-mpc52xx: Use new structure for SPI transfer delaysSergiu Cuciurean2021-01-211-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In a recent change to the SPI subsystem [1], a new `delay` struct was added to replace the `delay_usecs`. This change replaces the current `delay_usecs` with `delay` for this driver. The `spi_transfer_delay_exec()` function [in the SPI framework] makes sure that both `delay_usecs` & `delay` are used (in this order to preserve backwards compatibility). [1] commit bebcfd272df6 ("spi: introduce `delay` field for `spi_transfer` + spi_transfer_delay_exec()") Signed-off-by: Sergiu Cuciurean <sergiu.cuciurean-OyLXuOCK7orQT0dZR+AlfA@public.gmane.org> Link: https://lore.kernel.org/r/20200227143931.20688-1-sergiu.cuciurean@analog.com Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | spi: spi-au1550: Add suffix "int" to all "unsigned"corentin2021-01-211-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: corentin <corentin.noel56@gmail.com> Link: https://lore.kernel.org/r/20210121145236.26460-1-corentin.noel.external@stormshield.eu Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | spi: imx: Don't print error on -EPROBEDEFERGuido Günther2021-01-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This avoids [ 0.962538] spi_imx 30820000.spi: bitbang start failed with -517 durig driver probe. Fixes: 8197f489f4c4 ("spi: imx: Fix failure path leak on GPIO request error correctly") Signed-off-by: Guido Günther <agx@sigxcpu.org> Reviewed-by: Fabio Estevam <festevam@gmail.com> Link: https://lore.kernel.org/r/0f51ab42e7c7a3452f2f8652794d81584303ea0d.1610987414.git.agx@sigxcpu.org Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | Merge series "Remove ARM platform efm32" from Uwe Kleine-König ↵Mark Brown2021-01-153-470/+0
| | |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | <u.kleine-koenig@pengutronix.de> Uwe Kleine-König <uwe.kleine-koenig@pengutronix.de>: From: Uwe Kleine-König <uwe.kleine-koenig@pengutronix.de> Hello, there are no known active users of the efm32 platform. Given that the only machine that is supported has only 4 MiB of RAM its use is also quite limited. Back then it served as the platform to develop ARMv7-M support in Linux which was quite fun and still is a blissful memory. Still given that the code serves no purpose and this probably won't change anytime soon, remove all platform support. I'm unsure what to do with the device tree bindings. Should we delete them, too? Best regards Uwe Uwe Kleine-König (7): ARM: drop efm32 platform clk: Drop unused efm32gg driver clocksource: Drop unused efm32 timer code spi: Drop unused efm32 bus driver i2c: Drop unused efm32 bus driver tty: Drop unused efm32 serial driver MAINTAINERS: Remove deleted platform efm32 MAINTAINERS | 7 - arch/arm/Kconfig | 10 +- arch/arm/Kconfig.debug | 17 - arch/arm/Makefile | 1 - arch/arm/boot/dts/Makefile | 2 - arch/arm/boot/dts/efm32gg-dk3750.dts | 88 --- arch/arm/boot/dts/efm32gg.dtsi | 177 ----- arch/arm/configs/efm32_defconfig | 98 --- arch/arm/include/debug/efm32.S | 45 -- arch/arm/mach-efm32/Makefile | 2 - arch/arm/mach-efm32/Makefile.boot | 4 - arch/arm/mach-efm32/dtmachine.c | 16 - arch/arm/mm/Kconfig | 1 - drivers/clk/Makefile | 1 - drivers/clk/clk-efm32gg.c | 84 --- drivers/clocksource/Kconfig | 9 - drivers/clocksource/Makefile | 1 - drivers/clocksource/timer-efm32.c | 278 -------- drivers/i2c/busses/Kconfig | 7 - drivers/i2c/busses/Makefile | 1 - drivers/i2c/busses/i2c-efm32.c | 469 ------------- drivers/spi/Kconfig | 7 - drivers/spi/Makefile | 1 - drivers/spi/spi-efm32.c | 462 ------------ drivers/tty/serial/Kconfig | 13 - drivers/tty/serial/Makefile | 1 - drivers/tty/serial/efm32-uart.c | 852 ----------------------- include/linux/platform_data/efm32-spi.h | 15 - include/linux/platform_data/efm32-uart.h | 19 - include/uapi/linux/serial_core.h | 3 - 30 files changed, 1 insertion(+), 2690 deletions(-) delete mode 100644 arch/arm/boot/dts/efm32gg-dk3750.dts delete mode 100644 arch/arm/boot/dts/efm32gg.dtsi delete mode 100644 arch/arm/configs/efm32_defconfig delete mode 100644 arch/arm/include/debug/efm32.S delete mode 100644 arch/arm/mach-efm32/Makefile delete mode 100644 arch/arm/mach-efm32/Makefile.boot delete mode 100644 arch/arm/mach-efm32/dtmachine.c delete mode 100644 drivers/clk/clk-efm32gg.c delete mode 100644 drivers/clocksource/timer-efm32.c delete mode 100644 drivers/i2c/busses/i2c-efm32.c delete mode 100644 drivers/spi/spi-efm32.c delete mode 100644 drivers/tty/serial/efm32-uart.c delete mode 100644 include/linux/platform_data/efm32-spi.h delete mode 100644 include/linux/platform_data/efm32-uart.h base-commit: 5c8fe583cce542aa0b84adc939ce85293de36e5e -- 2.29.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
| | | * | spi: Drop unused efm32 bus driverUwe Kleine-König2021-01-153-470/+0
| | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support for this machine was just removed, so drop the now unused spi bus driver, too. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/20210114151630.128830-5-u.kleine-koenig@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | spi: pxa2xx: Add support for Intel Alder Lake PCH-PJarkko Nikula2021-01-141-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for LPSS SPI on Intel Alder Lake PCH-P variant. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Link: https://lore.kernel.org/r/20210114144021.1820262-1-jarkko.nikula@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | spi: bcm2835aux: Call the dedicated transfer completion function.Vincent Pelletier2021-01-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | spi_finalize_current_transfer currently only calls "complete", so no functional change is expected. Signed-off-by: Vincent Pelletier <plr.vincent@gmail.com> Link: https://lore.kernel.org/r/2636096a3b40febf680f9fff33944a5480561df9.1610062884.git.plr.vincent@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | spi: rockchip: Call the dedicated transfer completion function.Vincent Pelletier2021-01-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | spi_finalize_current_transfer currently only calls "complete", so no functional change is expected. Signed-off-by: Vincent Pelletier <plr.vincent@gmail.com> Link: https://lore.kernel.org/r/f3e1cf19a7dcdd77adc0a719adf46449b84ccadd.1610062884.git.plr.vincent@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | spi: bcm2835: Call the dedicated transfer completion function.Vincent Pelletier2021-01-141-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | spi_finalize_current_transfer currently only calls "complete", so no functional change is expected. Signed-off-by: Vincent Pelletier <plr.vincent@gmail.com> Link: https://lore.kernel.org/r/633c3d5c350dde4d14ce2120c32698c25b95d302.1610062884.git.plr.vincent@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | Merge v5.11-rc3Mark Brown2021-01-132-15/+22
| | |\ \
| | * | | spi: bcm2835: Set controller max_speed_hzRichard Fitzgerald2021-01-131-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Set the struct spi_controller max_speed_hz. This is based on the reported source clock frequency during probe. The maximum bus clock is half the source clock (as per the code in bcm2835_spi_transfer_one). Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com> Link: https://lore.kernel.org/r/20210107164825.21919-1-rf@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | | Merge series "spi: sh-msiof: Advertize bit rate limits and actual speed" ↵Mark Brown2021-01-131-3/+11
| | |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | from Geert Uytterhoeven <geert+renesas@glider.be>: Hi Mark, This patch series makes the Renesas MSIOF SPI driver fill in actual transfer speeds and controller limits, so the SPI core can take them into account. This has been tested on R-Car Gen2 and Gen3. Thanks! Geert Uytterhoeven (2): spi: sh-msiof: Fill in spi_transfer.effective_speed_hz spi: sh-msiof: Fill in controller speed limits drivers/spi/spi-sh-msiof.c | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) -- 2.25.1 Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
| | | * | | spi: sh-msiof: Fill in controller speed limitsGeert Uytterhoeven2021-01-131-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fill in the controller speed limits, so the SPI core can use them for validating SPI transfers, and adjust or reject transfers when needed. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20210113101916.1147695-3-geert+renesas@glider.be Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | spi: sh-msiof: Fill in spi_transfer.effective_speed_hzGeert Uytterhoeven2021-01-131-3/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fill in the effective bit rate used for transfers, so the SPI core can calculate instead of estimate delays. Restore "reverse Christmas tree" order of local variables while adding new variables. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20210113101916.1147695-2-geert+renesas@glider.be Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | | | Merge series "spi: cadence-quadspi: Add QSPI controller support for Intel ↵Mark Brown2021-01-132-5/+21
| | |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LGM SoC" from "Ramuthevar, Vadivel MuruganX" <vadivel.muruganx.ramuthevar@linux.intel.com>: Add QSPI controller support for Intel LGM SoC. Patches to move move bindings over to "Documentation/devicetree/bindings/spi/" directory and also added compatible Support for Intel platform. dt-bindings: spi: cadence-qspi: Add support for Intel lgm-qspi (earlier patch mail thread and Ack-by) link: "https://lore.kernel.org/lkml/5d6d1b85.1c69fb81.96938.0315@mx.google.com/" Reference: https://lkml.org/lkml/2020/6/1/50 --- v9: - Vignesh review comments address and update - Retain the patchv4 move the binding documentation from mtd to spi directory. - Add intel's compatible string over the legacy documentation - Remove unused variable, CQSPI_SUPPORTS_MULTI_CHIPSELECT macro and check - YAML convertion patch alone dropped v8: - As Mark suggested to add the dt-bindings documentation patches end of the series , so dropped. v7: - Rob's review comments address and fixed dt-schema warning - Pratyush review comments address and update - DAC bit reset to 0 and 1 (enable/disable) - tested QSI-NOR flash mx25l12805d on LGM soc, it's working after disable DAC - Linus suggested to use 'num-cs' prperty instead of 'num-chipselect' v6: - Rob's review comments update - add compatible string in properly aligned - remove cadence-qspi extra comaptible string in example v5: - Rob's review comments update - const with single compatible string kept v4: - Rob's review comments update - remove '|' no formatting to preserve - child node attributes follows under 'properties' under '@[0-9a-f]+$'. v3: - Pratyush review comments update - CQSPI_SUPPORTS_MULTI_CHIPSELECT macro used instead of cqspi->use_direct_mode - disable DAC support placed in end of controller_init v2: - Rob's review comments update for dt-bindings - add 'oneOf' for compatible selection - drop un-neccessary descriptions - add the cdns,is-decoded-cs and cdns,rclk-en properties as schema - remove 'allOf' in not required place - add AdditionalProperties false - add minItems/maxItems for qspi reset attributes resend-v1: - As per Mark's suggestion , reorder the patch series 1-3 driver support patches, series 4-6 dt-bindings patches. v1: - initial version Ramuthevar Vadivel Murugan (5): spi: cadence-quadspi: Add QSPI support for Intel LGM SoC spi: cadence-quadspi: Disable the DAC for Intel LGM SoC spi: cadence-quadspi: Add multi-chipselect support for Intel LGM SoC spi: Move cadence-quadspi.txt to Documentation/devicetree/bindings/spi dt-bindings: spi: cadence-qspi: Add support for Intel lgm-qspi .../bindings/{mtd => spi}/cadence-quadspi.txt | 1 + drivers/spi/Kconfig | 2 +- drivers/spi/spi-cadence-quadspi.c | 24 ++++++++++++++++++---- 3 files changed, 22 insertions(+), 5 deletions(-) rename Documentation/devicetree/bindings/{mtd => spi}/cadence-quadspi.txt (97%) -- 2.11.0 ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/
| | | * | | | spi: cadence-quadspi: Add multi-chipselect support for Intel LGM SoCRamuthevar Vadivel Murugan2021-01-131-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add multiple chipselect support for Intel LGM SoCs, currently QSPI-NOR and QSPI-NAND supported. Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> Link: https://lore.kernel.org/r/20201124041840.31066-4-vadivel.muruganx.ramuthevar@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | | spi: cadence-quadspi: Disable the DAC for Intel LGM SoCRamuthevar Vadivel Murugan2021-01-131-4/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On Intel Lightning Mountain(LGM) SoCs QSPI controller do not use Direct Access Controller(DAC). This patch adds a quirk to disable the Direct Access Controller for data transfer instead it uses indirect data transfe DAC bit resets to 1 so there is no need to explicitly set it. Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> Link: https://lore.kernel.org/r/20201124041840.31066-3-vadivel.muruganx.ramuthevar@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | | spi: cadence-quadspi: Add QSPI support for Intel LGM SoCRamuthevar Vadivel Murugan2021-01-132-1/+4
| | | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add QSPI controller support for Intel LGM SoC. Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> Link: https://lore.kernel.org/r/20201124041840.31066-2-vadivel.muruganx.ramuthevar@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | | | spi: stm32: Simplify stm32h7_spi_prepare_fthlv()Marek Vasut2021-01-131-24/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Simplify stm32h7_spi_prepare_fthlv() function implementation, no functional change intended. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alain Volmat <alain.volmat@st.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Amelie Delaunay <amelie.delaunay@st.com> Cc: Antonio Borneo <antonio.borneo@st.com> Cc: Mark Brown <broonie@kernel.org> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Roman Guskov <rguskov@dh-electronics.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-spi@vger.kernel.org Link: https://lore.kernel.org/r/20210104123114.261596-1-marex@denx.de Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | | | spi: spi-qcom-qspi: Use irq trigger flags from firmwareStephen Boyd2021-01-131-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We don't need to force this to be trigger high here, as the firmware properly configures the irq flags already. Drop it to save a line. Cc: Douglas Anderson <dianders@chromium.org> Cc: Rajendra Nayak <rnayak@codeaurora.org> Cc: Mukesh Kumar Savaliya <msavaliy@codeaurora.org> Cc: Akash Asthana <akashast@codeaurora.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20210112001301.687628-1-swboyd@chromium.org Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | | | spi: hisi-sfc-v3xx: extend version checking compatibilityYicong Yang2021-01-131-6/+2
| | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently we use concrete version to determine the max_cmd_dword. New entries should be added for compatible hardwares of new version or on new platform, otherwise the device will use 16 dwords instead of 64 even if it supports, which will degrade the performance. This will decrease the compatibility and the maintainability. Drop the switch-case statement of the version checking. Only version less than 0x351 supports maximum 16 command dwords. Signed-off-by: Yicong Yang <yangyicong@hisilicon.com> Acked-by: John Garry <john.garry@huawei.com> Link: https://lore.kernel.org/r/1610526716-14882-1-git-send-email-yangyicong@hisilicon.com Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | | spi: rpc-if: Gaurd .pm assignment with CONFIG_PM_SLEEP #ifdef checkLad Prabhakar2021-01-111-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With CONFIG_PM_SLEEP disabled the rpcif_spi_pm_ops variable is still referenced and thus increasing the size of kernel. Fix this issue by adding CONFIG_PM_SLEEP #ifdef check around the .pm assignment (image size is critical on RZ/A SoC's where the SRAM sizes range 4~5 MiB). Fixes: 9584fc95cadc0 ("spi: rpc-if: Remove CONFIG_PM_SLEEP ifdefery") Reported-by: Geert Uytterhoeven <geert+renesas@glider.be> Suggested-by: Pavel Machek <pavel@denx.de> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20210107145329.27966-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Mark Brown <broonie@kernel.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-19 02:51:13 +0000