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* Merge tag 'char-misc-6.4-rc1' of ↵Linus Torvalds2023-04-271-2/+2
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc Pull char/misc drivers updates from Greg KH: "Here is the "big" set of char/misc and other driver subsystems for 6.4-rc1. It's pretty big, but due to the removal of pcmcia drivers, almost breaks even for number of lines added vs. removed, a nice change. Included in here are: - removal of unused PCMCIA drivers (finally!) - Interconnect driver updates and additions - Lots of IIO driver updates and additions - MHI driver updates - Coresight driver updates - NVMEM driver updates, which required some OF updates - W1 driver updates and a new maintainer to manage the subsystem - FPGA driver updates - New driver subsystem, CDX, for AMD systems - lots of other small driver updates and additions All of these have been in linux-next for a while with no reported issues" * tag 'char-misc-6.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (196 commits) mcb-lpc: Reallocate memory region to avoid memory overlapping mcb-pci: Reallocate memory region to avoid memory overlapping mcb: Return actual parsed size when reading chameleon table kernel/configs: Drop Android config fragments virt: acrn: Replace obsolete memalign() with posix_memalign() spmi: Add a check for remove callback when removing a SPMI driver spmi: fix W=1 kernel-doc warnings spmi: mtk-pmif: Drop of_match_ptr for ID table spmi: pmic-arb: Convert to platform remove callback returning void spmi: mtk-pmif: Convert to platform remove callback returning void spmi: hisi-spmi-controller: Convert to platform remove callback returning void w1: gpio: remove unnecessary ENOMEM messages w1: omap-hdq: remove unnecessary ENOMEM messages w1: omap-hdq: add SPDX tag w1: omap-hdq: allow compile testing w1: matrox: remove unnecessary ENOMEM messages w1: matrox: use inline over __inline__ w1: matrox: switch from asm to linux header w1: ds2482: do not use assignment in if condition w1: ds2482: drop unnecessary header ...
| * of: Rename of_modalias_node()Miquel Raynal2023-04-051-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This helper does not produce a real modalias, but tries to get the "product" compatible part of the "vendor,product" compatibles only. It is far from creating a purely useful modalias string and does not seem to be used like that directly anyway, so let's try to give this helper a more meaningful name before moving there a real modalias helper (already existing under of/device.c). Also update the various documentations to refer to the strings as "aliases" rather than "modaliases" which has a real meaning in the Linux kernel. There is no functional change. Cc: Rafael J. Wysocki <rafael@kernel.org> Cc: Len Brown <lenb@kernel.org> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Maxime Ripard <mripard@kernel.org> Cc: Thomas Zimmermann <tzimmermann@suse.de> Cc: Sebastian Reichel <sre@kernel.org> Cc: Wolfram Sang <wsa@kernel.org> Cc: Mark Brown <broonie@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Mark Brown <broonie@kernel.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Acked-by: Sebastian Reichel <sre@kernel.org> Link: https://lore.kernel.org/r/20230404172148.82422-9-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* | Merge tag 'driver-core-6.4-rc1' of ↵Linus Torvalds2023-04-272-3/+1
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core Pull driver core updates from Greg KH: "Here is the large set of driver core changes for 6.4-rc1. Once again, a busy development cycle, with lots of changes happening in the driver core in the quest to be able to move "struct bus" and "struct class" into read-only memory, a task now complete with these changes. This will make the future rust interactions with the driver core more "provably correct" as well as providing more obvious lifetime rules for all busses and classes in the kernel. The changes required for this did touch many individual classes and busses as many callbacks were changed to take const * parameters instead. All of these changes have been submitted to the various subsystem maintainers, giving them plenty of time to review, and most of them actually did so. Other than those changes, included in here are a small set of other things: - kobject logging improvements - cacheinfo improvements and updates - obligatory fw_devlink updates and fixes - documentation updates - device property cleanups and const * changes - firwmare loader dependency fixes. All of these have been in linux-next for a while with no reported problems" * tag 'driver-core-6.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core: (120 commits) device property: make device_property functions take const device * driver core: update comments in device_rename() driver core: Don't require dynamic_debug for initcall_debug probe timing firmware_loader: rework crypto dependencies firmware_loader: Strip off \n from customized path zram: fix up permission for the hot_add sysfs file cacheinfo: Add use_arch[|_cache]_info field/function arch_topology: Remove early cacheinfo error message if -ENOENT cacheinfo: Check cache properties are present in DT cacheinfo: Check sib_leaf in cache_leaves_are_shared() cacheinfo: Allow early level detection when DT/ACPI info is missing/broken cacheinfo: Add arm64 early level initializer implementation cacheinfo: Add arch specific early level initializer tty: make tty_class a static const structure driver core: class: remove struct class_interface * from callbacks driver core: class: mark the struct class in struct class_interface constant driver core: class: make class_register() take a const * driver core: class: mark class_release() as taking a const * driver core: remove incorrect comment for device_create* MIPS: vpe-cmp: remove module owner pointer from struct class usage. ...
| * | driver core: class: remove module * from class_create()Greg Kroah-Hartman2023-03-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The module pointer in class_create() never actually did anything, and it shouldn't have been requred to be set as a parameter even if it did something. So just remove it and fix up all callers of the function in the kernel tree at the same time. Cc: "Rafael J. Wysocki" <rafael@kernel.org> Acked-by: Benjamin Tissoires <benjamin.tissoires@redhat.com> Link: https://lore.kernel.org/r/20230313181843.1207845-4-gregkh@linuxfoundation.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| * | drivers: remove struct module * setting from struct classGreg Kroah-Hartman2023-03-171-2/+0
| |/ | | | | | | | | | | | | | | | | | | | | | | | | There is no need to manually set the owner of a struct class, as the registering function does it automatically, so remove all of the explicit settings from various drivers that did so as it is unneeded. This allows us to remove this pointer entirely from this structure going forward. Cc: "Rafael J. Wysocki" <rafael@kernel.org> Link: https://lore.kernel.org/r/20230313181843.1207845-2-gregkh@linuxfoundation.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* | Merge tag 'spi-v6.4' of ↵Linus Torvalds2023-04-27124-1234/+1674
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi Pull spi updates from Mark Brown: "A fairly standard release for SPI with the exception of a change to the API for specifying chip selects done in preparation for supporting devices with more than one chip select, this required some mechanical changes throughout the tree which have been cooking in -next happily for a while. There's also a new API to allow us to support TPM chips on half duplex controllers. Summary: - Refactoring in preparation for supporting multiple chip selects for a single device, needed by some flash devices, which required a change in the SPI device API visible throughout the tree - Support for hardware assisted interaction with SPI TPMs on half duplex controllers, implemented on nVidia Tedra210 QuadSPI - Optimisation for large transfers on fsl-cpm devices - Cleanups around device property use which fix some sisues with fwnode - Use of both void remove() and devm_platform_.*ioremap_resource() - Support for AMD Pensando Elba, Amlogic A1, Cadence device mode, Intel MetorLake-S and StarFive J7110 QuadSPI" * tag 'spi-v6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (185 commits) spi: bcm63xx: use macro DEFINE_SIMPLE_DEV_PM_OPS spi: tegra210-quad: Enable TPM wait polling spi: Add TPM HW flow flag spi: bcm63xx: remove PM_SLEEP based conditional compilation spi: cadence-quadspi: use macro DEFINE_SIMPLE_DEV_PM_OPS spi: spi-cadence: Add support for Slave mode spi: spi-cadence: Switch to spi_controller structure spi: cadence-quadspi: fix suspend-resume implementations spi: dw: Add support for AMD Pensando Elba SoC spi: dw: Add AMD Pensando Elba SoC SPI Controller spi: cadence-quadspi: Disable the SPI before reconfiguring spi: cadence-quadspi: Update the read timeout based on the length spi: spi-loopback-test: Add module param for iteration length spi: add support for Amlogic A1 SPI Flash Controller dt-bindings: spi: add Amlogic A1 SPI controller spi: fsl-spi: No need to check transfer length versus word size spi: fsl-spi: Change mspi_apply_cpu_mode_quirks() to void spi: fsl-cpm: Use 16 bit mode for large transfers with even size spi: fsl-spi: Re-organise transfer bits_per_word adaptation spi: fsl-spi: Fix CPM/QE mode Litte Endian ...
| * | spi: bcm63xx: use macro DEFINE_SIMPLE_DEV_PM_OPSDhruva Gole2023-04-251-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using this macro makes the code more readable. It also inits the members of dev_pm_ops in the following manner without us explicitly needing to: .suspend = bcm63xx_spi_suspend, \ .resume = bcm63xx_spi_resume, \ .freeze = bcm63xx_spi_suspend, \ .thaw = bcm63xx_spi_resume, \ .poweroff = bcm63xx_spi_suspend, \ .restore = bcm63xx_spi_resume Signed-off-by: Dhruva Gole <d-gole@ti.com> Link: https://lore.kernel.org/r/20230424102546.1604484-1-d-gole@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * | Tegra TPM driver with HW flow controlMark Brown2023-04-241-0/+14
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge series from Krishna Yarlagadda <kyarlagadda@nvidia.com>: TPM devices may insert wait state on last clock cycle of ADDR phase. For SPI controllers that support full-duplex transfers, this can be detected using software by reading the MISO line. For SPI controllers that only support half-duplex transfers, such as the Tegra QSPI, it is not possible to detect the wait signal from software. The QSPI controller in Tegra234 and Tegra241 implement hardware detection of the wait signal which can be enabled in the controller for TPM devices. Add a flag for this in the SPI core and implement support in the Tegra QuadSPI driver.
| | * | spi: tegra210-quad: Enable TPM wait pollingKrishna Yarlagadda2023-04-211-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Trusted Platform Module requires flow control. As defined in TPM interface specification, client would drive MISO line at same cycle as last address bit on MOSI. Tegra234 and Tegra241 QSPI controllers have TPM wait state detection feature which is enabled for TPM client devices reported in SPI device mode bits. Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com> Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Reviewed-by: Jerry Snitselaar <jsnitsel@redhat.com> Link: https://lore.kernel.org/r/20230421091309.2672-4-kyarlagadda@nvidia.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * | | spi: bcm63xx: remove PM_SLEEP based conditional compilationDhruva Gole2023-04-211-2/+0
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Get rid of conditional compilation based on CONFIG_PM_SLEEP because it may introduce build issues with certain configs where it maybe disabled This is because if above config is not enabled the suspend-resume functions are never part of the code but the bcm63xx_spi_pm_ops struct still inits them to non-existent suspend-resume functions. Fixes: b42dfed83d95 ("spi: add Broadcom BCM63xx SPI controller driver") Signed-off-by: Dhruva Gole <d-gole@ti.com> Link: https://lore.kernel.org/r/20230420121615.967487-1-d-gole@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: cadence-quadspi: use macro DEFINE_SIMPLE_DEV_PM_OPSDhruva Gole2023-04-201-11/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using this macro makes the code more readable. It also inits the members of dev_pm_ops in the following manner without us explicitly needing to: .suspend = cqspi_suspend, \ .resume = cqspi_resume, \ .freeze = cqspi_suspend, \ .thaw = cqspi_resume, \ .poweroff = cqspi_suspend, \ .restore = cqspi_resume Also get rid of conditional compilation based on CONFIG_PM_SLEEP because it introduces build issues with certain configs when CQSPI_DEV_PM_OPS is just NULL. Reported-by: kernel test robot <lkp@intel.com> Link: https://lore.kernel.org/oe-kbuild-all/202304191900.2fARFQW9-lkp@intel.com/ Fixes: 140623410536 ("mtd: spi-nor: Add driver for Cadence Quad SPI Flash Controller") Signed-off-by: Dhruva Gole <d-gole@ti.com> Link: https://lore.kernel.org/r/20230420054257.925092-1-d-gole@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: spi-cadence: Add Slave mode supportMark Brown2023-04-181-121/+203
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge series from Srinivas Goud <srinivas.goud@amd.com>: Currently SPI Cadence controller works in Master mode only. Update driver to support Slave mode and also Full duplex transfer support in Slave mode
| | * | spi: spi-cadence: Add support for Slave modeSrinivas Goud2023-04-181-71/+153
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently SPI Cadence controller works only in Master mode. Updated interrupt handler for Full duplex transfer in Slave mode. Interrupt handler rely on the TX empty interrupt even for Slave mode transfer due to below HW limitation. HW limitation: AR 65885 - SPI Controller Might Not Update RX_NEMPTY Flag, Showing Incorrect Status Of The Receive FIFO SPI Slave mode works in the following manner: 1. One transfer can be finished only after all transfer->len data been transferred to master device. 2. Slave device only accepts transfer->len data. Any data longer than this from master device will be dropped. Any data shorter than this from master will cause SPI to be stuck due to the above behavior. 3. The stale data present in RXFIFO will be dropped in unprepared hardware transfer function. Signed-off-by: Srinivas Goud <srinivas.goud@amd.com> Link: https://lore.kernel.org/r/1681825625-10265-3-git-send-email-srinivas.goud@amd.com Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | spi: spi-cadence: Switch to spi_controller structureSrinivas Goud2023-04-181-58/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace spi_master structure with spi_controller structure. spi_controller structure provides interface support for both SPI master and slave controller. Signed-off-by: Srinivas Goud <srinivas.goud@amd.com> Link: https://lore.kernel.org/r/1681825625-10265-2-git-send-email-srinivas.goud@amd.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * | | spi: cadence-quadspi: fix suspend-resume implementationsDhruva Gole2023-04-181-3/+16
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The cadence QSPI driver misbehaves after performing a full system suspend resume: ... spi-nor spi0.0: resume() failed ... This results in a flash connected via OSPI interface after system suspend- resume to be unusable. fix these suspend and resume functions. Fixes: 140623410536 ("mtd: spi-nor: Add driver for Cadence Quad SPI Flash Controller") Signed-off-by: Dhruva Gole <d-gole@ti.com> Link: https://lore.kernel.org/r/20230417091027.966146-3-d-gole@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: cadence-quadspi: Fix random issues with XilinxMark Brown2023-04-171-16/+24
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge series from Sai Krishna Potthuri <sai.krishna.potthuri@amd.com>: Update Xilinx Versal external DMA read logic to fix random issues - Instead of having the fixed timeout, update the read timeout based on the length of the transfer to avoid timeout for larger data size. - While switching between external DMA read and indirect read, disable the SPI before configuration and enable it after configuration as recommended by Octal-SPI Flash Controller specification. Sai Krishna Potthuri (2): spi: cadence-quadspi: Update the read timeout based on the length spi: cadence-quadspi: Disable the SPI before reconfiguring drivers/spi/spi-cadence-quadspi.c | 40 ++++++++++++++++++------------- 1 file changed, 24 insertions(+), 16 deletions(-) -- 2.25.1
| | * | spi: cadence-quadspi: Disable the SPI before reconfiguringSai Krishna Potthuri2023-04-171-15/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Observed random DMA timeout failures while doing back to back transfers which involves switching the modes from DMA to NON-DMA. This issue is observed while testing the OSPI+UBIFS file system test case where rootfs is mounted from OSPI UBIFS partition. To avoid this issue, disable the SPI before changing the configuration from external DMA to NON-DMA and vice versa and reenable it after changing the configuration. As per the Cadence Octal SPI design specification, it is recommended to disable the Octal-SPI enable bit before reconfiguring. Signed-off-by: Sai Krishna Potthuri <sai.krishna.potthuri@amd.com> Link: https://lore.kernel.org/r/20230320095931.2651714-3-sai.krishna.potthuri@amd.com Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | spi: cadence-quadspi: Update the read timeout based on the lengthSai Krishna Potthuri2023-04-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When performing indirect read via external DMA the timeout for completion is set equal to the read length instead of fixed timeout value. For reads larger than 500 bytes, the timeout will continue to be equal to the read length whereas for a small read like the Read Status Register command, the timeout would be 1 or 2 milliseconds. This is not enough to cover the overhead needed in setting up DMA, in that case make sure the timeout is at least 500ms to allow DMA to finish. This solution is inline with the timeout used for Direct read via DMA. Signed-off-by: Sai Krishna Potthuri <sai.krishna.potthuri@amd.com> Link: https://lore.kernel.org/r/20230320095931.2651714-2-sai.krishna.potthuri@amd.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * | | spi: dw: Add support for AMD Pensando Elba SoCBrad Larson2023-04-171-0/+58
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The AMD Pensando Elba SoC includes a DW apb_ssi v4 controller with device specific chip-select control. The Elba SoC provides four chip-selects where the native DW IP supports two chip-selects. The Elba DW_SPI instance has two native CS signals that are always overridden. Signed-off-by: Brad Larson <blarson@amd.com> Reviewed-by: Serge Semin <fancer.lancer@gmail.com> Link: https://lore.kernel.org/r/20230410184526.15990-11-blarson@amd.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: spi-loopback-test: Add module param for iteration lengthRohit Ner2023-04-131-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SPI test framework is designed to run each test case for a list of lengths. Introduce a module parameter to limit the iterations to a single value among the list of lengths. Signed-off-by: Rohit Ner <rohitner@google.com> Link: https://lore.kernel.org/r/20230412202009.3750955-2-rohitner@google.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: add support for Amlogic A1 SPI Flash ControllerMartin Kurbanov2023-04-113-0/+464
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a driver for the Amlogic SPI flash controller support on A113L SoC. Signed-off-by: Martin Kurbanov <mmkurbanov@sberdevices.ru> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230403183217.13280-3-mmkurbanov@sberdevices.ru Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: mchp-pci1xxxx: Fix minor bugs in spi-pci1xxxxMark Brown2023-04-051-13/+7
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge series from Tharun Kumar P <tharunkumar.pasumarthi@microchip.com>: This patch series fixes the following bugs in spi-pci1xxxx driver: 1. Length of SPI transactions is improper 2. SPI transactions fail after suspend and resume 3. Incorrect implementation of pci1xxxx_spi_set_cs API
| | * | spi: mchp-pci1xxxx: Fix improper implementation of disabling chip select linesTharun Kumar P2023-04-051-12/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Hardware does not have support to disable individual chip select lines. Disable all chip select lines by using SPI_FORCE_CE bit. Fixes: 1cc0cbea7167 ("spi: microchip: pci1xxxx: Add driver for SPI controller of PCI1XXXX PCIe switch") Signed-off-by: Tharun Kumar P <tharunkumar.pasumarthi@microchip.com> Link: https://lore.kernel.org/r/20230404171613.1336093-4-tharunkumar.pasumarthi@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | spi: mchp-pci1xxxx: Fix SPI transactions not working after suspend and resumeTharun Kumar P2023-04-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pci1xxxx_spi_resume API masks SPI interrupt bit which prohibits interrupt from coming to the host at the end of the transaction after suspend-resume. This patch unmasks this bit at resume. Fixes: 1cc0cbea7167 ("spi: microchip: pci1xxxx: Add driver for SPI controller of PCI1XXXX PCIe switch") Signed-off-by: Tharun Kumar P <tharunkumar.pasumarthi@microchip.com> Link: https://lore.kernel.org/r/20230404171613.1336093-3-tharunkumar.pasumarthi@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | spi: mchp-pci1xxxx: Fix length of SPI transactions not set properly in driverTharun Kumar P2023-04-051-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In pci1xxxx_spi_transfer_one API, length of SPI transaction gets cleared by setting of length mask. Set length of transaction only after masking length field. Fixes: 1cc0cbea7167 ("spi: microchip: pci1xxxx: Add driver for SPI controller of PCI1XXXX PCIe switch") Signed-off-by: Tharun Kumar P <tharunkumar.pasumarthi@microchip.com> Link: https://lore.kernel.org/r/20230404171613.1336093-2-tharunkumar.pasumarthi@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * | | spi: fsl-spi: No need to check transfer length versus word sizeChristophe Leroy2023-04-051-10/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The verification is already do in the SPI core by function __spi_validate(), not it to check it again in fsl_spi_bufs(). Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Link: https://lore.kernel.org/r/9ace69a8085e22fafd9159e99edd7bbfae2f9940.1680371809.git.christophe.leroy@csgroup.eu Signed-off-by: Mark Brown <broonie@kernel.org>
| * | | spi: fsl-spi: Change mspi_apply_cpu_mode_quirks() to voidChristophe Leroy2023-04-051-14/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mspi_apply_cpu_mode_quirks() always returns the passed bits_per_word unmodified. Make it return void, then don't check bits_per_word anymore on return as it doesn't change. bits_per_word is already checked by __spi_validate() so no risk to have bits_per_word higher than 32. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Link: https://lore.kernel.org/r/3142a7c40af12a160f4e134764f2c34da3d8e1e2.1680371809.git.christophe.leroy@csgroup.eu Signed-off-by: Mark Brown <broonie@kernel.org>
| * | | spi: fsl-cpm: Use 16 bit mode for large transfers with even sizeChristophe Leroy2023-04-052-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On CPM, the RISC core is a lot more efficiant when doing transfers in 16-bits chunks than in 8-bits chunks, but unfortunately the words need to be byte swapped as seen in a previous commit. So, for large tranfers with an even size, allocate a temporary tx buffer and byte-swap data before and after transfer. This change allows setting higher speed for transfer. For instance on an MPC 8xx (CPM1 comms RISC processor), the documentation tells that transfer in byte mode at 1 kbit/s uses 0.200% of CPM load at 25 MHz while a word transfer at the same speed uses 0.032% of CPM load. This means the speed can be 6 times higher in word mode for the same CPM load. For the time being, only do it on CPM1 as there must be a trade-off between the CPM load reduction and the CPU load required to byte swap the data. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Link: https://lore.kernel.org/r/f2e981f20f92dd28983c3949702a09248c23845c.1680371809.git.christophe.leroy@csgroup.eu Signed-off-by: Mark Brown <broonie@kernel.org>
| * | | spi: fsl-spi: Re-organise transfer bits_per_word adaptationChristophe Leroy2023-04-051-25/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For different reasons, fsl-spi driver performs bits_per_word modifications for different reasons: - On CPU mode, to minimise amount of interrupts - On CPM/QE mode to work around controller byte order For CPU mode that's done in fsl_spi_prepare_message() while for CPM mode that's done in fsl_spi_setup_transfer(). Reunify all of it in fsl_spi_prepare_message(), and catch impossible cases early through master's bits_per_word_mask instead of returning EINVAL later. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Link: https://lore.kernel.org/r/0ce96fe96e8b07cba0613e4097cfd94d09b8919a.1680371809.git.christophe.leroy@csgroup.eu Signed-off-by: Mark Brown <broonie@kernel.org>
| * | | spi: fsl-spi: Fix CPM/QE mode Litte EndianChristophe Leroy2023-04-051-5/+7
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CPM has the same problem as QE so for CPM also use the fix added by commit 0398fb70940e ("spi/spi_mpc8xxx: Fix QE mode Litte Endian"): CPM mode uses Little Endian so words > 8 bits are byte swapped. Workaround this by always enforcing wordsize 8 for 16 and 32 bits words. Unfortunately this will not work for LSB transfers where wordsize is > 8 bits so disable these for now. Also limit the workaround to 16 and 32 bits words because it can only work for multiples of 8-bits. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Cc: Joakim Tjernlund <Joakim.Tjernlund@infinera.com> Fixes: 0398fb70940e ("spi/spi_mpc8xxx: Fix QE mode Litte Endian") Link: https://lore.kernel.org/r/1b7d3e84b1128f42c1887dd2fb9cdf390f541bc1.1680371809.git.christophe.leroy@csgroup.eu Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: qup: Convert to platform remove callbackMark Brown2023-04-041-13/+15
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge series from Uwe Kleine-König <u.kleine-koenig@pengutronix.de>: After fixing the error handling in the .remove() callback of the qup driver, convert it to .remove_new() preparing to make platform driver's remove functions return void.
| | * | spi: qup: Convert to platform remove callback returning voidUwe Kleine-König2023-04-041-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/20230330210341.2459548-3-u.kleine-koenig@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | spi: qup: Don't skip cleanup in remove's error pathUwe Kleine-König2023-04-041-9/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Returning early in a platform driver's remove callback is wrong. In this case the dma resources are not released in the error path. this is never retried later and so this is a permanent leak. To fix this, only skip hardware disabling if waking the device fails. Fixes: 64ff247a978f ("spi: Add Qualcomm QUP SPI controller support") Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/20230330210341.2459548-2-u.kleine-koenig@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
| * | | spi: tegra210-quad: Use devm_platform_get_and_ioremap_resource()Yang Li2023-04-041-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to commit 890cc39a8799 ("drivers: provide devm_platform_get_and_ioremap_resource()"), convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by: Yang Li <yang.lee@linux.alibaba.com> Link: https://lore.kernel.org/r/20230328061031.70140-2-yang.lee@linux.alibaba.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * | | spi: tegra114: Use devm_platform_get_and_ioremap_resource()Yang Li2023-04-041-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to commit 890cc39a8799 ("drivers: provide devm_platform_get_and_ioremap_resource()"), convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by: Yang Li <yang.lee@linux.alibaba.com> Link: https://lore.kernel.org/r/20230328061031.70140-1-yang.lee@linux.alibaba.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * | | spi: stm32: Use devm_platform_get_and_ioremap_resource()Yang Li2023-04-041-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to commit 890cc39a8799 ("drivers: provide devm_platform_get_and_ioremap_resource()"), convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by: Yang Li <yang.lee@linux.alibaba.com> Link: https://lore.kernel.org/r/20230328061839.82185-1-yang.lee@linux.alibaba.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * | | spi: imx: Use devm_platform_get_and_ioremap_resource()Yang Li2023-04-041-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to commit 890cc39a8799 ("drivers: provide devm_platform_get_and_ioremap_resource()"), convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by: Yang Li <yang.lee@linux.alibaba.com> Link: https://lore.kernel.org/r/20230328062600.93160-1-yang.lee@linux.alibaba.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * | | spi: spi-imx: fix MX51_ECSPI_* macros when cs > 3Kevin Groeneveld2023-04-041-6/+18
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When using gpio based chip select the cs value can go outside the range 0 – 3. The various MX51_ECSPI_* macros did not take this into consideration resulting in possible corruption of the configuration. For example for any cs value over 3 the SCLKPHA bits would not be set and other values in the register possibly corrupted. One way to fix this is to just mask the cs bits to 2 bits. This still allows all 4 native chip selects to work as well as gpio chip selects (which can use any of the 4 chip select configurations). Signed-off-by: Kevin Groeneveld <kgroeneveld@lenbrook.com> Link: https://lore.kernel.org/r/20230318222132.3373-1-kgroeneveld@lenbrook.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: intel-pci: Add support for Meteor Lake-S SPI serial flashMika Westerberg2023-03-311-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Intel Meteor Lake-S has the same SPI serial flash controller as Meteor Lake-P. Add Meteor Lake-S PCI ID to the driver list of supported devices. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Link: https://lore.kernel.org/r/20230331052812.39983-1-mika.westerberg@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: bcm2835: Convert to platform remove callback returning voidUwe Kleine-König2023-03-311-14/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Convert this driver from always returning zero in the remove callback to the void returning variant. Now that bcm2835_spi_remove returns no error code any more, bcm2835_spi_shutdown() does the same thing as bcm2835_spi_remove(). So drop the shutdown function and use bcm2835_spi_remove() as .shutdown callback. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20230330211022.2460233-1-u.kleine-koenig@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: rockchip-sfc: Use devm_platform_ioremap_resource()Yang Li2023-03-291-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_ioremap_resource(), as this is exactly what this function does. Signed-off-by: Yang Li <yang.lee@linux.alibaba.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20230329062450.58924-1-yang.lee@linux.alibaba.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: xilinx: Use devm_platform_get_and_ioremap_resource()Yang Li2023-03-281-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to commit 890cc39a8799 ("drivers: provide devm_platform_get_and_ioremap_resource()"), convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by: Yang Li <yang.lee@linux.alibaba.com> Reviewed-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/20230328061524.77529-1-yang.lee@linux.alibaba.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: spi-qcom-qspi: Support pinctrl sleep statesDouglas Anderson2023-03-281-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It's fairly common practice for drivers to switch to a "sleep" pinctrl state at the end of its runtime_suspend function and then back to "default" at the beginning of runtime_resume. Let's do that for spi-qcom-qspi. Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20230323102605.5.I79544b9486033bd7b27f2be55adda6d36f62a366@changeid Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: sprd: Use devm_platform_get_and_ioremap_resource()Yang Li2023-03-271-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to commit 890cc39a8799 ("drivers: provide devm_platform_get_and_ioremap_resource()"), convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by: Yang Li <yang.lee@linux.alibaba.com> Reviewed-by: Baolin Wang <baolin.wang@linux.alibaba.com> Link: https://lore.kernel.org/r/20230327060516.93509-2-yang.lee@linux.alibaba.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: sprd-adi: Use devm_platform_get_and_ioremap_resource()Yang Li2023-03-271-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to commit 890cc39a8799 ("drivers: provide devm_platform_get_and_ioremap_resource()"), convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by: Yang Li <yang.lee@linux.alibaba.com> Reviewed-by: Baolin Wang <baolin.wang@linux.alibaba.com> Link: https://lore.kernel.org/r/20230327060516.93509-1-yang.lee@linux.alibaba.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: pic32: Use devm_platform_get_and_ioremap_resource()Yang Li2023-03-271-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to commit 890cc39a8799 ("drivers: provide devm_platform_get_and_ioremap_resource()"), convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by: Yang Li <yang.lee@linux.alibaba.com> Link: https://lore.kernel.org/r/20230327055346.76625-3-yang.lee@linux.alibaba.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: orion: Use devm_platform_get_and_ioremap_resource()Yang Li2023-03-271-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to commit 890cc39a8799 ("drivers: provide devm_platform_get_and_ioremap_resource()"), convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by: Yang Li <yang.lee@linux.alibaba.com> Link: https://lore.kernel.org/r/20230327055346.76625-2-yang.lee@linux.alibaba.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: omap2-mcspi: Use devm_platform_get_and_ioremap_resource()Yang Li2023-03-271-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to commit 890cc39a8799 ("drivers: provide devm_platform_get_and_ioremap_resource()"), convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by: Yang Li <yang.lee@linux.alibaba.com> Reviewed-by: Dhruva Gole <d-gole@ti.com> Link: https://lore.kernel.org/r/20230327055346.76625-1-yang.lee@linux.alibaba.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: f_ospi: Add missing spi_mem_default_supports_op() helperKunihiko Hayashi2023-03-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The .supports_op() callback function returns true by default after performing driver-specific checks. Therefore the driver cannot apply the buswidth in devicetree. Call spi_mem_default_supports_op() helper to handle the buswidth in devicetree. Fixes: 1b74dd64c861 ("spi: Add Socionext F_OSPI SPI flash controller driver") Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Link: https://lore.kernel.org/r/20230322023101.24490-1-hayashi.kunihiko@socionext.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: spi-nxp-fspi: use DLL calibration when clock rate > 100MHzHaibo Chen2023-03-221-0/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | When clock rate > 100MHz, use the DLL calibration mode, and finally add the suggested half of the current clock cycle to sample the data. Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Link: https://lore.kernel.org/r/20230322090451.3179431-2-haibo.chen@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-09-18 18:39:33 +0000