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* drm/nouveau/ce/tu102-: prepare for GSP-RMBen Skeggs2023-10-313-0/+14
| | | | | | | | - (temporarily) disable if GSP-RM detected, will be added later Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-24-skeggsb@gmail.com
* drm/nouveau/vfn/tu102-: prepare for GSP-RMBen Skeggs2023-10-315-1/+68
| | | | | | | | - add R535 implementation of VFN, minus interrupt table Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-23-skeggsb@gmail.com
* drm/nouveau/top/tu102-: prepare for GSP-RMBen Skeggs2023-10-312-0/+10
| | | | | | | | - disable TOP completely when GSP-RM detected Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-22-skeggsb@gmail.com
* drm/nouveau/therm/tu102-: prepare for GSP-RMBen Skeggs2023-10-311-0/+5
| | | | | | | | - disable THERM completely when GSP-RM detected Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-21-skeggsb@gmail.com
* drm/nouveau/privring/tu102-: prepare for GSP-RMBen Skeggs2023-10-311-0/+5
| | | | | | | | - disable PRIVRING completely when GSP-RM detected Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-20-skeggsb@gmail.com
* drm/nouveau/pmu/tu102-: prepare for GSP-RMBen Skeggs2023-10-311-0/+5
| | | | | | | | - disable PMU completely when GSP-RM detected Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-19-skeggsb@gmail.com
* drm/nouveau/mmu/tu102-: prepare for GSP-RMBen Skeggs2023-10-311-0/+4
| | | | | | | | - (temporarily) disable if GSP-RM detected, will be added later Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-18-skeggsb@gmail.com
* drm/nouveau/mc/tu102-: prepare for GSP-RMBen Skeggs2023-10-312-0/+10
| | | | | | | | - disable MC completely when GSP-RM detected Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-17-skeggsb@gmail.com
* drm/nouveau/ltc/tu102-: prepare for GSP-RMBen Skeggs2023-10-312-0/+10
| | | | | | | | - disable LTC completely when GSP-RM detected Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-16-skeggsb@gmail.com
* drm/nouveau/imem/tu102-: prepare for GSP-RMBen Skeggs2023-10-316-30/+96
| | | | | | | | | - move suspend/resume paths to HW-specific code - allow (future) RM paths to be based on nv50_instmem Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-15-skeggsb@gmail.com
* drm/nouveau/i2c/tu102-: prepare for GSP-RMBen Skeggs2023-10-311-0/+5
| | | | | | | | - disable I2C completely when GSP-RM detected Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-14-skeggsb@gmail.com
* drm/nouveau/gpio/tu102-: prepare for GSP-RMBen Skeggs2023-10-312-0/+10
| | | | | | | | - disable GPIO completely when GSP-RM detected Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-13-skeggsb@gmail.com
* drm/nouveau/fuse/tu102-: prepare for GSP-RMBen Skeggs2023-10-311-0/+5
| | | | | | | | - disable FUSE completely when GSP-RM detected Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-12-skeggsb@gmail.com
* drm/nouveau/fb/tu102-: prepare for GSP-RMBen Skeggs2023-10-318-8/+113
| | | | | | | | | | | - add (initial) R535 implementation of FB, need VRAM size etc for boot - expose a way to "wrap" vram at a specific address/size as a standard nvkm_memory allocation, which will be used to write PTEs etc for RM- defined memory regions Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-11-skeggsb@gmail.com
* drm/nouveau/fault/tu102-: prepare for GSP-RMBen Skeggs2023-10-311-1/+7
| | | | | | | | | - disable FAULT completely when GSP-RM detected - SVM support will be disabled when running on RM because of this Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-10-skeggsb@gmail.com
* drm/nouveau/devinit/tu102-: prepare for GSP-RMBen Skeggs2023-10-315-0/+75
| | | | | | | | | - add R535 implementation of DEVINIT, we need some of this for boot - add display disable fuse for ga100- Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-9-skeggsb@gmail.com
* drm/nouveau/bus/tu102-: prepare for GSP-RMBen Skeggs2023-10-311-0/+5
| | | | | | | | - disable BUS completely when GSP-RM detected Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-8-skeggsb@gmail.com
* drm/nouveau/bar/tu102-: prepare for GSP-RMBen Skeggs2023-10-312-1/+13
| | | | | | | | | - (temporarily) disable if GSP-RM detected, will be added later - move BAR2 teardown from dtor(), it doesn't belong there Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-7-skeggsb@gmail.com
* drm/nouveau/acr/tu102-: prepare for GSP-RMBen Skeggs2023-10-312-0/+7
| | | | | | | | - disable ACR completely when GSP-RM detected Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-6-skeggsb@gmail.com
* drm/nouveau/gsp: prepare for GSP-RMBen Skeggs2023-10-3111-24/+182
| | | | | | | | | | | - move TOP after GSP, so we can disable TOP if GSP is in use - provide plumbing to support falcon-only and GSP-RM paths - provide a method for subdevs to detect GSP-RM paths - split tu102/tu116/ga100 paths from gv100, which can't support GSP-RM Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-5-skeggsb@gmail.com
* drm/nouveau/nvkm: bump maximum number of NVJPGBen Skeggs2023-10-313-3/+3
| | | | | | | | RM (and GH100) support 8 NVJPG instances. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-4-skeggsb@gmail.com
* drm/nouveau/nvkm: bump maximum number of NVDECBen Skeggs2023-10-311-1/+1
| | | | | | | | RM (and GH100) support 8 NVDEC instances. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-3-skeggsb@gmail.com
* drm/nouveau/mmu/tu102-: remove write to 0x100e68 during tlb invalidateBen Skeggs2023-10-311-1/+0
| | | | | | | | | | | | This was cargo-culted from traces of RM when the code was written, but we probably shouldn't be touching NV_PFB regs while GSP-RM is running. From traces, it looks like NVIDIA dropped this sometime between 510.54 and 515.48.07, so I guess we can too. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-2-skeggsb@gmail.com
* Merge tag 'amd-drm-next-6.7-2023-10-27' of ↵Dave Airlie2023-10-31137-698/+1474
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.freedesktop.org/agd5f/linux into drm-next amd-drm-next-6.7-2023-10-27: amdgpu: - RAS fixes - Seamless boot fixes - NBIO 7.7 fix - SMU 14.0 fixes - GC 11.5 fixes - DML2 fixes - ASPM fixes - VPE fixes - Misc code cleanups - SRIOV fixes - Add some missing copyright notices - DCN 3.5 fixes - FAMS fixes - Backlight fix - S/G display fix - fdinfo cleanups - EXT_COHERENT fixes for APU and NUMA systems amdkfd: - Misc fixes - Misc code cleanups - SVM fixes Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20231027200343.57132-1-alexander.deucher@amd.com
| * drm/amdgpu: Remove unused variables from amdgpu_show_fdinfoUmio Yasuno2023-10-271-6/+0
| | | | | | | | | | | | | | | | Remove unused variables from amdgpu_show_fdinfo Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Umio Yasuno <coelacanth_dream@protonmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: Remove duplicate fdinfo fieldsRob Clark2023-10-271-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | Some of the fields that are handled by drm_show_fdinfo() crept back in when rebasing the patch. Remove them again. Fixes: 376c25f8ca47 ("drm/amdgpu: Switch to fdinfo helper") Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: <alexander.deucher@amd.com> Co-developed-by: Umio Yasuno <coelacanth_dream@protonmail.com> Signed-off-by: Umio Yasuno <coelacanth_dream@protonmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/amdgpu: avoid to disable gfxhub interrupt when driver is unloadedKenneth Feng2023-10-271-1/+2
| | | | | | | | | | | | | | | | avoid to disable gfxhub interrupt when driver is unloaded on gmc 11 Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: Add EXT_COHERENT support for APU and NUMA systemsDavid Francis2023-10-275-23/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On gfx943 APU, EXT_COHERENT should give MTYPE_CC for local and MTYPE_UC for nonlocal memory. On NUMA systems, local memory gets the local mtype, set by an override callback. If EXT_COHERENT is set, memory will be set as MTYPE_UC by default, with local memory MTYPE_CC. Add an option in the override function for this case, and add a check to ensure it is not used on UNCACHED memory. V2: Combined APU and NUMA code into one patch V3: Fixed a potential nullptr in amdgpu_vm_bo_update Signed-off-by: David Francis <David.Francis@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: Retrieve CE count from ce_count_lo_chip in EccInfo tableCandice Li2023-10-271-7/+5
| | | | | | | | | | | | | | | | | | Retrieve correctable error count from ce_count_lo_chip instead of mca_umc_status. Signed-off-by: Candice Li <candice.li@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: Identify data parity error corrected in replay modeCandice Li2023-10-271-9/+23
| | | | | | | | | | | | | | | | | | Use ErrorCodeExt field to identify data parity error in replay mode. Signed-off-by: Candice Li <candice.li@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Yang Wang <kevinyang.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: Fix typo in IP discovery parsingMukul Joshi2023-10-271-1/+1
| | | | | | | | | | | | | | | | | | | | Fix a typo in parsing of the GC info table header when reading the IP discovery table. Fixes: 0e64c9aad031 ("drm/amdgpu: add type conversion for gc info") Signed-off-by: Mukul Joshi <mukul.joshi@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/display: fix S/G display enablementHamza Mahfooz2023-10-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | An assignment statement was reversed during a refactor which effectively disabled S/G display outright. Since, we use adev->mode_info.gpu_vm_support to indicate to the rest of the driver that S/G display should be enabled and currently it is always set to false. So, to fix this set adev->mode_info.gpu_vm_support's value to that of init_data.flags.gpu_vm_support (and not vice versa). Fixes: 098c13079c6f ("drm/amd/display: enable S/G display for for recent APUs by default") Reported-by: Mark Broadworth <mark.broadworth@amd.com> Tested-by: Mark Broadworth <mark.broadworth@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com> Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdxcp: fix amdxcp unloads incompletelyJames Zhu2023-10-261-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | amdxcp unloads incompletely, and below error will be seen during load/unload, sysfs: cannot create duplicate filename '/devices/platform/amdgpu_xcp.0' devres_release_group will free xcp device at first, platform device will be unregistered later in platform_device_unregister. Signed-off-by: James Zhu <James.Zhu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/amdgpu: fix the GPU power print error in pm infoLi Ma2023-10-261-2/+2
| | | | | | | | | | | | | | | | Modify the print format of the fractional part to avoid display error. Signed-off-by: Li Ma <li.ma@amd.com> Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: Use pcie domain of xcc acpi objectsLijo Lazar2023-10-261-18/+22
| | | | | | | | | | | | | | | | | | | | PCI domain/segment information of xccs is available through ACPI DSM methods. Consider that also while looking for devices. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd: check num of link levels when update pcie paramLin.Cao2023-10-261-0/+3
| | | | | | | | | | | | | | | | | | In SR-IOV environment, the value of pcie_table->num_of_link_levels will be 0, and num_of_levels - 1 will cause array index out of bounds Signed-off-by: Lin.Cao <lincao12@amd.com> Acked-by: Jingwen Chen <Jingwen.Chen2@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: Add a read to GFX v9.4.3 ring testLijo Lazar2023-10-261-0/+1
| | | | | | | | | | | | | | | | | | | | Issue a read to confirm the register write before ringing doorbell. With multiple XCCs there is chance for race condition. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Acked-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Asad Kamal <asad.kamal@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/pm: call smu_cmn_get_smc_version in is_mode1_reset_supported.Yifan Zhang2023-10-263-3/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | is_mode1_reset_supported may be called before smu init, when smu_context is unitialized in driver load/unload test. Call smu_cmn_get_smc_version explicitly in is_mode1_reset_supported. v2: apply to aldebaran in case is_mode1_reset_supported will be uncommented (Candice Li) Fixes: 710d9caec70c ("drm/amd/pm: drop most smu_cmn_get_smc_version in smu") Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com> Reviewed-by: Candice Li <candice.li@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: get RAS poison status from DF v4_6_2Tao Zhou2023-10-264-1/+71
| | | | | | | | | | | | | | | | | | Add DF block and RAS poison mode query for DF v4_6_2. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Stanley.Yang <Stanley.Yang@amd.com> Acked-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: Use discovery table's subrevisionLijo Lazar2023-10-261-1/+8
| | | | | | | | | | | | | | | | | | | | | | Use subrevision of IP version in discovery table to identify SOC revision id for NBIO v7.9 SOCs. Only newer bootloaders update subrevision field. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Le Ma <le.ma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/display: 3.2.256Aric Cyr2023-10-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DC v3.2.256 Summary: * Fixes null-deref regression after "drm/amd/display: Update OPP counter from new interface" * Fixes display flashing when VSR and HDR enabled on dcn32 * Fixes dcn3x intermittent hangs due to FPO * Fixes MST Multi-Stream light up on dcn35 * Fixes green screen on DCN31x when DVI and HDMI monitors attached * Adds DML2 improvements * Adds idle power optimization improvements * Accommodates panels with lower nit backlight * Updates SDP VSC colorimetry from DP test automation request * Reverts "drm/amd/display: allow edp updates for virtual signal" Acked-by: Roman Li <roman.li@amd.com> Signed-off-by: Aric Cyr <aric.cyr@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/display: add interface to query SubVP statusAurabindo Pillai2023-10-264-2/+9
| | | | | | | | | | | | | | | | | | | | | | | | [Why&How] To enable automated testing through IGT, expose an API that is accessible through debugfs to query current status of SubVP feature. Reviewed-by: Alvin Lee <alvin.lee2@amd.com> Acked-by: Roman Li <roman.li@amd.com> Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/display: Read before writing Backlight Mode Set RegisterIswara Nagulendran2023-10-261-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [HOW&WHY] Reading the value from DP_EDP_BACKLIGHT_MODE_SET_REGISTER, DPCD 0x721 before setting the BP_EDP_PANEL_LUMINANC_CONTROL_ENABLE bit to ensure there are no accidental overwrites. Reviewed-by: Sreeja Golui <sreeja.golui@amd.com> Reviewed-by: Harry Vanzylldejong <harry.vanzylldejong@amd.com> Acked-by: Roman Li <roman.li@amd.com> Signed-off-by: Iswara Nagulendran <iswara.nagulendran@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/display: Disable SYMCLK32_SE RCO on DCN314Michael Strauss2023-10-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | [WHY] Currently causes some DP link layer failures, backing out until the failures are root caused. Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Acked-by: Roman Li <roman.li@amd.com> Signed-off-by: Michael Strauss <michael.strauss@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/display: Fix shaper using bad LUT paramsIlya Bakoulin2023-10-261-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [Why] LUT params are not cleared after setting blend TF, which can lead to same params being used for the shaper, if the shaper func is bypassed. [How] Set lut_params to NULL after program_1dlut. Reviewed-by: Krunoslav Kovac <krunoslav.kovac@amd.com> Acked-by: Roman Li <roman.li@amd.com> Signed-off-by: Ilya Bakoulin <ilya.bakoulin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/display: add null check for invalid oppsSamson Tam2023-10-261-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [Why] In cases where number of pipes available is less than num_opp, there will opp instances that are null [How] Add null check to skip over these opp instances Fixes: 40de8403b998 ("drm/amd/display: Update OPP counter from new interface") Reviewed-by: Alvin Lee <alvin.lee2@amd.com> Acked-by: Roman Li <roman.li@amd.com> Signed-off-by: Samson Tam <samson.tam@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/display: Update FAMS sequence for DCN30 & DCN32Alvin Lee2023-10-264-19/+38
| | | | | | | | | | | | | | | | | | | | Provide DCN32 specific sequence and update DCN30 sequence Reviewed-by: Samson Tam <samson.tam@amd.com> Acked-by: Roman Li <roman.li@amd.com> Signed-off-by: Alvin Lee <alvin.lee2@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/display: fix num_ways overflow errorSamson Tam2023-10-261-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [Why] Helper function calculates num_ways using 32-bit. But is returned as 8-bit. If num_ways exceeds 8-bit, then it reports back the incorrect num_ways and erroneously uses MALL when it should not [How] Make returned value 32-bit and convert after it checks against caps.cache_num_ways, which is under 8-bit Reviewed-by: Alvin Lee <alvin.lee2@amd.com> Acked-by: Roman Li <roman.li@amd.com> Signed-off-by: Samson Tam <samson.tam@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/display: Add prefix for plane functionsRodrigo Siqueira2023-10-263-271/+275
| | | | | | | | | | | | | | | | | | | | | | | | This commit adds the amdgpu_dm_plane_ prefix for all functions in the amdgpu_dm_plane.c. This change enables an easy way to filter code paths via ftrace. Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Acked-by: Roman Li <roman.li@amd.com> Signed-off-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amd/display: Add prefix to amdgpu crtc functionsRodrigo Siqueira2023-10-261-24/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The ftrace debug feature allows filtering functions based on a prefix, which can be helpful in some complex debug scenarios. The driver can benefit more from this feature if the function name follows some patterns; for this reason, this commit adds the prefix amdgpu_dm_crtc_ to all the functions that do not have it in the amdgpu_dm_crtc.c file. Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Acked-by: Roman Li <roman.li@amd.com> Signed-off-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-08-23 21:03:24 +0000