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* drm/amdkfd: Rename read_doorbell_id in MQD functionsMukul Joshi2024-03-207-12/+12
| | | | | | | | | | Rename read_doorbell_id function to a more meaningful name, implying what it is used for. No functional change. Suggested-by: Jay Cornwall <jay.cornwall@amd.com> Signed-off-by: Mukul Joshi <mukul.joshi@amd.com> Reviewed-by: Felix Kuehling <felix.kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pm: Use metric table for pcie speed/widthAsad Kamal2024-03-201-1/+10
| | | | | | | | | | | | Report pcie link speed/width using metric table in case of one vf & if pmfw support is available, else report directly from registers in case of pf. Skip reporting it for other cases. v2: Skip multi-vf check(Lijo) Signed-off-by: Asad Kamal <asad.kamal@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pm: Update SMUv13.0.6 PMFW headersAsad Kamal2024-03-201-1/+5
| | | | | | | | | Update PMFW interface headers for updated metrics table with pcie link speed and pcie link width Signed-off-by: Asad Kamal <asad.kamal@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Add the MALL size in the fallback functionRodrigo Siqueira2024-03-202-2/+5
| | | | | | | | | | | | | [Why & How] If the driver has issues retrieving the MALL size for the specific hardware, it might fail since the current value is set to zero. This commit addresses this issue by adding a simple constant value to give the drive a chance to start. Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Correct indentations and spacesAlex Hung2024-03-205-31/+32
| | | | | | | | | | | [Why & How] This fixes indentations and adjust spaces for better readability and code styles. Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Delete duplicated function prototypesAlex Hung2024-03-201-2/+1
| | | | | | | | | | | [Why & How] dcn32_smu_transfer_wm_table_dram_2_smu is defined twice so one is removed. Also adjust prototype orders. Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Enable 2to1 ODM policy for DCN35Rodrigo Siqueira2024-03-201-1/+1
| | | | | | | | | | [Why & How] Enable 2to1 ODM policy for DCN35 Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Remove wrong signal from vrr calculationRodrigo Siqueira2024-03-201-1/+1
| | | | | | | | | | | | In some of the merge conflict fixes, one '+' was accidentally left at the beginning of the line. Fortunately, this did not cause any major issues since it acted as a number signal. This commit addresses this issue by removing the extra '+'. Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Remove code duplicationRodrigo Siqueira2024-03-201-2/+0
| | | | | | | | | | [Why & How] Remove redundant code Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add the hw_ip version of all IP'sSunil Khatri2024-03-201-0/+60
| | | | | | | | | | Add all the IP's version information on a SOC to the devcoredump. Signed-off-by: Sunil Khatri <sunil.khatri@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Revert "Set the power_down_on_boot function pointer to null"Ovidiu Bunea2024-03-201-1/+1
| | | | | | | | | | | | | | | | | This reverts commit 54d9490314af ("drm/amd/display: Set the power_down_on_boot function pointer to null") [why & how] This commit breaks S0i3 entry because DCN does not enter IPS2. Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Charlene Liu <charlene.liu@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Ovidiu Bunea <ovidiu.bunea@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Set the power_down_on_boot function pointer to nullMuhammad Ahmed2024-03-201-1/+1
| | | | | | | | | | | | | | | | | | | [WHY] Blackscreen hang @ PC EF000025 when trying to wake up from S0i3. DCN gets powered off due to dc_power_down_on_boot() being called after timeout. [HOW] Setting the power_down_on_boot function pointer to null since we don't expect the function to be called for APU. Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Acked-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Muhammad Ahmed <ahmed.ahmed@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: 3.2.275Aric Cyr2024-03-201-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Support long vblank feature - Add monitor patch for specific eDP - Init DPPCLK from SMU on dcn32 - Update odm when ODM combine is changed on an otg master pipe with no plane - Fix idle check for shared firmware state - Add guards for idle on reg read/write - Guard cursor idle reallow by DC debug option - Add debug counters to IPS exit prints - Add left edge pixel for YCbCr422/420 + ODM pipe split - Amend coasting vtotal for replay low hz - Refactor DPP into a component directory - Set the power_down_on_boot function pointer to null - Implement update_planes_and_stream_v3 sequence - Lock all enabled otg pipes even with no planes - Implement wait_for_odm_update_pending_complete - Add a dc_state NULL check in dc_state_release - Backup and restore only on full updates - Update DMUB flags and definitions - Return the correct HDCP error code - Add comments to v_total calculation and drop legacy TODO Acked-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Aric Cyr <aric.cyr@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Backup and restore only on full updatesAlvin Lee2024-03-204-97/+100
| | | | | | | | | | | | | | | | | [WHY & HOW] Since the backup and restore for plane and stream states has a significant amount of data to copy, we will change the backup and restore sequence to only take place during full updates. We will also move the scratch memory to struct dc instead of dc_state to avoid needing to allocate large amounts of memory every time we create a new DC state. Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Acked-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alvin Lee <alvin.lee2@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Implement update_planes_and_stream_v3 sequenceWenjing Liu2024-03-201-232/+469
| | | | | | | | | | | | | | | | | | | | | | | [WHY & HOW] Update planes and stream version 3 separates FULL and FAST updates to their own sequences. It aims to clean up frequent checks for update type resulting unnecessary branching in logic flow. It also adds a new commit minimal transition sequence, which detects the need for minimal transition based on the actual comparison of current and new states instead of "predicting" it based on per feature software policy, i.e. could_mpcc_tree_change_for_active_pipes. The new commit minimal transition sequence is made universal to any power saving features that would use extra free pipes such as Dynamic ODM/MPC Combine, MPO or SubVp. Therefore there is no longer a need to specially handle compatibility problems with transitions among those features as they are now transparent to the new sequence. Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Acked-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Wenjing Liu <wenjing.liu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Skip virt_exchange_init on SDMA poison consumptionVictor Skvortsov2024-03-201-1/+2
| | | | | | | | | Host will initiate an FLR in SDMA poison consumption scenario. Guest should wait for FLR message to re-init data exchange. Signed-off-by: Victor Skvortsov <victor.skvortsov@amd.com> Reviewed-by: Zhigang Luo <zhigang.luo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Do a basic health check before resetLijo Lazar2024-03-201-0/+24
| | | | | | | | | | Check if the device is present in the bus before trying to recover. It could be that device itself is lost from the bus in some hang situations. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Asad Kamal <asad.kamal@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Add comments to v_total calculation and drop legacy TODORodrigo Siqueira2024-03-202-3/+2
| | | | | | | | | | | | [WHY & HOW] This commit just adds some simple comments to help understand the calculation of V total duration for Freesync. Also, remove a legacy TODO comment from link service type. Acked-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Update DMUB flags and definitionsAnthony Koo2024-03-202-4/+38
| | | | | | | | | | | | | | | | [WHAT] - Update replay residency tracing design to support more types including tracking PHY and ALPM residency types - Add commands for Replay frame update count profiling - Enhance HWFQ with additional flags to allow for more optimized IPS low power state residencies - Add new flag to indicate if a new frame update needed for ABM to ramp up into steady state Acked-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Anthony Koo <anthony.koo@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add the sensor value of VCN activityXiaojian Du2024-03-202-0/+38
| | | | | | | | This will add the sensor value of VCN activity for some ASICs. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Refactor DPP into a component directoryRevalla Hari Krishna2024-03-2033-24/+128
| | | | | | | | | | | [WHY & HOW] Move all dpp files to a new dpp directory. Reviewed-by: Martin Leung <martin.leung@amd.com> Acked-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Revalla Hari Krishna <harikrishna.revalla@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Add debug counters to IPS exit printsNicholas Kazlauskas2024-03-201-3/+15
| | | | | | | | | | | | | | | [WHY] To have a log of the entry/exit counters in case the system hangs to measure stability. [HOW] Read them from firmware state and pass them to the prints. Reviewed-by: Duncan Ma <duncan.ma@amd.com> Acked-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Guard cursor idle reallow by DC debug optionNicholas Kazlauskas2024-03-201-2/+2
| | | | | | | | | | | | | | | [WHY] To control whether idle optimizations reallowed after the first cursor update. [HOW] Add checks to the conditions. Reviewed-by: Duncan Ma <duncan.ma@amd.com> Acked-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Add guards for idle on reg read/writeNicholas Kazlauskas2024-03-202-0/+10
| | | | | | | | | | | | | | | | | | | | | [WHY] If DCN is in idle then we should not be accessing DCN registers or it can lead to hangs. [HOW] Log the error and return 0 or drop the write if it's in idle. This is skipped in the exit sequence itself since the boolean flips before it starts. It also does not cover accesses from external clients outside of DM/DC like firmware or the kernel mode driver. Reviewed-by: Duncan Ma <duncan.ma@amd.com> Acked-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: cleanup unused variableShashank Sharma2024-03-201-7/+3
| | | | | | | | | | | This patch removes an unused input variable in the MES doorbell function. Cc: Christian König <Christian.Koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <Christian.Koenig@amd.com> Signed-off-by: Shashank Sharma <shashank.sharma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Fix potential index out of bounds in color transformation ↵Srinivasan Shanmugam2024-03-201-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | function Fixes index out of bounds issue in the color transformation function. The issue could occur when the index 'i' exceeds the number of transfer function points (TRANSFER_FUNC_POINTS). The fix adds a check to ensure 'i' is within bounds before accessing the transfer function points. If 'i' is out of bounds, an error message is logged and the function returns false to indicate an error. Reported by smatch: drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_cm_common.c:405 cm_helper_translate_curve_to_hw_format() error: buffer overflow 'output_tf->tf_pts.red' 1025 <= s32max drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_cm_common.c:406 cm_helper_translate_curve_to_hw_format() error: buffer overflow 'output_tf->tf_pts.green' 1025 <= s32max drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_cm_common.c:407 cm_helper_translate_curve_to_hw_format() error: buffer overflow 'output_tf->tf_pts.blue' 1025 <= s32max Fixes: b629596072e5 ("drm/amd/display: Build unity lut for shaper") Cc: Vitaly Prosyak <vitaly.prosyak@amd.com> Cc: Charlene Liu <Charlene.Liu@amd.com> Cc: Harry Wentland <harry.wentland@amd.com> Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Cc: Roman Li <roman.li@amd.com> Cc: Aurabindo Pillai <aurabindo.pillai@amd.com> Cc: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Support long vblank featureRobin Chen2024-03-2012-4/+253
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [WHY] We want to support low hz case, but the original vtotal/vtotal_min/vtotal_max can't support more than 0x7FFF. [HOW] We use the 2 HW reg to contorl long vblank case. 1. OTG_V_COUNT_STOP_CONTROL -> vcount_stop 2. OTG_V_COUNT_STOP_CONTROL2 -> vcount_stop_timer vcount_stop define from which line we stop using vcount and start using vcount2. vcount_stop_timer define how long we use vcount2. Ex: Vtotal = 7 OTG_V_COUNT_STOP_CONTROL = 4 OTG_V_COUNT_STOP_CONTROL2 = 5 time : 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11 vcount : 0, 1, 2, 3, - - - - - 4, 5, 6 vcount2 : 0, 1, 2, 3, 4, Reviewed-by: Jun Lei <jun.lei@amd.com> Acked-by: Alex Hung <alex.hung@amd.com> Signed-off-by: ChunTao Tso <chuntao.tso@amd.com> Signed-off-by: Robin Chen<robin.chen@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: 3.2.274Aric Cyr2024-03-201-1/+1
| | | | | | | | | | | | | | | | | | | | - Change default size for dummy plane in DML2 - Enable DML2 debug flags - Add some forward declarations - Add DML2 folder to include path - Set DCN351 BB and IP the same as DCN35 - Override min required DCFCLK in dml1_validate - Fix function banner for amdgpu_dm_psr_disable_all() - Allow dirty rects to be sent to dmub when abm is active - Add debug key to allow disabling dtbclk - Add debug prints for IPS testing - Exit idle optimizations before HDCP execution - Add entry and exit counters Acked-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Aric Cyr <aric.cyr@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Add entry and exit countersAnthony Koo2024-03-201-1/+7
| | | | | | | | | | [WHY & HOW] Add new counters in the shared IPS firmware state. Acked-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Anthony Koo <anthony.koo@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Add debug prints for IPS testingNicholas Kazlauskas2024-03-204-5/+86
| | | | | | | | | | | | | | | | [WHY] To log commit states and when we transition in/out of allow and idle states and the caller. [HOW] Add a new logging helper and wrap idle optimization calls to receive the caller. Reviewed-by: Duncan Ma <duncan.ma@amd.com> Acked-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Add debug key to allow disabling dtbclkMuhammad Ahmed2024-03-202-1/+3
| | | | | | | | | | | [HOW] Add debug key to allow disabling dtbclk Reviewed-by: Charlene Liu <charlene.liu@amd.com> Acked-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Muhammad Ahmed <ahmed.ahmed@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: skip GFX FED error in page fault handlingTao Zhou2024-03-201-1/+9
| | | | | | | | | | | Let kfd interrupt handler process it. v2: return 0 instead of 1 for fed error. drop the usage of strcmp in interrupt handler. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: retire gfx ras query_utcl2_poison_statusTao Zhou2024-03-206-21/+30
| | | | | | | | | | | Replace it with related interface in gfxhub functions. v2: replace node id with xcc id. get node id for query_utcl2_poison_status Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add ring buffer information in devcoredumpSunil Khatri2024-03-201-0/+21
| | | | | | | | | | Add relevant ringbuffer information such as rptr, wptr,rb mask, ring name, ring size and also the rings content for each ring on a gpu reset. Signed-off-by: Sunil Khatri <sunil.khatri@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Fix function banner for amdgpu_dm_psr_disable_all()Roman Li2024-03-201-1/+1
| | | | | | | | | | | | | | | [WHY] Incorrect function name in function banner. [HOW] Correct name and brief description. Reviewed-by: Hersen Wu <hersenxs.wu@amd.com> Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Acked-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add vm fault information to devcoredumpSunil Khatri2024-03-201-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | Add page fault information to the devcoredump. Output of devcoredump: **** AMDGPU Device Coredump **** version: 1 kernel: 6.7.0-amd-staging-drm-next module: amdgpu time: 29.725011811 process_name: soft_recovery_p PID: 1720 Ring timed out details IP Type: 0 Ring Name: gfx_0.0.0 [gfxhub] Page fault observed Faulty page starting at address: 0x0000000000000000 Protection fault status register: 0x301031 VRAM is lost due to GPU reset! Signed-off-by: Sunil Khatri <sunil.khatri@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add utcl2 poison query for gfxhubTao Zhou2024-03-203-0/+34
| | | | | | | | | | Implement it for gfxhub 1.0 and 1.2. v2: input logical xcc id for poison query interface. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add new bit definitions for GC 9.0 PROTECTION_FAULT_STATUSTao Zhou2024-03-201-0/+4
| | | | | | | | Add UCE and FED bit definitions. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Add DML2 folder to include pathAurabindo Pillai2024-03-201-0/+1
| | | | | | | | | | Add DML2 compilation rule in the Makefile. Reviewed-by: Chaitanya Dhere <chaitanya.dhere@amd.com> Acked-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add recent pagefault info in vm_managerSunil Khatri2024-03-202-0/+10
| | | | | | | | | | | | Currently page fault information is stored per vm and which could be freed or stale during reset. Add it pagefault information in the vm_manager which is a global space for vm's and remains valid across. Signed-off-by: Sunil Khatri <sunil.khatri@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Add some forward declarationsAurabindo Pillai2024-03-201-0/+2
| | | | | | | | | | | | [WHAT] Add DML2 pipe and config struct forward declaration as a preparation for DML2. Reviewed-by: Chaitanya Dhere <chaitanya.dhere@amd.com> Acked-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Revert Add left edge pixel + ODM pipe splitGabe Teeger2024-03-205-57/+0
| | | | | | | | | | | | | | | This reverts commit e2fdd5c5257d ("drm/amd/display: Add left edge pixel for YCbCr422/420 + ODM pipe split") Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: George Shen <george.shen@amd.com> Reviewed-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Jun Lei <jun.lei@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Gabe Teeger <gabe.teeger@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Add left edge pixel for YCbCr422/420 + ODM pipe splitGeorge Shen2024-03-205-0/+57
| | | | | | | | | | | | | | | | | | | | | | | | [WHY] Currently 3-tap chroma subsampling is used for YCbCr422/420. When ODM pipesplit is used, pixels on the left edge of ODM slices need one extra pixel from the right edge of the previous slice to calculate the correct chroma value. Without this change, the chroma value is slightly different than expected. This is usually imperceptible visually, but it impacts test pattern CRCs for compliance test automation. [HOW] Update logic to use the register for adding extra left edge pixel for YCbCr422/420 ODM cases. Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Alvin Lee <alvin.lee2@amd.com> Acked-by: Alex Hung <alex.hung@amd.com> Signed-off-by: George Shen <george.shen@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: revert Exit idle optimizations before HDCP executionMartin Leung2024-03-202-18/+0
| | | | | | | | | | | | | | | | why and how: causes black screen on PNP on DCN 3.5 This reverts commit f30a3bea92bd ("drm/amd/display: Exit idle optimizations before HDCP execution") Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Martin Leung <martin.leung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Exit idle optimizations before HDCP executionNicholas Kazlauskas2024-03-202-0/+18
| | | | | | | | | | | | | | | | | | | [WHY] PSP can access DCN registers during command submission and we need to ensure that DCN is not in PG before doing so. [HOW] Add a callback to DM to lock and notify DC for idle optimization exit. It can't be DC directly because of a potential race condition with the link protection thread and the rest of DM operation. Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Charlene Liu <charlene.liu@amd.com> Acked-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/pm: Don't use OD table on ArcturusMa Jun2024-03-201-28/+5
| | | | | | | | | OD is not supported on Arcturus, so the OD table should not be used. Signed-off-by: Ma Jun <Jun.Ma2@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: drop setting buffer funcs in sdma442Le Ma2024-03-201-22/+1
| | | | | | | | | | To fix the entity rq NULL issue. This setting has been moved to upper level. Fixes: b70438004a14 ("drm/amdgpu: move buffer funcs setting up a level") Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Fix noise issue on HDMI AV muteLeo Ma2024-03-201-1/+11
| | | | | | | | | | | | | | | | | | | [Why] When mode switching is triggered there is momentary noise visible on some HDMI TV or displays. [How] Wait for 2 frames to make sure we have enough time to send out AV mute and sink receives a full frame. Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Leo Ma <hanghong.ma@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/display: Revert Remove pixle rate limit for subvpWenjing Liu2024-03-201-0/+1
| | | | | | | | | | | | | | | | | | | | | | This reverts commit 340383c734f8 ("drm/amd/display: Remove pixle rate limit for subvp") [why] The original commit causes a regression when subvp is applied on ODM required 8k60hz timing. The display shows black screen on boot. The issue can be recovered with hotplug. It also causes MPO to fail. We will temprarily revert this commit and investigate the root cause further. Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Reviewed-by: Chaitanya Dhere <chaitanya.dhere@amd.com> Reviewed-by: Martin Leung <martin.leung@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Wenjing Liu <wenjing.liu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* Revert "drm/amdgpu/vpe: don't emit cond exec command under collaborate mode"Lang Yu2024-03-201-3/+0
| | | | | | | | | | Ready now. Remove this workaround. This reverts commit d40f6213b52c161fd4634933acbc32103a283363. Signed-off-by: Lang Yu <Lang.Yu@amd.com> Tested-by: Alan Liu <haoping.liu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>