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* gpio, bcm-kona, LLVMLinux: Remove use of __initconstBehan Webster2014-09-241-1/+1
| | | | | | | | | | | | | The __initconst is in the wrong place, and when moved to the correct place it uncovers an error where the variable is used by non-init data structures. Instead merely make them const and put the const in the right spot. Signed-off-by: Behan Webster <behanw@converseincode.com> Reviewed-by: Mark Charlebois <charlebm@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Matt Porter <mporter@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: Fix ngpio in gpio-xilinx driverGernot Vormayr2014-09-241-12/+15
| | | | | | | | | | | | | If one adds gpio-controller; to the chip in the devicetree, then initialization fails with 'gpiochip_find_base: cannot find free range', because ngpio is 0. This patch fixes the bug. This version includes the suggestions from Linus Walleij. Tested on ml507 board. Signed-off-by: Gernot Vormayr <gvormayr@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: dwapb: fix pointer to integer castLinus Walleij2014-09-241-2/+2
| | | | | | | | The statements BUG_ON(ctx == 0) was implicitly casting a pointer to an integer for comparison. Do this with a bool test instead to get away from sparse warnings. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: xgene: Remove unneeded #ifdef CONFIG_OF guardAxel Lin2014-09-241-2/+0
| | | | | | | This driver depends on OF_GPIO, so it won't be built if !CONFIG_OF. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: xgene: Remove unneeded forward declation for struct xgene_gpioAxel Lin2014-09-241-2/+0
| | | | | Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: xgene: Fix missing spin_lock_init()Axel Lin2014-09-241-0/+1
| | | | | Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: ks8695: fix switch case indentationVarka Bhadram2014-09-241-10/+10
| | | | | Signed-off-by: Varka Bhadram <varkab@cdac.in> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpiolib: add irq_not_threaded flag to gpio_chipOctavian Purdila2014-09-241-1/+1
| | | | | | | | Some GPIO chips (e.g. the DLN2 USB adapter) have blocking get/set operation but do not need a threaded irq handler. Signed-off-by: Octavian Purdila <octavian.purdila@intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: Fix return value check in xgene_gpio_probe()Wei Yongjun2014-09-241-2/+2
| | | | | | | | | | In case of error, the function devm_ioremap_nocache() returns NULL pointer not ERR_PTR(). The IS_ERR() test in the return value check should be replaced with NULL test. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* GPIO: gpiolib: trivial: Add missing carriage returnAlexander Shiyan2014-09-231-1/+1
| | | | | Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: omap: Fix interrupt namesNishanth Menon2014-09-231-14/+17
| | | | | | | | | | | | | | | | | | | | | | | | | When viewing the /proc/interrupts, there is no information about which GPIO bank a specific gpio interrupt is hooked on to. This is more than a bit irritating as such information can esily be provided back to the user and at times, can be crucial for debug. So, instead of displaying something like: 31: 0 0 GPIO 0 palmas 32: 0 0 GPIO 27 mmc0 Display the following with appropriate device name: 31: 0 0 4ae10000.gpio 0 palmas 32: 0 0 4805d000.gpio 27 mmc0 This requires that we create irq_chip instance specific for each GPIO bank which is trivial to achieve. Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Acked-by: Kevin Hilman <khilman@linaro.org> Acked-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: samsung: Remove remaining check for CONFIG_S5P_GPIO_DRVSTRPaul Bolle2014-09-231-50/+0
| | | | | | | | | | Commit d78c16ccde96 ("ARM: SAMSUNG: Remove remaining legacy code") removed the Kconfig symbol S5P_GPIO_DRVSTR. It didn't remove one check for the related macro. Remove that check and the dead code it hides. Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Reviewed-by: Tomasz Figa <tomasz.figa@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: use container_of to resolve cs5535_gpio_chip from gpio_chipFabian Frederick2014-09-231-3/+6
| | | | | | | Use container_of instead of casting first structure member. Signed-off-by: Fabian Frederick <fabf@skynet.be> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* GPIO: gpio-dwapb: Suspend & Resume PM enablingWeike Chen2014-09-231-0/+115
| | | | | | | | | | This patch enables suspend and resume mode for the power management, and it is based on Josef Ahmad's previous work. Reviewed-by: Hock Leong Kweh <hock.leong.kweh@intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Signed-off-by: Weike Chen <alvin.chen@intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* GPIO: gpio-dwapb: Support DebounceWeike Chen2014-09-231-2/+34
| | | | | | | | | | This patch enables 'debounce' for the designware GPIO, and it is based on Josef Ahmad's previous work. Reviewed-by: Hock Leong Kweh <hock.leong.kweh@intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Weike Chen <alvin.chen@intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* GPIO: gpio-dwapb: Change readl&writel to dwapb_read&dwapb_writeWeike Chen2014-09-231-10/+27
| | | | | | | | This patch replaces 'readl&writel' with 'dwapb_read&dwapb_write'. Reviewed-by: Shevchenko, Andriy <andriy.shevchenko@intel.com> Signed-off-by: Weike Chen <alvin.chen@intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* GPIO: gpio-dwapb: Enable platform driver binding to MFD driverWeike Chen2014-09-232-58/+167
| | | | | | | | | | | | The Synopsys DesignWare APB GPIO driver only supports open firmware devices. But, like Intel Quark X1000 SOC, which has a single PCI function exporting a GPIO and an I2C controller, it is a Multifunction device. This patch is to enable the current Synopsys DesignWare APB GPIO driver to support the Multifunction device which exports the designware GPIO controller. Reviewed-by: Hock Leong Kweh <hock.leong.kweh@intel.com> Signed-off-by: Weike Chen <alvin.chen@intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: gpiolib: set gpiochip_remove retval to voidabdoulaye berthe2014-09-231-17/+7
| | | | | | | | This avoids handling gpiochip remove error in device remove handler. Signed-off-by: Abdoulaye Berthe <berthe.ab@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* tty: sc16is7xx: remove retval from gpiochip_remove()Linus Walleij2014-09-231-8/+5
| | | | | | | | We are trying to smoke out the use of the return value from gpiochip_remove() from the kernel, this has been missed. Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: remove remaining users of gpiochip_remove() retvalLinus Walleij2014-09-234-19/+7
| | | | | | | | | | | Some drivers accidentally still use the return value from gpiochip_remove(). Get rid of them so we can simplify this function and get rid of the return value. Cc: Abdoulaye Berthe <berthe.ab@gmail.com> Acked-by: Alexandre Courbot <acourbot@nvidia.com> Acked-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: remove remaining users of gpiochip_remove() retvalLinus Walleij2014-09-236-39/+10
| | | | | | | | | Some drivers accidentally still use the return value from gpiochip_remove(). Get rid of them so we can simplify this function and get rid of the return value. Cc: Abdoulaye Berthe <berthe.ab@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* driver:gpio remove all usage of gpio_remove retval in driverabdoulaye berthe2014-09-1819-96/+40
| | | | | | | | | | | | | this remove all reference to gpio_remove retval in all driver except pinctrl and gpio. the same thing is done for gpio and pinctrl in two different patches. Signed-off-by: Abdoulaye Berthe <berthe.ab@gmail.com> Acked-by: Michael Büsch <m@bues.ch> Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Acked-by: Mauro Carvalho Chehab <m.chehab@samsung.com> Acked-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: syscon: reuse for keystone 2 socsGrygorii Strashko2014-09-161-0/+35
| | | | | | | | | | | | | | | | | | | | | On Keystone SOCs, ARM host can send interrupts to DSP cores using the DSP GPIO controller IP. Each DSP GPIO controller provides 28 IRQ signals for each DSP core. This is one of the component used by the IPC mechanism used on Keystone SOCs. Keystone 2 DSP GPIO controller has specific features: - each GPIO can be configured only as output pin; - setting GPIO value to 1 causes IRQ generation on target DSP core; - reading pin value returns 0 - if IRQ was handled or 1 - IRQ is still pending. This patch updates gpio-syscon driver to be reused by Keystone 2 SoCs, because the Keystone 2 DSP GPIO controller is controlled through Syscon devices and, as requested by Linus Walleij, such kind of GPIO controllers should be integrated with drivers/gpio/gpio-syscon.c driver. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: syscon: retrive syscon node and regs offsets from dtGrygorii Strashko2014-09-161-8/+43
| | | | | | | | | | | | | | | | | | | | | | This patch adds handling of new "gpio,syscon-dev" DT property, which allows to specify syscon node and data/direction registers offsets in DT. "gpio,syscon-dev" has following format: gpio,syscon-dev = <&syscon_dev data_reg_offset [direction_reg_offset]>; where - syscon_dev - phandle on syscon node - data_reg_offset - offset of data register (in bytes) - direction_reg_offset - offset of dirrection register (optional, in bytes) for example: gpio,syscon-dev = <&devctrl 0x254>; In such way, the support of multiple Syscon GPIO devices is added. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: syscon: add soc specific callback to assign output valueGrygorii Strashko2014-09-161-2/+6
| | | | | | | | | | | | | Some SoCs (like Keystone) may require to perform special sequence of operations to assign output GPIO value, so default implementation of .set() callback from gpio-syscon driver can't be used. Hence, add optional, SoC specific callback to assign output gpio value. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: mcp23s08 to support both device tree and platform dataSonic Zhang2014-09-042-31/+34
| | | | | | | | | | | | | | | | | Device tree is not enabled in some architecture where gpio driver mcp23s08 is still required. v2-changes: - Parse device tree properties into platform data other than individual variables. v3-changes: - Use of_node in gpio_chip device structure, because the struct device * always has an of_node which is NULL when OF is not used. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: zynq: Fixed broken wakeup implementationEzra Savard2014-09-041-14/+20
| | | | | | | | | | Use of unmask/mask in set_wake was an incorrect implementation. The new implementation correctly sets wakeup for the gpio chip's IRQ so the gpio chip will not sleep while wakeup-enabled gpio are in use. Signed-off-by: Ezra Savard <ezra.savard@xilinx.com> Reviewed-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: zynq: Mask non-wakeup GPIO interrupts on suspendEzra Savard2014-09-041-1/+3
| | | | | | | | | Added flag to the GPIO chip so that IRQ from non-wakeup GPIO will not wake the system. Signed-off-by: Ezra Savard <ezra.savard@xilinx.com> Reviewed-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: zynq: Take bank offset into account when reporting a IRQLars-Peter Clausen2014-09-031-1/+9
| | | | | | | | | | When looking up the IRQ the bank offset needs to be taken into account. Otherwise interrupts for banks other than bank 0 get incorrectly reported as interrupts for bank 0. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: adnp: switch to use irqchip helpersLinus Walleij2014-09-022-108/+48
| | | | | | | | | | | This switches the ADNP GPIO driver to use the gpiolib irqchip helpers. Also do some random refactoring to make it look like most other GPIO drivers. Cc: Roland Stigge <stigge@antcom.de> Cc: Lars Poeschel <poeschel@lemonage.de> Cc: Thierry Reding <thierry.reding@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: change gpiochip_request_own_desc() prototypeAlexandre Courbot2014-08-292-21/+17
| | | | | | | | | | | | | | | | The current prototype of gpiochip_request_own_desc() requires to obtain a pointer to a descriptor. This is in contradiction to all other GPIO request schemes, and imposes an extra step of obtaining a descriptor to drivers. Most drivers actually cannot even perform that step since the function that does it (gpichip_get_desc()) is gpiolib-private. Change gpiochip_request_own_desc() to return a descriptor from a (chip, hwnum) tuple and update users of this function (currently gpiolib-acpi only). Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Tested-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: acpi: normalize use of gpiochip_get_desc()Alexandre Courbot2014-08-291-8/+14
| | | | | | | | | | | | | GPIO descriptors are changing from unique and permanent tokens to allocated resources. Therefore gpiochip_get_desc() cannot be used as a way to obtain a global GPIO descriptor anymore. This patch updates the gpiolib ACPI support code to keep and use the descriptor returned by a centralized call to gpiochip_get_desc(). Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Tested-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: zynq: Reduce level of indention in zynq_gpio_irqhandler()Lars-Peter Clausen2014-08-291-12/+19
| | | | | | | | | zynq_gpio_irqhandler() uses up to 7 tabs of indention in some parts. Refactor things to use a helper function for the inner loop to reduce the indention to a sane level. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: zynq: Remove .owner field for driverMichal Simek2014-08-291-1/+0
| | | | | | | | | | | | | | There is no need to init .owner field. Based on the patch from Peter Griffin <peter.griffin@linaro.org> "mmc: remove .owner field for drivers using module_platform_driver" This patch removes the superflous .owner field for drivers which use the module_platform_driver API, as this is overriden in platform_driver_register anyway." Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: Add APM X-Gene SoC GPIO controller supportFeng Kan2014-08-283-0/+260
| | | | | | | Add APM X-Gene SoC gpio controller driver. Signed-off-by: Feng Kan <fkan@apm.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: pca953x: Drop deprecated DT bindingsMarkus Pargmann2014-08-281-51/+3
| | | | | | | | Drop deprecated DT bindings and use automaticly assigned gpio and irq bases. Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* Merge tag 'renesas-sh-drivers-for-v3.17' of ↵Linus Torvalds2014-08-252-3/+6
|\ | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas Pull SH driver fix from Simon Horman: "Confine SH_INTC to platforms that need it" * tag 'renesas-sh-drivers-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: sh: intc: Confine SH_INTC to platforms that need it
| * sh: intc: Confine SH_INTC to platforms that need itGeert Uytterhoeven2014-08-222-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently the sh-intc driver is compiled on all SuperH and non-multiplatform SH-Mobile platforms, while it's only used on a limited number of platforms: - SuperH: SH2(A), SH3(A), SH4(A)(L) (all but SH5) - ARM: sh7372, sh73a0 Drop the "default y" on SH_INTC, make all CPU platforms that use it select it, and protect all sub-options by "if SH_INTC" to fix this. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Magnus Damm <damm+renesas@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | Merge branch 'x86-urgent-for-linus' of ↵Linus Torvalds2014-08-241-4/+4
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86 fixes from Ingo Molnar: "A couple of EFI fixes, plus misc fixes all around the map" * 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: efi/arm64: Store Runtime Services revision firmware: Do not use WARN_ON(!spin_is_locked()) x86_32, entry: Clean up sysenter_badsys declaration x86/doc: Fix the 'tlb_single_page_flush_ceiling' sysconfig path x86/mm: Fix sparse 'tlb_single_page_flush_ceiling' warning and make the variable read-mostly x86/mm: Fix RCU splat from new TLB tracepoints
| * | firmware: Do not use WARN_ON(!spin_is_locked())Guenter Roeck2014-08-221-4/+4
| |/ | | | | | | | | | | | | | | | | | | | | spin_is_locked() always returns false for uniprocessor configurations in several architectures, so do not use WARN_ON with it. Use lockdep_assert_held() instead to also reduce overhead in non-debug kernels. Signed-off-by: Guenter Roeck <linux@roeck-us.net> Cc: <stable@vger.kernel.org> Signed-off-by: Matt Fleming <matt.fleming@intel.com>
* | Merge tag 'fixes-for-linus' of ↵Linus Torvalds2014-08-241-1/+1
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC fixes from Olof Johansson: "A collection of fixes from this week, it's been pretty quiet and nothing really stands out as particularly noteworthy here -- mostly minor fixes across the field: - ODROID booting was fixed due to PMIC interrupts missing in DT - a collection of i.MX fixes - minor Tegra fix for regulators - Rockchip fix and addition of SoC-specific mailing list to make it easier to find posted patches" * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: bus: arm-ccn: Fix warning message ARM: shmobile: koelsch: Remove non-existent i2c6 pinmux ARM: tegra: apalis/colibri t30: fix on-module 5v0 supplies MAINTAINERS: add new Rockchip SoC list ARM: dts: rockchip: readd missing mmc0 pinctrl settings ARM: dts: ODROID i2c improvements ARM: dts: Enable PMIC interrupts on ODROID ARM: dts: imx6sx: fix the pad setting for uart CTS_B ARM: dts: i.MX53: fix apparent bug in VPU clks ARM: imx: correct gpu2d_axi and gpu3d_axi clock setting ARM: dts: imx6: edmqmx6: change enet reset pin ARM: dts: vf610-twr: Fix pinctrl_esdhc1 pin definitions. ARM: imx: remove unnecessary ARCH_HAS_OPP select ARM: imx: fix TLB missing of IOMUXC base address during suspend ARM: imx6: fix SMP compilation again ARM: dt: sun6i: Add #address-cells and #size-cells to i2c controller nodes
| * | bus: arm-ccn: Fix warning messagePawel Moll2014-08-241-1/+1
| |/ | | | | | | | | | | | | | | | | A message warning a user about wrong vc value was printing out port instead. Reported-by: Drew Richardson <drew.richardson@arm.com> Signed-off-by: Pawel Moll <pawel.moll@arm.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* | Merge tag 'gpio-v3.17-2' of ↵Linus Torvalds2014-08-244-12/+48
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio Pull gpio fixes from Linus Walleij: - a largeish fix for the IRQ handling in the new Zynq driver. The quite verbose commit message gives the exact details. - move some defines for gpiod flags outside an ifdef to make stub functions work again. - various minor fixes that we can accept for -rc1. * tag 'gpio-v3.17-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: gpio-lynxpoint: enable input sensing in resume gpio: move GPIOD flags outside #ifdef gpio: delete unneeded test before of_node_put gpio: zynq: Fix IRQ handlers gpiolib: devres: use correct structure type name in sizeof MAINTAINERS: Change maintainer for gpio-bcm-kona.c
| * | gpio-lynxpoint: enable input sensing in resumeMathias Nyman2014-08-211-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It appears that input sensing bit might be reset during suspend/resume. Set input sensing again for all requested gpios in resume Tested-by: Jerome Blin <jerome.blin@intel.com> Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpio: delete unneeded test before of_node_putJulia Lawall2014-08-171-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Of_node_put supports NULL as its argument, so the initial test is not necessary. Suggested by Uwe Kleine-König. The semantic patch that fixes this problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression e; @@ -if (e) of_node_put(e); // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpio: zynq: Fix IRQ handlersLars-Peter Clausen2014-08-171-8/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Zynq GPIO interrupt handling code as two main issues: 1) It does not support IRQF_ONESHOT interrupt since it uses handle_simple_irq() for the interrupt handler. handle_simple_irq() does not do masking and unmasking of the IRQ that is required for this chip to be able to support IRQF_ONESHOT IRQs, causing the CPU to lock up in a interrupt storm if such a interrupt is requested. 2) Interrupts are acked after the primary interrupt handlers for all asserted interrupts in a bank have been called. For edge triggered interrupt this is to late and may cause a interrupt to be missed. For level triggered oneshot interrupts this is to early and causes the interrupt handler to run twice per interrupt. This patch addresses the issue by updating the driver to use the correct IRQ chip handler functions that are appropriate for this kind of IRQ controller. The following diagram gives an overview of how the interrupt detection circuit works, it is not necessarily a accurate depiction of the real hardware though. INT_POL/INT_ON_ANY | | +---+ INT_STATUS `-| | | | E |-. | ,---| | \ |\ +----+ | +---+ | +---+ `----| | ,-------|S | ,*--| | GPIO_IN -* | |- | Q|- | & |-- IRQ_OUT | +---+ ,-----| | ,-|R | ,o| | `---| | / |/ | +----+ | +---+ | = |- | | | ,-| | INT_TYPE ACK INT_MASK | +---+ | INT_POL GPIO_IN is the raw signal level connected to the hardware pin. This signal is routed to a edge detector and to a level detector. The edge detector can be configured to either detect a rising or falling edge or both edges. The level detector can detect either a level high or level low event. Depending on the setting of the INT_TYPE register either the edge or level event will be propagated to the INT_STATUS register. As long as a interrupt condition is detected the INT_STATUS register will be set to 1. It can be cleared to 0 if (and only if) the interrupt condition is no longer detected and software acknowledges the interrupt by writing a 1 to the address of the INT_STATUS register. There is also the INT_MASK register which can be used to disable the propagation of the INT_STATUS signal to the upstream IRQ controller. What is important to note is that the interrupt detection logic itself can not be disabled, only the propagation of the INT_STATUS register can be delayed. This means that for level type interrupts the interrupt must only be acknowledged after the interrupt source has been cleared otherwise it will stay asserted and the interrupt handler will be run a second time. For IRQF_ONESHOT interrupts this means that the IRQ must only be acknowledged after the threaded interrupt has finished running. If a second interrupt comes in between handling the first interrupt and acknowledging it the external interrupt will be asserted, which means trying to acknowledge the first interrupt will not clear the INT_STATUS register and the interrupt handler will be run a second time when the IRQ is unmasked, so no interrupts will be lost. The handle_fasteoi_irq() handler in combination with the IRQCHIP_EOI_THREADED | IRQCHIP_EOI_IF_HANDLED flags will have the desired behavior. For edge triggered interrupts a slightly different strategy is necessary. For edge triggered interrupts the interrupt condition is only true when the edge itself is detected, this means this is the only time the INT_STATUS register is set, acknowledging the interrupt any time after that will clear the INT_STATUS register until the next interrupt happens. This means in order to not loose any interrupts the interrupt needs to be acknowledged before running the interrupt handler. If a second interrupt occurs after the first interrupt handler has finished but before the interrupt is unmasked the INT_STATUS register will be re-asserted and the interrupt handler runs a second time once the interrupt is unmasked. This means with this flow handling strategy no interrupts are lost for edge triggered interrupts. The handle_level_irq() handler will have the desired behavior. (Note: The handle_edge_irq() only needs to be used for edge triggered interrupts where the controller stops detecting the interrupt event when the interrupt is masked, for this controller the detection logic still works, while only the propagation is delayed when the interrupt is masked.) Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Acked-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpiolib: devres: use correct structure type name in sizeofJulia Lawall2014-08-171-1/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | | | Correct typo in the name of the type given to sizeof. Because it is the size of a pointer that is wanted, the typo has no impact on compilation or execution. This problem was found using Coccinelle (http://coccinelle.lip6.fr/). The semantic patch used can be found in message 0 of this patch series. Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Acked-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* | Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linuxLinus Torvalds2014-08-2441-167/+309
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull drm fixes from Dave Airlie: "Intel and radeon fixes. Post KS/LC git requests from i915 and radeon stacked up. They are all fixes along with some new pci ids for radeon, and one maintainers file entry. - i915: display fixes and irq fixes - radeon: pci ids, and misc gpuvm, dpm and hdp cache" * 'drm-fixes' of git://people.freedesktop.org/~airlied/linux: (29 commits) MAINTAINERS: Add entry for Renesas DRM drivers drm/radeon: add additional SI pci ids drm/radeon: add new bonaire pci ids drm/radeon: add new KV pci id Revert "drm/radeon: Use write-combined CPU mappings of ring buffers with PCIe" drm/radeon: fix active_cu mask on SI and CIK after re-init (v3) drm/radeon: fix active cu count for SI and CIK drm/radeon: re-enable selective GPUVM flushing drm/radeon: Sync ME and PFP after CP semaphore waits v4 drm/radeon: fix display handling in radeon_gpu_reset drm/radeon: fix pm handling in radeon_gpu_reset drm/radeon: Only flush HDP cache for indirect buffers from userspace drm/radeon: properly document reloc priority mask drm/i915: don't try to retrain a DP link on an inactive CRTC drm/i915: make sure VDD is turned off during system suspend drm/i915: cancel hotplug and dig_port work during suspend and unload drm/i915: fix HPD IRQ reenable work cancelation drm/i915: take display port power domain in DP HPD handler drm/i915: Don't try to enable cursor from setplane when crtc is disabled drm/i915: Skip load detect when intel_crtc->new_enable==true ...
| * | drm/radeon: add new KV pci idAlex Deucher2014-08-221-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | bug: https://bugs.freedesktop.org/show_bug.cgi?id=82912 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
| * | Merge tag 'drm-intel-fixes-2014-08-21' of ↵Dave Airlie2014-08-228-55/+109
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://anongit.freedesktop.org/drm-intel Display fixes from Ville and Imre, all cc: stable. * tag 'drm-intel-fixes-2014-08-21' of git://anongit.freedesktop.org/drm-intel: drm/i915: don't try to retrain a DP link on an inactive CRTC drm/i915: make sure VDD is turned off during system suspend drm/i915: cancel hotplug and dig_port work during suspend and unload drm/i915: fix HPD IRQ reenable work cancelation drm/i915: take display port power domain in DP HPD handler drm/i915: Don't try to enable cursor from setplane when crtc is disabled drm/i915: Skip load detect when intel_crtc->new_enable==true drm/i915: Fix locking for intel_enable_pipe_a()
generated by cgit v1.2.3 (git 2.25.1) at 2024-10-23 16:56:26 +0000