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* drm/msm: update generated headersRob Clark2015-06-1117-143/+1359
| | | | Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm: add missing DRIVER_ATOMIC flagRob Clark2015-06-111-0/+1
| | | | | | Somehow this got lost when msm atomic support was first merged. Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm/adreno: dump scratch regs and other info on hangRob Clark2015-06-114-3/+25
| | | | | | | | | | | | | | Dump a bit more info when the GPU hangs, without having hang_debug enabled (which dumps a *lot* of registers). Also dump the scratch registers, as they are useful for determining where in the cmdstream the GPU hung (and they seem always safe to read when GPU has hung). Note that the freedreno gallium driver emits increasing counter values to SCRATCH6 (to identify tile #) and SCRATCH7 (to identify draw #), so these two in particular can be used to "triangulate" where in the cmdstream the GPU hung. Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/virtio: remove some dead codeDan Carpenter2015-06-111-2/+0
| | | | | | | | The goto is correct, and we never reach the return statement so just delete the dead code. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/virtio: checking for NULL instead of IS_ERRDan Carpenter2015-06-111-2/+2
| | | | | | | | | virtio_gpu_alloc_object() returns an error pointer, it never returns NULL. Fixes: dc5698e80cf7 ('Add virtio gpu driver.') Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/amdgpu: fix a amdgpu_dpm=0 bugSonny Jiang2015-06-101-3/+5
| | | | | Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: don't enable/disable display twice on suspend/resumeAlex Deucher2015-06-103-54/+0
| | | | | | | | | We were doing it in the common code and in the IP specific code. Remove the IP specific code. The common code handles the ordering properly. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: fix UVD/VCE VM emulationChristian König2015-06-101-3/+15
| | | | | Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: enable vce powergatingSonny Jiang2015-06-104-14/+148
| | | | | | | | | Enable VCE dpm and powergating. VCE dpm dynamically scales the VCE clocks on demand. Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
* drm/amdgpu/iceland: don't call smu_init on resumeAlex Deucher2015-06-101-6/+19
| | | | | | | | | | | | smu_init allocates buffers and initializes them. It does not touch the hw. There is no need to do it again on resume. It should really be part of sw_init (and smu_fini should be part of sw_fini), but we need the firmware sizes from the other IPs for firmware loading so we have to wait until sw init is done for all other IPs. Reviewed-by: Sonny Jiang <Sonny.Jiang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/tonga: don't call smu_init on resumeAlex Deucher2015-06-101-6/+19
| | | | | | | | | | | | smu_init allocates buffers and initializes them. It does not touch the hw. There is no need to do it again on resume. It should really be part of sw_init (and smu_fini should be part of sw_fini), but we need the firmware sizes from the other IPs for firmware loading so we have to wait until sw init is done for all other IPs. Reviewed-by: Sonny Jiang <Sonny.Jiang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/cz: don't call smu_init on resumeAlex Deucher2015-06-101-7/+8
| | | | | | | | | | | | smu_init allocates buffers and initializes them. It does not touch the hw. There is no need to do it again on resume. It should really be part of sw_init (and smu_fini should be part of sw_fini), but we need the firmware sizes from the other IPs for firmware loading so we have to wait until sw init is done for all other IPs. Reviewed-by: Sonny Jiang <Sonny.Jiang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: update to latest gfx8 golden register settingsAlex Deucher2015-06-101-0/+7
| | | | | Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: whitespace cleanup in gmc8 golden regsAlex Deucher2015-06-101-1/+1
| | | | | Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/admgpu: move XDMA golden registers to dce codeAlex Deucher2015-06-103-4/+18
| | | | | | | Already moved other display registers. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: fix the build on big endianAlex Deucher2015-06-102-3/+5
| | | | | | | | | Some leftover copy and pastes from radeon that never got updated. Reviewed-by: Christian König <christian.koenig@amd.com> Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: remove the VI hardware semaphore in ring syncDavid Zhang2015-06-101-5/+4
| | | | | | Signed-off-by: David Zhang <david1.zhang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
* drm/amdgpu: set the gfx config properly for all CZ variants (v2)Alex Deucher2015-06-081-2/+36
| | | | | | | | | | Need to adjust the number of CUs and RBs. v2: get proper values Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: also print the pci revision when printing the pci idsAlex Deucher2015-06-081-3/+3
| | | | | | | | | The driver makes use of this information so print if to aid in debugging. Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: cleanup VA IOCTLChristian König2015-06-081-43/+21
| | | | | | | Remove the unnecessary returned status and make the IOCTL write only. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: fix saddr handling in amdgpu_vm_bo_unmapChristian König2015-06-081-0/+2
| | | | | Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: fix amdgpu_vm_bo_mapChristian König2015-06-081-0/+2
| | | | | | | | We need to reset the bo_va address, otherwise new mappings wouldn't be updated in the page table. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: disable user fence interrupt (v2)Chunming Zhou2015-06-0513-26/+46
| | | | | | | | | | amdgpu submits both kernel and user fences, but just need one interrupt, disable user fence interrupt and don't effect user fence. v2: fix merge error Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: fix user ptr race conditionChristian König2015-06-052-1/+1
| | | | | Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: monk liu <monk.liu@amd.com>
* drm/amdgpu: add zero timeout check in amdgpu_fence_wait_seq_timeoutJack Xiao2015-06-051-0/+4
| | | | | Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
* Merge branch 'drm-next-4.2-amdgpu' of ↵Dave Airlie2015-06-05232-0/+424168
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://people.freedesktop.org/~agd5f/linux into drm-next This is the big pull request for amdgpu, the new driver for VI+ AMD asics. I currently supports Tonga, Iceland, and Carrizo and also contains a Kconfig option to build support for CI parts for testing. All major functionality is supported (displays, gfx, compute, dma, video decode/encode, etc.). Power management is working on Carrizo, but is still being worked on for Tonga and Iceland. * 'drm-next-4.2-amdgpu' of git://people.freedesktop.org/~agd5f/linux: (106 commits) drm/amdgpu: only support IBs in the buffer list (v2) drm/amdgpu: add vram_type and vram_bit_width for interface query (v2) drm/amdgpu: add ib_size/start_alignment interface query drm/amdgpu: add me/ce/pfp_feature_version interface query drm/amdgpu add ce_ram_size for interface query drm/amdgpu add max_memory_clock for interface query (v2) drm/amdgpu: add hdp flush for gfx8 compute ring drm/amdgpu: fix no hdp flush for compute ring drm/amdgpu: add HEVC/H.265 UVD support drm/amdgpu: stop loading firmware with pm.mutex locked drm/amdgpu: remove mclk_lock drm/amdgpu: fix description of vm_size module parameter (v2) drm/amdgpu: remove all sh mem register modification in vm flush drm/amdgpu: rename GEM_OP_SET_INITIAL_DOMAIN -> GEM_OP_SET_PLACEMENT drm/amdgpu: fence should be added to shared slot drm/amdgpu: sync fence of clear_invalids (v2) drm/amdgpu: max_pde_used usage should be under protect drm/amdgpu: fix bug of vm_bo_map (v2) drm/amdgpu: implement the allocation range (v3) drm/amdgpu: rename amdgpu_ip_funcs to amd_ip_funcs (v2) ...
| * drm/amdgpu: only support IBs in the buffer list (v2)Marek Olšák2015-06-032-72/+24
| | | | | | | | | | | | | | | | | | | | amdgpu_cs_find_mapping doesn't work without all buffers being validated, so the TTM validation must be done first. v2: only use amdgpu_cs_find_mapping for UVD/VCE VM emulation Signed-off-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
| * drm/amdgpu: add vram_type and vram_bit_width for interface query (v2)Ken Wang2015-06-037-27/+76
| | | | | | | | | | | | | | | | | | | | | | Track the type of vram on the board and provide a query for it. User mode drivers and tools want this information for determining bandwidth information and form informational purposes. v2: fix build when CI support is not enabled Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
| * drm/amdgpu: add ib_size/start_alignment interface queryKen Wang2015-06-031-0/+14
| | | | | | | | | | | | | | | | Query the IB alignment requirements from the kernel rather than hardcoding them in the user mode drivers. Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
| * drm/amdgpu: add me/ce/pfp_feature_version interface queryKen Wang2015-06-034-3/+12
| | | | | | | | | | | | | | | | Provide this information to usermode drivers. We were previously missing this info. Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
| * drm/amdgpu add ce_ram_size for interface queryKen Wang2015-06-034-0/+7
| | | | | | | | | | | | | | | | | | Add a query for the CE ram size. User mode drivers will want to use this to determine how much size of the cache on the CE. Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewd-by: Jammy Zhou <Jammy.Zhou@amd.com>
| * drm/amdgpu add max_memory_clock for interface query (v2)Ken Wang2015-06-031-2/+6
| | | | | | | | | | | | | | | | | | Add a query for the max memory clock. v2: handle the dpm enabled case properly Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewd-by: Jammy Zhou <Jammy.Zhou@amd.com>
| * drm/amdgpu: add hdp flush for gfx8 compute ringmonk.liu2015-06-031-0/+1
| | | | | | | | | | | | | | | | We had forgotten to register the callback. Signed-off-by: monk.liu <monk.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: jammy zhou <jammy.zhou@amd.com>
| * drm/amdgpu: fix no hdp flush for compute ringmonk.liu2015-06-031-1/+3
| | | | | | | | | | | | | | No pfp on compute. Signed-off-by: monk.liu <monk.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
| * drm/amdgpu: add HEVC/H.265 UVD supportChristian König2015-06-031-0/+8
| | | | | | | | | | Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: stop loading firmware with pm.mutex lockedChristian König2015-06-031-4/+4
| | | | | | | | | | | | | | | | | | | | Loading firmware is a rather complicated process, in the end we add a dependency between the pm mutex and the mm semaphore which results in a harmless but annoying error message. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
| * drm/amdgpu: remove mclk_lockChristian König2015-06-035-43/+4
| | | | | | | | | | | | | | Not needed any more. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: fix description of vm_size module parameter (v2)Alex Deucher2015-06-032-4/+4
| | | | | | | | | | | | | | | | default is 8GB, not 4GB. v2: fix fallback setting when the user provides an invalid input Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: remove all sh mem register modification in vm flushmonk.liu2015-06-035-160/+0
| | | | | | | | | | | | | | | | | | | | Leave that at the values set during init. No need to update them repeatedly. Signed-off-by: monk.liu <monk.liu@amd.com> Signed-off-by: David Zhang <david1.zhang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <jammy.zhou@amd.com>
| * drm/amdgpu: rename GEM_OP_SET_INITIAL_DOMAIN -> GEM_OP_SET_PLACEMENTMarek Olšák2015-06-031-1/+1
| | | | | | | | | | | | Signed-off-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: fence should be added to shared slotmonk.liu2015-06-031-2/+2
| | | | | | | | | | | | Signed-off-by: monk.liu <monk.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: jammy zhou <jammy.zhou@amd.com>
| * drm/amdgpu: sync fence of clear_invalids (v2)monk.liu2015-06-033-4/+6
| | | | | | | | | | | | | | | | bo_va may un-initialized, fix it. Signed-off-by: monk.liu <monk.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <jammy.zhou@amd.com>
| * drm/amdgpu: max_pde_used usage should be under protectmonk.liu2015-06-031-1/+5
| | | | | | | | | | | | | | | | Need to take the lock when accessing this. Signed-off-by: monk.liu <monk.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <jammy.zhou@amd.com>
| * drm/amdgpu: fix bug of vm_bo_map (v2)monk.liu2015-06-031-0/+4
| | | | | | | | | | | | | | | | call reservation_object_reserve_shared before amdgpu_bo_fence Signed-off-by: monk.liu <monk.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <jammy.zhou@amd.com>
| * drm/amdgpu: implement the allocation range (v3)Chunming Zhou2015-06-038-64/+136
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Pass a ttm_placement pointer to amdgpu_bo_create_restricted add min_offset to amdgpu_bo_pin_restricted. This makes it easier to allocate memory with address restrictions. With this patch we can also enable 2-ended allocation again. v2: fix rebase conflicts v3: memset placements before using Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: rename amdgpu_ip_funcs to amd_ip_funcs (v2)yanyang12015-06-0355-707/+1067
| | | | | | | | | | | | | | | | | | | | | | | | The structure is renamed and moved to amd_shared.h to make the component independent. This makes it easier to add new components in the future. v2: fix include path Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: yanyang1 <young.yang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: drop AMDGPU_FENCE_SIGNALED_SEQChristian König2015-06-032-15/+0
| | | | | | | | | | | | | | | | | | | | | | It's causing issues with VMID handling and comparing the fence value two times actually doesn't make handling faster. Port of radeon commit "d6d5c5b8364bcc4d52cddc68bcb0a330d2af20f3". Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com>
| * drm/amdgpu: port fault_reserve_notify changes from radeonChristian König2015-06-031-20/+35
| | | | | | | | | | Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: enable uvd dpm and powergatingSonny Jiang2015-06-033-3/+91
| | | | | | | | | | | | | | | | | | Enable UVD dpm (dynamic power management) and powergating. UVD dpm dynamically scales the UVD clocks on demand. Powergating turns off the power to the block when it's not in use. Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: implement VCE two instances supportLeo Liu2015-06-031-54/+87
| | | | | | | | | | | | | | | | | | | | | | | | | | | | VCE 3.0 has two indentical instances in the engine, they share the same registers name in differrent memory block distinguished by the grbm_gfx_index, we set to master instance after init, it will dispatch task to slave instance. These two instances will share the same firmware, but have their own stacks and heaps. v2: add mutex for using grbm_gfx_index Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-10-04 01:34:06 +0000