summaryrefslogtreecommitdiffstats
path: root/drivers
Commit message (Collapse)AuthorAgeFilesLines
* Merge tag 'leds_for_4.17-rc1' of ↵Linus Torvalds2018-04-037-16/+339
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/j.anaszewski/linux-leds Pull LED updates from Jacek Anaszewski: "New LED class driver: - add driver for Mellanox regmap LEDs Improvement to ledtrig-disk: - extend disk trigger for reads and writes Improvements and fixes to existing LED class drivers: - add more product/board names for PC Engines APU2 - fix wrong dmi_match on PC Engines APU LEDs - clarify chips supported by LM355x driver - fix Kconfig text for MLXCPLD, SYSCON, MC13783, NETXBIG - allow leds-mlxcpld compilation for 32 bit arch" * tag 'leds_for_4.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/j.anaszewski/linux-leds: leds: Fix wrong dmi_match on PC Engines APU LEDs leds: Extends disk trigger for reads and writes leds: Add more product/board names for PC Engines APU2 leds: add driver for support Mellanox regmap LEDs for BMC and x86 platform leds: fix Kconfig text for MLXCPLD, SYSCON, MC13783, NETXBIG leds: Clarify supported chips by LM355x driver leds: leds-mlxcpld: Allow compilation for 32 bit arch
| * leds: Fix wrong dmi_match on PC Engines APU LEDsHans Ulli Kroll2018-03-201-1/+1
| | | | | | | | | | | | | | | | BIOS on APU board doesn't expose board_name property, and thus we have to rely on the product_name instead. Signed-off-by: Hans Ulli Kroll <ulli.kroll@googlemail.com> Signed-off-by: Jacek Anaszewski <jacek.anaszewski@gmail.com>
| * leds: Extends disk trigger for reads and writesLinus Walleij2018-03-113-3/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds two new disk triggers for triggering on reads and writes respectively, named "disk-read" and "disk-write". The use case comes from working on the D-Link DNS-313 NAS box. This features an RGB LED for disk activity. with these two triggers I can couple the green LED to read activity and the red LED to write activity, which gives the appropriate user feedback about what is happening on the disk. When tested it gave exactly the feedback desired. The in-kernel interface is simply changed to pass a bool indicating if the activity is write activity and update each trigger (and the composite "disk-activity" trigger) depending on what is passed in. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Acked-by: Pavel Machek <pavel@ucw.cz> Acked-by: Tejun Heo <tj@kernel.org> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Jacek Anaszewski <jacek.anaszewski@gmail.com>
| * leds: Add more product/board names for PC Engines APU2Timothy Redaelli2018-02-191-2/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PC Engines "legacy" coreboot 4.0.8 changed the product/board name from "APU2" to "apu2". PC Engines "mainline" coreboot uses, instead, "PC Engines apu2" as product/board name. This commit adds the 2 variants ("apu2" and "PC Engines apu2") of product/board name to be compatible with all the APU2 BIOSes. Fixes: 3faee9423ce0 ("leds: Add driver for PC Engines APU/APU2 LEDs") Signed-off-by: Timothy Redaelli <tredaelli@redhat.com> Acked-by: Pavel Machek <pavel@ucw.cz> Signed-off-by: Jacek Anaszewski <jacek.anaszewski@gmail.com>
| * leds: add driver for support Mellanox regmap LEDs for BMC and x86 platformVadim Pasternak2018-02-193-0/+291
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Driver obtains LED devices according to system configuration and creates devices in form: "devicename:color:function", like The full path is to be: /sys/class/leds/mlxreg\:status\:amber/brightness After timer trigger activation: echo timer > /sys/class/leds/mlxreg\:status\:amber/trigger Attributes for LED blinking will appaer in sysfs infrastructure: /sys/class/leds/mlxreg\:status\:amber/delay_off /sys/class/leds/mlxreg\:status\:amber/delay_on LED setting is controlled through the on-board programmable devices, which exports its register map. This device could be attached to any bus type, for which register mapping is supported. Signed-off-by: Vadim Pasternak <vadimp@mellanox.com> Acked-by: Pavel Machek <pavel@ucw.cz> Signed-off-by: Jacek Anaszewski <jacek.anaszewski@gmail.com>
| * leds: fix Kconfig text for MLXCPLD, SYSCON, MC13783, NETXBIGVadim Pasternak2018-02-151-5/+5
| | | | | | | | | | | | | | | | It fixes grammatical errors in Kconfig file for LEDS_SYSCON, LEDS_MLXCPLD, LEDS_MC13783, LEDS_NETXBIG. Signed-off-by: Vadim Pasternak <vadimp@mellanox.com> Signed-off-by: Jacek Anaszewski <jacek.anaszewski@gmail.com>
| * leds: Clarify supported chips by LM355x driverPavel Machek2018-02-121-4/+4
| | | | | | | | | | | | | | | | Clarify which controllers are supported by which driver. Reported-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Pavel Machek <pavel@ucw.cz> Signed-off-by: Jacek Anaszewski <jacek.anaszewski@gmail.com>
| * leds: leds-mlxcpld: Allow compilation for 32 bit archVadim Pasternak2018-02-121-1/+1
| | | | | | | | | | | | | | | | It makes leds-mlxcpld available for 32 bit architecture. Signed-off-by: Vadim Pasternak <vadimp@mellanox.com> Reported-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: Jacek Anaszewski <jacek.anaszewski@gmail.com>
* | Merge tag 'for-linus-4.17' of git://github.com/cminyard/linux-ipmiLinus Torvalds2018-04-0327-593/+1067
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull IPMI updates from Corey Minyard: "Mostly small changes, as usual. This does add an IPMI BMC server-side driver, to allow a Linux system to act as an IPMI controller. That's the biggest change, but it is just a new driver that is fairly narrow in use. The other largish change is removing ACPI SPMI probe support, which should have never really been there in the beginning" * tag 'for-linus-4.17' of git://github.com/cminyard/linux-ipmi: ipmi/parisc: Add IPMI chassis poweroff for certain HP PA-RISC and IA-64 servers ipmi_ssif: Fix kernel panic at msg_done_handler ipmi:pci: Blacklist a Realtek "IPMI" device ipmi: Remove ACPI SPMI probing from the system interface driver ipmi: Remove ACPI SPMI probing from the SSIF (I2C) driver ipmi: missing error code in try_smi_init() ipmi: use ARRAY_SIZE for poweroff_functions array sizing calculation ipmi: Consolidate cleanup code ipmi: Remove some unnecessary initializations ipmi: Fix some error cleanup issues ipmi: Add or fix SPDX-License-Identifier in all files ipmi: Re-use existing macros for built-in properties ipmi:pci: Make the PCI defines consistent with normal Linux ones ipmi: kcs_bmc: coding-style fixes and use new poll type char/ipmi: add documentation for sysfs interface ipmi: kcs_bmc: mark expected switch fall-through in kcs_bmc_handle_data ipmi: add an Aspeed KCS IPMI BMC driver ipmi: add a KCS IPMI BMC driver
| * | ipmi/parisc: Add IPMI chassis poweroff for certain HP PA-RISC and IA-64 serversHelge Deller2018-03-271-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch allows HP PA-RISC servers like rp3410/rp3440 and the HP C8000 workstation with an IPMI controller that predate IPMI 1.5 to use the standard poweroff or powercycle commands. These systems firmware don't set the chassis capability bit in the Get Device ID, but they do implement the standard poweroff and powercycle commands. Signed-off-by: Helge Deller <deller@gmx.de> Signed-off-by: Corey Minyard <cminyard@mvista.com>
| * | ipmi_ssif: Fix kernel panic at msg_done_handlerKamlakant Patel2018-03-131-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This happens when BMC doesn't return any data and the code is trying to print the value of data[2]. Getting following crash: [ 484.728410] Unable to handle kernel NULL pointer dereference at virtual address 00000002 [ 484.736496] pgd = ffff0000094a2000 [ 484.739885] [00000002] *pgd=00000047fcffe003, *pud=00000047fcffd003, *pmd=0000000000000000 [ 484.748158] Internal error: Oops: 96000005 [#1] SMP [...] [ 485.101451] Call trace: [...] [ 485.188473] [<ffff000000a46e68>] msg_done_handler+0x668/0x700 [ipmi_ssif] [ 485.195249] [<ffff000000a456b8>] ipmi_ssif_thread+0x110/0x128 [ipmi_ssif] [ 485.202038] [<ffff0000080f1430>] kthread+0x108/0x138 [ 485.206994] [<ffff0000080838e0>] ret_from_fork+0x10/0x30 [ 485.212294] Code: aa1903e1 aa1803e0 b900227f 95fef6a5 (39400aa3) Adding a check to validate the data len before printing data[2] to fix this issue. Signed-off-by: Kamlakant Patel <kamlakant.patel@cavium.com> Signed-off-by: Corey Minyard <cminyard@mvista.com>
| * | ipmi:pci: Blacklist a Realtek "IPMI" deviceCorey Minyard2018-03-131-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | Realtek has some sort of "Virtual" IPMI device on the PCI bus as a KCS controller, but whatever it is, it's not one. Ignore it if seen. Reported-by: Chris Chiu <chiu@endlessm.com> Signed-off-by: Corey Minyard <cminyard@mvista.com> Tested-by: Daniel Drake <drake@endlessm.com>
| * | ipmi: Remove ACPI SPMI probing from the system interface driverCorey Minyard2018-03-121-154/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The IPMI spec states: The purpose of the SPMI Table is to provide a mechanism that can be used by the OSPM (an ACPI term for “OS Operating System-directed configuration and Power Management” essentially meaning an ACPI-aware OS or OS loader) very early in the boot process, e.g., before the ability to execute ACPI control methods in the OS is available. When we are probing IPMI in Linux, ACPI control methods are available, so we shouldn't be probing using SPMI. It could cause some confusion during the probing process. Signed-off-by: Corey Minyard <cminyard@mvista.com>
| * | ipmi: Remove ACPI SPMI probing from the SSIF (I2C) driverCorey Minyard2018-03-121-105/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The IPMI spec states: The purpose of the SPMI Table is to provide a mechanism that can be used by the OSPM (an ACPI term for “OS Operating System-directed configuration and Power Management” essentially meaning an ACPI-aware OS or OS loader) very early in the boot process, e.g., before the ability to execute ACPI control methods in the OS is available. When we are probing IPMI in Linux, ACPI control methods are available, so we shouldn't be probing using SPMI. It could cause some confusion during the probing process. Signed-off-by: Corey Minyard <cminyard@mvista.com> Tested-by: Jiandi An <anjiandi@codeaurora.org>
| * | ipmi: missing error code in try_smi_init()Dan Carpenter2018-03-061-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | If platform_device_alloc() then we should return -ENOMEM instead of returning success. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Corey Minyard <cminyard@mvista.com>
| * | ipmi: use ARRAY_SIZE for poweroff_functions array sizing calculationColin Ian King2018-03-061-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | Use the ARRAY_SIZE macro on a array poweroff_functions to determine size of the array. Improvement suggested by Coccinelle. Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Corey Minyard <cminyard@mvista.com>
| * | ipmi: Consolidate cleanup codeCorey Minyard2018-03-061-94/+70
| | | | | | | | | | | | | | | | | | | | | The cleanup code for an init failure and for a device removal were quite similar, consolidate all that into one function. Signed-off-by: Corey Minyard <cminyard@mvista.com>
| * | ipmi: Remove some unnecessary initializationsCorey Minyard2018-03-061-5/+0
| | | | | | | | | | | | | | | | | | The data is allocated with kzalloc, no need to set things to NULL. Signed-off-by: Corey Minyard <cminyard@mvista.com>
| * | ipmi: Fix some error cleanup issuesCorey Minyard2018-03-061-4/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | device_remove_group() was called on any cleanup, even if the device attrs had not been added yet. That can occur in certain error scenarios, so add a flag to know if it has been added. Also make sure we remove the dev if we added it ourselves. Signed-off-by: Corey Minyard <cminyard@mvista.com> Cc: stable@vger.kernel.org # 4.15 Cc: Laura Abbott <labbott@redhat.com> Tested-by: Bill Perkins <wmp@grnwood.net>
| * | ipmi: Add or fix SPDX-License-Identifier in all filesCorey Minyard2018-02-2722-206/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | And get rid of the license text that is no longer necessary. Signed-off-by: Corey Minyard <cminyard@mvista.com> Cc: Kees Cook <keescook@chromium.org> Cc: Alistair Popple <alistair@popple.id.au> Cc: Jeremy Kerr <jk@ozlabs.org> Cc: Joel Stanley <joel@jms.id.au> Cc: Rocky Craig <rocky.craig@hp.com>
| * | ipmi: Re-use existing macros for built-in propertiesAndy Shevchenko2018-02-261-13/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | Replace home grown set_prop_entry() macro by generic PROPERTY_ENTRY_INTEGER()-like ones. Cc: Corey Minyard <cminyard@mvista.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Corey Minyard <cminyard@mvista.com>
| * | ipmi:pci: Make the PCI defines consistent with normal Linux onesCorey Minyard2018-02-261-17/+14
| | | | | | | | | | | | Signed-off-by: Corey Minyard <cminyard@mvista.com>
| * | ipmi: kcs_bmc: coding-style fixes and use new poll typeHaiyue Wang2018-02-263-36/+41
| | | | | | | | | | | | | | | | | | | | | | | | Many for coding-style fixes, and update the poll API with the new type '__poll_t', this is new commit from linux-4.16-rc1. Signed-off-by: Haiyue Wang <haiyue.wang@linux.intel.com> Signed-off-by: Corey Minyard <cminyard@mvista.com>
| * | ipmi: kcs_bmc: mark expected switch fall-through in kcs_bmc_handle_dataGustavo A. R. Silva2018-02-261-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In preparation to enabling -Wimplicit-fallthrough, mark switch cases where we are expecting to fall through. Addresses-Coverity-ID: 1465255 ("Missing break in switch") Signed-off-by: Gustavo A. R. Silva <garsilva@embeddedor.com> Cc: Haiyue Wang <haiyue.wang@linux.intel.com> Signed-off-by: Corey Minyard <cminyard@mvista.com>
| * | ipmi: add an Aspeed KCS IPMI BMC driverHaiyue Wang2018-02-263-0/+332
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The KCS (Keyboard Controller Style) interface is used to perform in-band IPMI communication between a server host and its BMC (BaseBoard Management Controllers). This driver exposes the KCS interface on ASpeed SOCs (AST2400 and AST2500) as a character device. Such SOCs are commonly used as BMCs and this driver implements the BMC side of the KCS interface. Signed-off-by: Haiyue Wang <haiyue.wang@linux.intel.com> Signed-off-by: Corey Minyard <cminyard@mvista.com>
| * | ipmi: add a KCS IPMI BMC driverHaiyue Wang2018-02-264-0/+574
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Provides a device driver for the KCS (Keyboard Controller Style) IPMI interface which meets the requirement of the BMC (Baseboard Management Controllers) side for handling the IPMI request from host system software. Signed-off-by: Haiyue Wang <haiyue.wang@linux.intel.com> [Removed the selectability of IPMI_KCS_BMC, as it doesn't do much good to have it by itself.] Signed-off-by: Corey Minyard <cminyard@mvista.com>
* | | Merge tag 'pinctrl-v4.17-1' of ↵Linus Torvalds2018-04-0370-7246/+13148
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control bulk updates from Linus Walleij: "New drivers: - Qualcomm SDM845: this is their new flagship SoC platform which seems to be targeted at premium mobile handsets. - Renesas R-Car M3-N SoC. - Renesas R8A77980 SoC. - NXP (ex Freescale) i.MX 6SLL SoC. - Mediatek MT2712 SoC. - Allwinner H6 SoC. Improvements: - Uniphier adds a few new functions and pins. - Renesas refactorings and additional pin definitions. - Improved pin groups for Axis Artpec6. Cleanup: - Drop the TZ1090 drivers. This platform is no longer maintained and is being deleted. - Drop ST-Ericsson U8540/U9540 support as this was never productified. - Overall minor fixes and janitorial" * tag 'pinctrl-v4.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (82 commits) pinctrl: uniphier: add UART hardware flow control pin-mux settings pinctrl: sunxi: add support for the Allwinner H6 main pin controller pinctrl: sunxi: change irq_bank_base to irq_bank_map pinctrl: sunxi: introduce IRQ bank conversion function pinctrl: sunxi: refactor irq related register function to have desc pinctrl: msm8998: Remove owner assignment from platform_driver pinctrl: uniphier: divide I2S and S/PDIF audio out pin-mux group pinctrl: uniphier: add PXs2 Audio in/out pin-mux settings pinctrl/amd: poll InterruptEnable bits in enable_irq pinctrl: ocelot: fix gpio direction pinctrl: mtk: fix check warnings. pintcrl: mtk: support bias-disable of generic and special pins simultaneously pinctrl: add mt2712 pinctrl driver pinctrl: pinctrl-single: Fix pcs_request_gpio() when bits_per_mux != 0 pinctrl: imx: Add pinctrl driver support for imx6sll dt-bindings: imx: update pinctrl doc for imx6sll pinctrl: intel: Implement intel_gpio_get_direction callback pinctrl: stm32: add 'depends on HAS_IOMEM' to fix unmet dependency pinctrl: mediatek: mtk-common: use true and false for boolean values pinctrl: sunxi: always look for apb block ...
| * | | pinctrl: uniphier: add UART hardware flow control pin-mux settingsKunihiko Hayashi2018-03-279-9/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | UniPhier SoCs have the following pins for hardware flow control of UART: XRTS, XCTS and for modem control of UART: XDTR, XDSR, XDCD, XRI The port number with the flow control is SoC-dependent. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: sunxi: add support for the Allwinner H6 main pin controllerIcenowy Zheng2018-03-273-0/+619
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Allwinner H6 SoC has two pin controllers, one main controller (called CPUX-PORT in user manual) and one controller in CPUs power domain (called CPUS-PORT in user manual). This commit introduces support for the main pin controller on H6. The pin bank A and B are not wired out and hidden from the SoC's documents, however it's shown that the "ATE" (an AC200 chip co-packaged with the H6 die) is connected to the main SoC die via these pin banks. The information about these banks is just copied from the BSP pinctrl driver, but re-formatted to fit the mainline pinctrl driver format. The GPIO functions are dropped, as they're impossible to use -- except a GPIO&IRQ only pin (PB20) which might be the IRQ of ATE. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: sunxi: change irq_bank_base to irq_bank_mapIcenowy Zheng2018-03-273-4/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Allwinner H6 SoC have its pin controllers with the first IRQ-capable GPIO bank at IRQ bank 1 and the second bank at IRQ bank 5. Change the current code that uses IRQ bank base to a IRQ bank map, in order to support the case that holes exist among IRQ banks. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: sunxi: introduce IRQ bank conversion functionIcenowy Zheng2018-03-271-11/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Allwinner H6 SoC have its pin controllers with the first IRQ-capable GPIO bank at IRQ bank 1 and the second bank at IRQ bank 5. Some refactors in the sunxi pinctrl framework are needed. This commit introduces a IRQ bank conversion function, which replaces the "(bank_base + bank)" code in IRQ register access. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: sunxi: refactor irq related register function to have descIcenowy Zheng2018-03-272-20/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As the new H6 SoC has holes in the IRQ registers, refactor the IRQ related register function for getting the full pinctrl desc structure. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: msm8998: Remove owner assignment from platform_driverFabio Estevam2018-03-271-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | platform_driver does not need to set the owner field, as this will be populated by the driver core. Generated by scripts/coccinelle/api/platform_no_drv_owner.cocci. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: uniphier: divide I2S and S/PDIF audio out pin-mux groupKatsuhiro Suzuki2018-03-272-10/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch divides large pin-mux group 'aio' of UniPhier LD11/LD20 to 2 groups as following: aout1 : 8ch I2S output: AO1DACCK, AO1BCK, AO1LRCK, AO1D[0-2] aoutiec1: S/PDIF output : AO1IEC, AO1ARC Signed-off-by: Katsuhiro Suzuki <suzuki.katsuhiro@socionext.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: uniphier: add PXs2 Audio in/out pin-mux settingsKatsuhiro Suzuki2018-03-271-0/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The UniPhier PXs2 SoC audio core use following 25 pins: ain1 : 2ch I2S input : AI1ADCCK, AI1BCK, AI1D0, AI1LRCK ain2 : 8ch I2S input : AI2ADCCK, AI2BCK, AI2D[0-3], AI2LRCK ainiec1 : S/PDIF input : XIRQ17 (for AO1IEC) aout2 : 8ch I2S output: AO2BCK, AO2D0, AO2DACCK, AO2LRCK PORT226, 227, 230 (for AO2D[1-3]) aout3 : 2ch I2S output: AO3BCK, AO3DMIX, AO3DACCK, AO3LRCK aoutiec1: S/PDIF output : PORT132(for AO1IEC) aoutiec2: S/PDIF output : AO2IEC Signed-off-by: Katsuhiro Suzuki <suzuki.katsuhiro@socionext.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl/amd: poll InterruptEnable bits in enable_irqDaniel Kurtz2018-03-261-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In certain cases interrupt enablement will be delayed relative to when the InterruptEnable bits are written. One example of this is when a GPIO's "debounce" logice is first enabled. After enabling debounce, there is a 900 us "warm up" period during which InterruptEnable[0] (bit 11) will read as 0 despite being written 1. During this time InterruptSts will not be updated, nor will interrupts be delivered, even if the GPIO's interrupt configuration has been written to the register. To work around this delay, poll the InterruptEnable bits after setting them to ensure interrupts have truly been enabled in hardware before returning from the irq_enable handler. Signed-off-by: Daniel Kurtz <djkurtz@chromium.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: ocelot: fix gpio directionAlexandre Belloni2018-03-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Bits have to be cleared in DEVCPU_GCB:GPIO:GPIO_OE for input and set for output. ocelot_gpio_set_direction() got it wrong and this went unnoticed when the driver was reworked. Reported-by: Gregory Clement <gregory.clement@bootlin.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: mtk: fix check warnings.Zhiyong Tao2018-03-265-1604/+802
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes check warnings. Signed-off-by: Zhiyong Tao <zhiyong.tao@mediatek.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pintcrl: mtk: support bias-disable of generic and special pins simultaneouslyZhiyong Tao2018-03-261-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For generic pins, parameter "arg" is 0 or 1. For special pins, bias-disable is set by R0R1, so we need transmited "00" to set bias-disable When we set "bias-disable" as high-z property, the parameter should be "MTK_PUPD_SET_R1R0_00". Signed-off-by: Zhiyong Tao <zhiyong.tao@mediatek.com> Reviewed-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: add mt2712 pinctrl driverZhiyong Tao2018-03-264-0/+2398
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The commit includes mt2712 pinctrl driver. Signed-off-by: Zhiyong Tao <zhiyong.tao@mediatek.com> Reviewed-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: pinctrl-single: Fix pcs_request_gpio() when bits_per_mux != 0David Lechner2018-03-261-3/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes pcs_request_gpio() in the pinctrl-single driver when bits_per_mux != 0. It appears this was overlooked when the multiple pins per register feature was added. Fixes: 4e7e8017a80e ("pinctrl: pinctrl-single: enhance to configure multiple pins of different modules") Signed-off-by: David Lechner <david@lechnology.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: imx: Add pinctrl driver support for imx6sllBai Ping2018-03-233-0/+368
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add pinctrl driver support for imx6sll. Signed-off-by: Bai Ping <ping.bai@nxp.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Acked-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: intel: Implement intel_gpio_get_direction callbackJavier Arteaga2018-03-231-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allows querying GPIO direction from the pad config register. If the pad is not in GPIO mode, return an error. Signed-off-by: Javier Arteaga <javier@emutex.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: stm32: add 'depends on HAS_IOMEM' to fix unmet dependencyMasahiro Yamada2018-03-231-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These configs select MFD_SYSCON, but do not depend on HAS_IOMEM. Compile testing on architecture without HAS_IOMEM causes "unmet direct dependencies" in Kconfig phase. Detected by "make ARCH=score allyesconfig". Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: mediatek: mtk-common: use true and false for boolean valuesGustavo A. R. Silva2018-03-231-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Assign true or false to boolean variables instead of an integer value. This issue was detected with the help of Coccinelle. Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: sunxi: always look for apb blockAndre Przywara2018-03-231-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Allwinner pinctrl device tree binding suggests that a clock named "apb" would drive the pin controller IP. However (for legacy reasons) we rely on this clock actually being the first clock defined. Since named clocks can be in any order, let's explicitly check for a clock called "apb" if there is more than one clock referenced. Kudo to Maxime for suggesting this much more elegant approach. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: nomadik: Drop U8540/9540 supportLinus Walleij2018-03-237-2376/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The U8540 was an evolved version of the U8500, but it was never mass produced or put into products, only reference designs exist. The upstream support was never completed and it is unlikely that this will happen so drop the support for now to simplify maintenance of the U8500. Cc: Loic Pallardy <loic.pallardy@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | Merge tag 'sh-pfc-for-v4.17-tag2' of ↵Linus Walleij2018-03-2312-635/+3198
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: sh-pfc: Updates for v4.17 (take two) - Add USB pin groups on R-Car M3-N, - Add support for the new R-Car V3H SoC, - Add EtherAVB pin groups on R-Car V3M, - Miscellaneous fixes and cleanups.
| | * | | pinctrl: sh-pfc: r8a77995: Deduplicate VIN4 pin definitionsUlrich Hecht2018-03-211-118/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use union vin_data and VIN_DATA_PIN_GROUP() to reduce redundancies in pin definitions. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| | * | | pinctrl: sh-pfc: r8a7796: Deduplicate VIN4 pin definitionsUlrich Hecht2018-03-211-236/+72
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use union vin_data and VIN_DATA_PIN_GROUP() to reduce redundancies in pin definitions. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
generated by cgit v1.2.3 (git 2.25.1) at 2024-09-04 10:57:26 +0000