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* Merge tag 'mhi-for-v6.3' of ↵Greg Kroah-Hartman2023-02-034-60/+73
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/mani/mhi into char-misc-next Manivannan writes: MHI Host ======== - Fixed the module description MHI Endpoint ============ - Powered down the MHI EP stack completely during MHI RESET instead of just doing transfer abort as the MMIO register access will be prohibited afterwards. EP stack will also be powered on again in case the RESET happened due to SYS_ERR. - Added a sanity check before processing the command ring to make sure that the channel is supported by the controller. - Added a check to make sure the xfer_cb is available for the channel before trying to send the error status to the client drivers. This helps in avoiding a potential null pointer dereference. - Fixed the debug log of RESET command - Modified the channel ring handler lock to protect the whole handler instead of locking it partially. This helps in avoiding a race that may happen if a channel STOP/RESET command is issued by the host parallely. - Saved the MHI state locally during suspend and resume. Otherwise, the MHI EP stack will not be aware of a channel that got disabled and may try to access it later. - Changed the MHI state_lock to mutex instead of spinlock. This helps in avoiding the sleeping in atomic bug reported by Dan Carpenter and also allows the lock to be held throughout the state change. - Fixed the off by one error while doing the MHI channel check during command ring processing. MHI Generic =========== - Updated the MHI toplevel Makefile to use Kconfig flags for building the host and endpoint sub-directories conditionally. * tag 'mhi-for-v6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/mani/mhi: bus: mhi: ep: Fix off by one in mhi_ep_process_cmd_ring() bus: mhi: ep: Change state_lock to mutex bus: mhi: ep: Save channel state locally during suspend and resume bus: mhi: ep: Move chan->lock to the start of processing queued ch ring bus: mhi: ep: Fix the debug message for MHI_PKT_TYPE_RESET_CHAN_CMD cmd bus: mhi: ep: Only send -ENOTCONN status if client driver is available bus: mhi: ep: Check if the channel is supported by the controller bus: mhi: ep: Power up/down MHI stack during MHI RESET bus: mhi: host: Update mhi driver description bus: mhi: Update Makefile to used Kconfig flags
| * bus: mhi: ep: Fix off by one in mhi_ep_process_cmd_ring()Dan Carpenter2023-02-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The > comparison should be changed to >= to prevent an out of bounds access into the mhi_cntrl->mhi_chan[] array. The mhi_cntrl->mhi_chan[] array is allocated in mhi_ep_chan_init() and has mhi_cntrl->max_chan elements. Fixes: 6de4941c0215 ("bus: mhi: ep: Check if the channel is supported by the controller") Signed-off-by: Dan Carpenter <error27@gmail.com> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Alex Elder <elder@linaro.org> Link: https://lore.kernel.org/r/Y9JH5sudiZWvbODv@kili Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
| * bus: mhi: ep: Change state_lock to mutexManivannan Sadhasivam2023-01-272-21/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | state_lock, the spinlock type is meant to protect race against concurrent MHI state transitions. In mhi_ep_set_m0_state(), while the state_lock is being held, the channels are resumed in mhi_ep_resume_channels() if the previous state was M3. This causes sleeping in atomic bug, since mhi_ep_resume_channels() use mutex internally. Since the state_lock is supposed to be held throughout the state change, it is not ideal to drop the lock before calling mhi_ep_resume_channels(). So to fix this issue, let's change the type of state_lock to mutex. This would also allow holding the lock throughout all state transitions thereby avoiding any potential race. Cc: <stable@vger.kernel.org> # 5.19 Fixes: e4b7b5f0f30a ("bus: mhi: ep: Add support for suspending and resuming channels") Reported-by: Dan Carpenter <error27@gmail.com> Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
| * bus: mhi: ep: Save channel state locally during suspend and resumeManivannan Sadhasivam2023-01-271-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | During suspend and resume, the channel state needs to be saved locally. Otherwise, the endpoint may access the channels while they were being suspended and causing access violations. Fix it by saving the channel state locally during suspend and resume. Cc: <stable@vger.kernel.org> # 5.19 Fixes: e4b7b5f0f30a ("bus: mhi: ep: Add support for suspending and resuming channels") Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com) Link: https://lore.kernel.org/r/20221228161704.255268-7-manivannan.sadhasivam@linaro.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
| * bus: mhi: ep: Move chan->lock to the start of processing queued ch ringManivannan Sadhasivam2023-01-271-2/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is a good chance that while the channel ring gets processed, the STOP or RESET command for the channel might be received from the MHI host. In those cases, the entire channel ring processing needs to be protected by chan->lock to prevent the race where the corresponding channel ring might be reset. While at it, let's also add a sanity check to make sure that the ring is started before processing it. Because, if the STOP/RESET command gets processed while mhi_ep_ch_ring_worker() waited for chan->lock, the ring would've been reset. Cc: <stable@vger.kernel.org> # 5.19 Fixes: 03c0bb8ec983 ("bus: mhi: ep: Add support for processing channel rings") Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Link: https://lore.kernel.org/r/20221228161704.255268-6-manivannan.sadhasivam@linaro.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
| * bus: mhi: ep: Fix the debug message for MHI_PKT_TYPE_RESET_CHAN_CMD cmdManivannan Sadhasivam2023-01-271-1/+1
| | | | | | | | | | | | | | | | | | | | The debug log incorrectly mentions that STOP command is received instead of RESET command. Fix that. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Link: https://lore.kernel.org/r/20221228161704.255268-5-manivannan.sadhasivam@linaro.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
| * bus: mhi: ep: Only send -ENOTCONN status if client driver is availableManivannan Sadhasivam2023-01-271-6/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | For the STOP and RESET commands, only send the channel disconnect status -ENOTCONN if client driver is available. Otherwise, it will result in null pointer dereference. Cc: <stable@vger.kernel.org> # 5.19 Fixes: e827569062a8 ("bus: mhi: ep: Add support for processing command rings") Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Link: https://lore.kernel.org/r/20221228161704.255268-4-manivannan.sadhasivam@linaro.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
| * bus: mhi: ep: Check if the channel is supported by the controllerManivannan Sadhasivam2023-01-271-0/+7
| | | | | | | | | | | | | | | | | | | | Before processing the command ring for the channel, check if the channel is supported by the controller or not. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Link: https://lore.kernel.org/r/20221228161704.255268-3-manivannan.sadhasivam@linaro.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
| * bus: mhi: ep: Power up/down MHI stack during MHI RESETManivannan Sadhasivam2023-01-271-28/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | During graceful shutdown scenario, host will issue MHI RESET to the endpoint device before initiating shutdown. In that case, it makes sense to completely power down the MHI stack as sooner or later the access to MMIO registers will be prohibited. Also, the stack needs to be powered up in the case of SYS_ERR to recover the device. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Link: https://lore.kernel.org/r/20221228161704.255268-2-manivannan.sadhasivam@linaro.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
| * bus: mhi: host: Update mhi driver descriptionSlark Xiao2023-01-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | This should be a mistake. MHI contains "Host Interface" already. So we shall update "MHI" to "Modem" and the full name shall be "Modem Host Interface". Signed-off-by: Slark Xiao <slark_xiao@163.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20221229011358.15874-1-slark_xiao@163.com Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
| * bus: mhi: Update Makefile to used Kconfig flagsCarl Vanderlip2023-01-271-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Makefile was always suggesting to build subdirectories regardless of Kconfig. Use the Kconfig flags as intended. Signed-off-by: Carl Vanderlip <quic_carlv@quicinc.com> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Link: https://lore.kernel.org/r/20221207192613.2098614-1-quic_carlv@quicinc.com [mani: fixed the subject prefix] Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
* | Merge tag 'coresight-next-v6.3' of ↵Greg Kroah-Hartman2023-02-0228-195/+2171
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux into char-misc-next Suzuki writes: coresight: Updates for v6.3 - Dynamic TraceID allocation scheme for CoreSight trace source. Allows systems with > 44 CPUs to use the ETMs. TraceID is advertised via AUX_OUTPUT_HWID packets in perf.data. Also allows allocating trace-ids for non-CPU bound trace components (e.g., Qualcomm TPDA). - Support for Qualcomm TPDA and TPDM CoreSight devices. - Support for Ultrasoc SMB CoreSight Sink buffer. - Fixes for HiSilicon PTT driver - MAINTAINERS update: Add Reviewer for HiSilicon PTT driver - Bug fixes for CTI power management and sysfs mode - Fix CoreSight ETM4x TRCSEQRSTEVRn access Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> * tag 'coresight-next-v6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux: (35 commits) coresight: tmc: Don't enable TMC when it's not ready. coresight: tpda: fix return value check in tpda_probe() Coresight: tpda/tpdm: remove incorrect __exit annotation coresight: perf: Output trace id only once coresight: Fix uninitialised variable use in coresight_disable Documentation: coresight: tpdm: Add dummy comment after sysfs list Documentation: coresight: Extend title heading syntax in TPDM and TPDA documentation Documentation: trace: Add documentation for TPDM and TPDA dt-bindings: arm: Adds CoreSight TPDA hardware definitions Coresight: Add TPDA link driver coresight-tpdm: Add integration test support coresight-tpdm: Add DSB dataset support dt-bindings: arm: Add CoreSight TPDM hardware Coresight: Add coresight TPDM source driver coresight: core: Use IDR for non-cpu bound sources' paths. coresight: trace-id: Add debug & test macros to Trace ID allocation coresight: events: PERF_RECORD_AUX_OUTPUT_HW_ID used for Trace ID kernel: events: Export perf_report_aux_output_id() coresight: trace id: Remove legacy get trace ID function. coresight: etmX.X: stm: Remove trace_id() callback ...
| * | coresight: tmc: Don't enable TMC when it's not ready.Yabin Cui2023-01-304-14/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If TMC ETR is enabled without being ready, in later use we may see AXI bus errors caused by accessing invalid addresses. Signed-off-by: Yabin Cui <yabinc@google.com> [ Tweak error message ] Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230127231001.1920947-1-yabinc@google.com
| * | coresight: tpda: fix return value check in tpda_probe()Yang Yingliang2023-01-301-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | devm_ioremap_resource() never returns NULL pointer, it will return ERR_PTR() when it fails, so replace the check with IS_ERR(). Fixes: 5b7916625c01 ("Coresight: Add TPDA link driver") Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> [ Fix return value to the PTR_ERR(base) ] Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230129084246.537694-1-yangyingliang@huawei.com
| * | Coresight: tpda/tpdm: remove incorrect __exit annotationArnd Bergmann2023-01-262-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'remove' callbacks get called whenever a device is unbound from the driver, which can get triggered from user space. Putting it into the __exit section means that the function gets dropped in for built-in drivers, as pointed out by this build warning: `tpda_remove' referenced in section `.data' of drivers/hwtracing/coresight/coresight-tpda.o: defined in discarded section `.exit.text' of drivers/hwtracing/coresight/coresight-tpda.o `tpdm_remove' referenced in section `.data' of drivers/hwtracing/coresight/coresight-tpdm.o: defined in discarded section `.exit.text' of drivers/hwtracing/coresight/coresight-tpdm.o Fixes: 5b7916625c01 ("Coresight: Add TPDA link driver") Fixes: b3c71626a933 ("Coresight: Add coresight TPDM source driver") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230126163530.3495413-1-arnd@kernel.org
| * | coresight: perf: Output trace id only onceSuzuki K Poulose2023-01-242-4/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the dynamic traceid allocation scheme in, we output the AUX_OUTPUT_HWID packet every time event->start() is called. This could cause too many such records in the perf.data, while only one per CPU throughout the life time of the event is required. Make sure we only output it once. Before this patch: $ perf report -D | grep OUTPUT_HW_ID ... AUX_OUTPUT_HW_ID events: 55 (18.3%) After this patch: $ perf report -D | grep OUTPUT_HW_ID ... AUX_OUTPUT_HW_ID events: 5 ( 1.9%) Cc: Mike Leach <mike.leach@linaro.org> Cc: James Clark <james.clark@arm.com> Cc: Leo Yan <leo.yan@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Reviewed-by: James Clark <james.clark@arm.com> Link: https://lore.kernel.org/r/20230120103434.864318-1-suzuki.poulose@arm.com
| * | coresight: Fix uninitialised variable use in coresight_disableSuzuki K Poulose2023-01-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Kernel test robot reports: drivers/hwtracing/coresight/coresight-core.c:1176:7: warning: variable 'hash' is used uninitialized whenever switch case is taken [-Wsometimes-uninitialized] case CORESIGHT_DEV_SUBTYPE_SOURCE_PROC: ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/hwtracing/coresight/coresight-core.c:1195:24: note: uninitialized use occurs here idr_remove(&path_idr, hash); ^~~~ Fix this by moving the usage of the hash variable to where it actually should have been. Cc: Mao Jinlong <quic_jinlmao@quicinc.com> Link: https://lkml.kernel.org/r/202301211339.9mU0dccO-lkp@intel.com Reported-by: kernel test robot <lkp@intel.com> Reviewed-by: James Clark <james.clark@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lkml.kernel.org/r/20230123164700.1074064-1-suzuki.poulose@arm.com
| * | Coresight: Add TPDA link driverMao Jinlong2023-01-204-0/+258
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | TPDA(Trace, Profiling and Diagnostics Aggregator) is to provide packetization, funneling and timestamping of TPDM data. Multiple monitors are connected to different input ports of TPDA.This change is to add tpda enable/disable/probe functions for coresight tpda driver. - - - - - - - - - - - - | TPDM 0| | TPDM 1 | | TPDM 2| - - - - - - - - - - - - | | | |_ _ _ _ _ _ | _ _ _ _ | | | | | | | ------------------ | TPDA | ------------------ Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Tao Zhang <quic_taozha@quicinc.com> Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230120095301.30792-2-quic_jinlmao@quicinc.com
| * | coresight-tpdm: Add integration test supportMao Jinlong2023-01-202-0/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Integration test for tpdm can help to generate the data for verification of the topology during TPDM software bring up. Sample: echo 1 > /sys/bus/coresight/devices/tmc_etf0/enable_sink echo 1 > /sys/bus/coresight/devices/tpdm0/enable_source echo 1 > /sys/bus/coresight/devices/tpdm0/integration_test echo 2 > /sys/bus/coresight/devices/tpdm0/integration_test cat /dev/tmc_etf0 > /data/etf-tpdm0.bin Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Tao Zhang <quic_taozha@quicinc.com> Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230117145708.16739-6-quic_jinlmao@quicinc.com
| * | coresight-tpdm: Add DSB dataset supportMao Jinlong2023-01-202-0/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | TPDM serves as data collection component for various dataset types. DSB(Discrete Single Bit) is one of the dataset types. DSB subunit can be enabled for data collection by writing 1 to the first bit of DSB_CR register. This change is to add enable/disable function for DSB dataset by writing DSB_CR register. Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Tao Zhang <quic_taozha@quicinc.com> Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230117145708.16739-5-quic_jinlmao@quicinc.com
| * | Coresight: Add coresight TPDM source driverMao Jinlong2023-01-205-1/+192
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add driver to support Coresight device TPDM (Trace, Profiling and Diagnostics Monitor). TPDM is a monitor to collect data from different datasets. This change is to add probe/enable/disable functions for tpdm source. Signed-off-by: Tao Zhang <quic_taozha@quicinc.com> Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230120095301.30792-1-quic_jinlmao@quicinc.com
| * | coresight: core: Use IDR for non-cpu bound sources' paths.Mao Jinlong2023-01-191-11/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Except stm, there could be other sources which are not associated with cpus. Use IDR to store and search these sources' paths. Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Reviewed-by: Mike Leach <mike.leach@linaro.org> Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230117145708.16739-2-quic_jinlmao@quicinc.com
| * | coresight: trace-id: Add debug & test macros to Trace ID allocationMike Leach2023-01-191-0/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | Adds in a number of pr_debug macros to allow the debugging and test of the trace ID allocation system. Signed-off-by: Mike Leach <mike.leach@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230116124928.5440-15-mike.leach@linaro.org
| * | coresight: events: PERF_RECORD_AUX_OUTPUT_HW_ID used for Trace IDMike Leach2023-01-191-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the perf_report_aux_output_id() call to output the CoreSight trace ID and associated CPU as a PERF_RECORD_AUX_OUTPUT_HW_ID record in the perf.data file. Signed-off-by: Mike Leach <mike.leach@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230116124928.5440-14-mike.leach@linaro.org
| * | coresight: etmX.X: stm: Remove trace_id() callbackMike Leach2023-01-194-54/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CoreSight sources provide a callback (.trace_id) in the standard source ops which returns the ID to the core code. This was used to check that sources all had a unique Trace ID. Uniqueness is now gauranteed by the Trace ID allocation system, and the check code has been removed from the core. This patch removes the unneeded and unused .trace_id source ops from the ops structure and implementations in etm3x, etm4x and stm. Signed-off-by: Mike Leach <mike.leach@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230116124928.5440-8-mike.leach@linaro.org
| * | coresight: etm3x: Update ETM3 driver to use Trace ID APIMike Leach2023-01-193-26/+75
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the TraceID API to allocate ETM trace IDs dynamically. As with the etm4x we allocate on enable / disable for perf, allocate on enable / reset for sysfs. Additionally we allocate on sysfs file read as both perf and sysfs can read the ID before enabling the hardware. Remove sysfs option to write trace ID - which is inconsistent with both the dynamic allocation method and the fixed allocation method previously used. Signed-off-by: Mike Leach <mike.leach@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230116124928.5440-7-mike.leach@linaro.org
| * | coresight: etm4x: Update ETM4 driver to use Trace ID APIMike Leach2023-01-193-10/+93
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The trace ID API is now used to allocate trace IDs for ETM4.x / ETE devices. For perf sessions, these will be allocated on enable, and released on disable. For sysfs sessions, these will be allocated on enable, but only released on reset. This allows the sysfs session to interrogate the Trace ID used after the session is over - maintaining functional consistency with the previous allocation scheme. The trace ID will also be allocated on read of the mgmt/trctraceid file. This ensures that if perf or sysfs read this before enabling trace, the value will be the one used for the trace session. Trace ID initialisation is removed from the _probe() function. Signed-off-by: Mike Leach <mike.leach@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230116124928.5440-6-mike.leach@linaro.org
| * | coresight: stm: Update STM driver to use Trace ID APIMike Leach2023-01-191-27/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Updates the STM driver to use the trace ID allocation API. This uses the _system_id calls to allocate an ID on device poll, and release on device remove. The sysfs access to the STMTRACEIDR register has been changed from RW to RO. Having this value as writable is not appropriate for the new Trace ID scheme - and had potential to cause errors in the previous scheme if values clashed with other sources. Signed-off-by: Mike Leach <mike.leach@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230116124928.5440-5-mike.leach@linaro.org
| * | coresight: perf: traceid: Add perf ID allocation and notifiersMike Leach2023-01-191-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds in calls to allocate and release Trace ID for the CPUs in use by the perf session. Adds in notifier calls to the trace ID allocator that perf events are starting and stopping. This ensures that Trace IDs associated with CPUs remain the same throughout the perf session, and are only released when all perf sessions are complete. Signed-off-by: Mike Leach <mike.leach@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230116124928.5440-4-mike.leach@linaro.org
| * | coresight: Remove obsolete Trace ID unniqueness checksMike Leach2023-01-191-45/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The checks for sources to have unique IDs has been removed - this is now guaranteed by the ID allocation mechanisms, and inappropriate where multiple ID maps are in use in larger systems Signed-off-by: Mike Leach <mike.leach@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230116124928.5440-3-mike.leach@linaro.org
| * | coresight: trace-id: Add API to dynamically assign Trace ID valuesMike Leach2023-01-193-1/+421
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The existing mechanism to assign Trace ID values to sources is limited and does not scale for larger multicore / multi trace source systems. The API introduces functions that reserve IDs based on availabilty represented by a coresight_trace_id_map structure. This records the used and free IDs in a bitmap. CPU bound sources such as ETMs use the coresight_trace_id_get_cpu_id coresight_trace_id_put_cpu_id pair of functions. The API will record the ID associated with the CPU. This ensures that the same ID will be re-used while perf events are active on the CPU. The put_cpu_id function will pend release of the ID until all perf cs_etm sessions are complete. For backward compatibility the functions will attempt to use the same CPU IDs as the legacy system would have used if these are still available. Non-cpu sources, such as the STM can use coresight_trace_id_get_system_id / coresight_trace_id_put_system_id. Signed-off-by: Mike Leach <mike.leach@linaro.org> [ Fix checkpatch warning in drivers/hwtracing/coresight/coresight-trace-id.c ] Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230116124928.5440-2-mike.leach@linaro.org
| * | hwtracing: hisi_ptt: Only add the supported devices to the filters listYicong Yang2023-01-191-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PTT device can only support the devices on the same PCIe core, within BDF range [lower_bdf, upper_bdf]. It's not correct to assume the devices on the root bus are from the same PCIe core, there are cases that root ports from different PCIe core are sharing the same bus. So check when initializing the filters list. Fixes: ff0de066b463 ("hwtracing: hisi_ptt: Add trace function support for HiSilicon PCIe Tune and Trace device") Signed-off-by: Yicong Yang <yangyicong@hisilicon.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230112112201.16283-1-yangyicong@huawei.com
| * | coresight: ultrasoc-smb: fix return value check in smb_init_data_buffer()Yang Yingliang2023-01-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | platform_get_resource() returns NULL pointer not PTR_ERR(), replace the IS_ERR() check with NULL pointer check. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230118074920.1772141-1-yangyingliang@huawei.com
| * | drivers/coresight: Add UltraSoc System Memory Buffer driverQi Liu2023-01-164-0/+786
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add driver for UltraSoc SMB(System Memory Buffer) device. SMB provides a way to buffer messages from ETM, and store these "CPU instructions trace" in system memory. The SMB device is identifier as ACPI HID "HISI03A1". Device system memory address resources are allocated using the _CRS method and buffer modes is the circular buffer mode. SMB is developed by UltraSoc technology, which is acquired by Siemens, and we still use "UltraSoc" to name driver. Signed-off-by: Qi Liu <liuqi115@huawei.com> Signed-off-by: Junhao He <hejunhao3@huawei.com> Tested-by: JunHao He <hejunhao3@huawei.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230114101302.62320-2-hejunhao3@huawei.com
| * | coresight: cti: Remove atomic type from enable_req_countJames Clark2023-01-163-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | enable_req_count is only ever accessed inside the spinlock, so to avoid confusion that there are concurrent accesses and simplify the code, change it to an int. One access outside of the spinlock is in enable_show() which appears to allow partially written data to be displayed between enable_req_count, powered and enabled so move this one inside the spin lock too. Signed-off-by: James Clark <james.clark@arm.com> Reviewed-by: Mike Leach <mike.leach@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230110110736.2709917-4-james.clark@arm.com
| * | coresight: cti: Add PM runtime call in enable_storeMao Jinlong2023-01-161-2/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In commit 6746eae4bbad ("coresight: cti: Fix hang in cti_disable_hw()") PM runtime calls are removed from cti_enable_hw/cti_disable_hw. When enabling CTI by writing enable sysfs node, clock for accessing CTI register won't be enabled. Device will crash due to register access issue. Add PM runtime call in enable_store to fix this issue. Fixes: 6746eae4bbad ("coresight: cti: Fix hang in cti_disable_hw()") Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com> [Change to only call pm_runtime_put if a disable happened] Tested-by: Jinlong Mao <quic_jinlmao@quicinc.com> Signed-off-by: James Clark <james.clark@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230110110736.2709917-3-james.clark@arm.com
| * | coresight: cti: Prevent negative values of enable countJames Clark2023-01-161-2/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Writing 0 to the enable control repeatedly results in a negative value for enable_req_count. After this, writing 1 to the enable control appears to not work until the count returns to positive. Change it so that it's impossible for enable_req_count to be < 0. Return an error to indicate that the disable request was invalid. Fixes: 835d722ba10a ("coresight: cti: Initial CoreSight CTI Driver") Tested-by: Jinlong Mao <quic_jinlmao@quicinc.com> Signed-off-by: James Clark <james.clark@arm.com> Reviewed-by: Mike Leach <mike.leach@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230110110736.2709917-2-james.clark@arm.com
| * | coresight: etm4x: Fix accesses to TRCSEQRSTEVR and TRCSEQSTRJunhao He2023-01-161-6/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The TRCSEQRSTEVR and TRCSEQSTR registers are not implemented if the TRCIDR5.NUMSEQSTATE == 0. Skip accessing the registers in such cases. Fixes: 2e1cdfe184b5 ("coresight-etm4x: Adding CoreSight ETM4x driver") Signed-off-by: Junhao He <hejunhao3@huawei.com> Reviewed-by: Mike Leach <mike.leach@linaro.org> Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230114091632.60095-1-hejunhao3@huawei.com
* | | firmware: coreboot: framebuffer: Ignore reserved pixel color bitsAlper Nebi Yasak2023-01-311-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The coreboot framebuffer doesn't support transparency, its 'reserved' bit field is merely padding for byte/word alignment of pixel colors [1]. When trying to match the framebuffer to a simplefb format, the kernel driver unnecessarily requires the format's transparency bit field to exactly match this padding, even if the former is zero-width. Due to a coreboot bug [2] (fixed upstream), some boards misreport the reserved field's size as equal to its position (0x18 for both on a 'Lick' Chromebook), and the driver fails to probe where it would have otherwise worked fine with e.g. the a8r8g8b8 or x8r8g8b8 formats. Remove the transparency comparison with reserved bits. When the bits-per-pixel and other color components match, transparency will already be in a subset of the reserved field. Not forcing it to match reserved bits allows the driver to work on the boards which misreport the reserved field. It also enables using simplefb formats that don't have transparency bits, although this doesn't currently happen due to format support and ordering in linux/platform_data/simplefb.h. [1] https://review.coreboot.org/plugins/gitiles/coreboot/+/4.19/src/commonlib/include/commonlib/coreboot_tables.h#255 [2] https://review.coreboot.org/plugins/gitiles/coreboot/+/4.13/src/drivers/intel/fsp2_0/graphics.c#82 Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Link: https://lore.kernel.org/r/20230122190433.195941-1-alpernebiyasak@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* | | drivers: misc: ti-st: Fix a typo ("unknow")Jonathan Neuschäfer2023-01-311-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Spell it as "unknown". Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Link: https://lore.kernel.org/r/20230129161942.1627267-1-j.neuschaefer@gmx.net Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* | | misc: isl29003: Use sysfs_emit() to instead of sprintf()Bo Liu2023-01-311-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Follow the advice of the Documentation/filesystems/sysfs.rst and show() should only use sysfs_emit() or sysfs_emit_at() when formatting the value to be returned to user space. Signed-off-by: Bo Liu <liubo03@inspur.com> Link: https://lore.kernel.org/r/20230129092357.3143-1-liubo03@inspur.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* | | Merge tag 'counter-updates-for-6.3a' of ↵Greg Kroah-Hartman2023-01-311-44/+47
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/wbg/counter into char-misc-next William writes: First set of Counter updates for the 6.3 cycle This set of updates consists only of Kconfig cleanup and changes for the Counter subsystem. In particular, the Kconfig entries are reorganized to to alphabetical order, and dependencies added to restrict building certain drivers (intel-qep, ftm-quaddec, and microchip-tcp-capture) to systems that support them. Changes * counter - Sort the Kconfig entries alphabetically * ftm-quaddec - Depend on the Layerscape SoC * microchip-tcp-capture - Add appropriate arch deps for TCP driver - fix dependency references for config MICROCHIP_TCB_CAPTURE * intel-qep - Depend on X86 * tag 'counter-updates-for-6.3a' of git://git.kernel.org/pub/scm/linux/kernel/git/wbg/counter: counter: fix dependency references for config MICROCHIP_TCB_CAPTURE counter: microchip-tcp-capture: Add appropriate arch deps for TCP driver counter: ftm-quaddec: Depend on the Layerscape SoC counter: intel-qep: Depend on X86 counter: Sort the Kconfig entries alphabetically
| * | | counter: fix dependency references for config MICROCHIP_TCB_CAPTURELukas Bulwahn2023-01-181-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit dfeef15e73ca ("counter: microchip-tcp-capture: Add appropriate arch deps for TCP driver") intends to add appropriate dependencies for the config MICROCHIP_TCB_CAPTURE. It however prefixes the intended configs with CONFIG, but in Kconfig files in contrast to source files, the configs are referenced to without prefixing them with CONFIG. Fix the dependency references due to this minor misconception. Fixes: dfeef15e73ca ("counter: microchip-tcp-capture: Add appropriate arch deps for TCP driver") Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com> Link: https://lore.kernel.org/r/20230118074659.5909-1-lukas.bulwahn@gmail.com/ Signed-off-by: William Breathitt Gray <william.gray@linaro.org>
| * | | counter: microchip-tcp-capture: Add appropriate arch deps for TCP driverPeter Robinson2023-01-131-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the CONFIG_SOC_AT91SAM9 and CONFIG_SOC_SAM_V7 deps for the Microchip SoCs that support this IP block/driver plus compile time testing. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Link: https://lore.kernel.org/r/20230108074750.443705-4-pbrobinson@gmail.com/ Signed-off-by: William Breathitt Gray <william.gray@linaro.org>
| * | | counter: ftm-quaddec: Depend on the Layerscape SoCPeter Robinson2023-01-131-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At the moment only the Freescale LS1021A is the only HW that supports this IP block so add an appropriate dependency and compile test. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Link: https://lore.kernel.org/r/20230108074750.443705-3-pbrobinson@gmail.com/ Signed-off-by: William Breathitt Gray <william.gray@linaro.org>
| * | | counter: intel-qep: Depend on X86Peter Robinson2023-01-131-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Limit the Intel counter driver to X86, it doesn't make sense to build it for all arches if the counter subsystem is enabled. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Link: https://lore.kernel.org/r/20230108074750.443705-2-pbrobinson@gmail.com/ Signed-off-by: William Breathitt Gray <william.gray@linaro.org>
| * | | counter: Sort the Kconfig entries alphabeticallyPeter Robinson2023-01-131-44/+44
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | Sort the Kconfig menu alphabetically to make it easier to read as the list grows larger. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Link: https://lore.kernel.org/r/20230108074750.443705-1-pbrobinson@gmail.com/ Signed-off-by: William Breathitt Gray <william.gray@linaro.org>
* | | Merge tag 'fpga-for-v6.3-rc1' of ↵Greg Kroah-Hartman2023-01-2918-462/+863
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/fpga/linux-fpga into char-misc-next Xu writes: FPGA Manager changes for 6.3-rc1 Microchip: - Ivan's reliability improvements for Microchip Polarfire FPGA FPGA DFL doc: - Randy and Yilun's kernel doc fixes. The 2 patches, "fpga: dfl: more kernel-doc corrections" & "fpga: dfl: kernel-doc corrections" conflicts with Matthew's FPGA patch "fpga: dfl: add basic support for DFHv1" on tty-next. Yilun resolved the conflicts on: --branch for-next https://git.kernel.org/pub/scm/linux/kernel/git/fpga/linux-fpga.git/ On that branch, Matthew's patch is applied first then kernel doc fixes follow. Intel m10 bmc MFD & sub devices: - Lee's topic branch merged, to support new BMC board type with new PMCI interface to host, as well as its new sub devices. Signed-off-by: Xu Yilun <yilun.xu@intel.com> * tag 'fpga-for-v6.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/fpga/linux-fpga: fpga: bridge: return errors in the show() method of the "state" attribute fpga: dfl: more kernel-doc corrections fpga: dfl: kernel-doc corrections fpga: microchip-spi: separate data frame write routine fpga: microchip-spi: rewrite status polling in a time measurable way fpga: microchip-spi: move SPI I/O buffers out of stack mfd: intel-m10-bmc: Add PMCI driver fpga: m10bmc-sec: Make rsu status type specific fpga: m10bmc-sec: Create helpers for rsu status/progress checks mfd: intel-m10-bmc: Prefix register defines with M10BMC_N3000 fpga: intel-m10-bmc: Rework flash read/write mfd: intel-m10-bmc: Support multiple CSR register layouts mfd: intel-m10-bmc: Split into core and spi specific parts mfd: intel-m10-bmc: Rename the local variables mfd: intel-m10-bmc: Create m10bmc_platform_info for type specific info mfd: intel-m10-bmc: Add missing includes to header
| * \ \ Merge tag 'ib-mfd-fpga-hwmon-v6.3' of ↵Xu Yilun2023-01-299-385/+767
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd into for-fpga-v6.3-rc1 Lee writes: Immutable branch between MFD, FPGA and HWMON due for the v6.3 merge window * tag 'ib-mfd-fpga-hwmon-v6.3' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/lee/mfd: mfd: intel-m10-bmc: Add PMCI driver fpga: m10bmc-sec: Make rsu status type specific fpga: m10bmc-sec: Create helpers for rsu status/progress checks mfd: intel-m10-bmc: Prefix register defines with M10BMC_N3000 fpga: intel-m10-bmc: Rework flash read/write mfd: intel-m10-bmc: Support multiple CSR register layouts mfd: intel-m10-bmc: Split into core and spi specific parts mfd: intel-m10-bmc: Rename the local variables mfd: intel-m10-bmc: Create m10bmc_platform_info for type specific info mfd: intel-m10-bmc: Add missing includes to header
| | * | | mfd: intel-m10-bmc: Add PMCI driverIlpo Järvinen2023-01-273-0/+232
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the mfd driver for the Platform Management Component Interface (PMCI) based interface of Intel MAX10 BMC controller. PMCI is a software-visible interface, connected to card BMC which provided the basic functionality of read/write BMC register. The access to the register is done indirectly via a hardware controller/bridge that handles read/write/clear commands and acknowledgments for the commands. Previously, intel-m10-bmc provided sysfs under /sys/bus/spi/devices/... which is generalized in this change because not all MAX10 BMC appear under SPI anymore. Co-developed-by: Tianfei zhang <tianfei.zhang@intel.com> Signed-off-by: Tianfei zhang <tianfei.zhang@intel.com> Co-developed-by: Russ Weight <russell.h.weight@intel.com> Signed-off-by: Russ Weight <russell.h.weight@intel.com> Co-developed-by: Matthew Gerlach <matthew.gerlach@linux.intel.com> Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com> Reviewed-by: Xu Yilun <yilun.xu@intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Lee Jones <lee@kernel.org> Link: https://lore.kernel.org/r/20230116100845.6153-11-ilpo.jarvinen@linux.intel.com