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* clk: ti: clkctrl: add new exported API for checking standby infoTero Kristo2019-10-311-0/+1
| | | | | | | | | Standby status is provided for certain clkctrl clocks to see if the given module has entered standby or not. This is mostly needed by remoteproc code to see if the remoteproc has entered standby and the clock can be turned off safely. Signed-off-by: Tero Kristo <t-kristo@ti.com>
* clk: ti: clkctrl: convert to use bit helper macros instead of bitopsTero Kristo2019-10-311-1/+1
| | | | | | | This improves the readibility of the code slightly, and makes modifying the flags bit simpler. Signed-off-by: Tero Kristo <t-kristo@ti.com>
* clk: ti: dra7: disable the RNG and TIMER12 clkctrl clocks on HS devicesTero Kristo2019-04-251-0/+1
| | | | | | | | | RNG and TIMER12 are reserved for secure side usage only on HS devices, so disable their clkctrl clocks on HS SoCs also. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
* clk: ti: export the omap2_clk_is_hw_omap callTero Kristo2019-04-251-0/+1
| | | | | | | | | There is one instance outside the TI clock driver that needs the info whether a clock is an OMAP HW clock or not. Thus, move the function declaration into the public header. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
* clk: ti: add a usecount for autoidleAndreas Kemnade2019-02-151-0/+1
| | | | | | | | | | | | Multiple users might deny autoidle on a clock. So we should have some counting here, also according to the comment in _setup_iclk_autoidle(). Also setting autoidle regs is not atomic, so there is another reason for locking. Signed-off-by: Andreas Kemnade <andreas@kemnade.info> Acked-by: Tony Lindgren <tony@atomide.com> Tested-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
* clk: ti: Add functions to save/restore clk contextRuss Dill2018-10-031-0/+6
| | | | | | | | | | | SoCs like AM43XX lose clock registers context during RTC-only suspend. Hence add functions to save/restore the clock registers context. Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Russ Dill <Russ.Dill@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
* clk: ti: clkctrl: support multiple clkctrl nodes under a cm nodeTero Kristo2018-10-031-0/+1
| | | | | | | | | | | Currently, only one clkctrl node can be added under a specific CM node due to limitation with the implementation. Modify the code to pick-up clockdomain name from the clkctrl node instead of CM node if provided. Also, add a new flag to the TI clock driver so that both modes can be supported simultaneously. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Tony Lindgren <tony@atomide.com>
* Merge tag 'clk-for-linus' of ↵Linus Torvalds2018-04-131-0/+2
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "The large diff this time around is from the addition of a new clk driver for the TI Davinci family of SoCs. So far those clks have been supported with a custom implementation of the clk API in the arch port instead of in the CCF. With this driver merged we're one step closer to having a single clk API implementation. The other large diff is from the Amlogic clk driver that underwent some major surgery to use regmap. Beyond that, the biggest hitter is Samsung which needed some reworks to properly handle clk provider power domains and a bunch of PLL rate updates. The core framework was fairly quiet this round, just getting some cleanups and small fixes for some of the more esoteric features. And the usual set of driver non-critical fixes, cleanups, and minor additions are here as well. Core: - Rejig clk_ops::init() to be a little earlier for phase/accuracy ops - debugfs ops macroized to shave some lines of boilerplate code - Always calculate the phase instead of caching it in clk_get_phase() - More __must_check on bulk clk APIs New Drivers: - TI's Davinci family of SoCs - Intel's Stratix10 SoC - stm32mp157 SoC - Allwinner H6 CCU - Silicon Labs SI544 clock generator chip - Renesas R-Car M3-N and V3H SoCs - i.MX6SLL SoCs Removed Drivers: - ST-Ericsson AB8540/9540 Updates: - Mediatek MT2701 and MT7622 audsys support and MT2712 updates - STM32F469 DSI and STM32F769 sdmmc2 support - GPIO clks can sleep now - Spreadtrum SC9860 RTC clks - Nvidia Tegra MBIST workarounds and various minor fixes - Rockchip phase handling fixes and a memory leak plugged - Renesas drivers switch to readl/writel from clk_readl/clk_writel - Renesas gained CPU (Z/Z2) and watchdog support - Rockchip rk3328 display clks and rk3399 1.6GHz PLL support - Qualcomm PM8921 PMIC XO buffers - Amlogic migrates to regmap APIs - TI Keystone clk latching support - Allwinner H3 and H5 video clk fixes - Broadcom BCM2835 PLLs needed another bit to enable - i.MX6SX CKO mux fix and i.MX7D Video PLL divider fix - i.MX6UL/ULL epdc_podf support - Hi3798CV200 COMBPHY0 and USB2_OTG_UTMI and phase support for eMMC" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (233 commits) clk: davinci: add a reset lookup table for psc0 clk: imx: add clock driver for imx6sll dt-bindings: imx: update clock doc for imx6sll clk: imx: add new gate/gate2 wrapper funtion clk: imx: Add CLK_IS_CRITICAL flag for busy divider and busy mux clk: cs2000: set pm_ops in hibernate-compatible way clk: bcm2835: De-assert/assert PLL reset signal when appropriate clk: imx7d: Move clks_init_on before any clock operations clk: imx7d: Correct ahb clk parent select clk: imx7d: Correct dram pll type clk: imx7d: Add USB clock information clk: socfpga: stratix10: add clock driver for Stratix10 platform dt-bindings: documentation: add clock bindings information for Stratix10 clk: ti: fix flag space conflict with clkctrl clocks clk: uniphier: add additional ethernet clock lines for Pro4 clk: uniphier: add SATA clock control support clk: uniphier: add PCIe clock control support clk: Add driver for the si544 clock generator chip clk: davinci: Remove redundant dev_err calls clk: uniphier: add ethernet clock control support for PXs3 ...
| * clk: ti: add support for register read-modify-write low-level operationTero Kristo2018-03-081-0/+2
| | | | | | | | | | | | | | Useful for changing few bits on a register, this makes sure for example that the operation is done atomically in case of syscon. Signed-off-by: Tero Kristo <t-kristo@ti.com>
* | ARM: omap2+: control: add support for auxiliary control module instancesTero Kristo2018-03-201-0/+1
|/ | | | | | | | | | Control module can have multiple instances in a system, each with separate address space and features. Add base support for these auxiliary instances, with support for syscon and clock mappings under them. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* clk: ti: convert to use proper register definition for all accessesTero Kristo2017-03-081-22/+24
| | | | | | | | | | | | | | Currently, TI clock driver uses an encapsulated struct that is cast into a void pointer to store all register addresses. This can be considered as rather nasty hackery, and prevents from expanding the register address field also. Instead, replace all the code to use proper struct in place for this, which contains all the previously used data. This patch is rather large as it is touching multiple files, but this can't be split up as we need to avoid any boot breakage. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
* clk: ti: drop unnecessary MEMMAP_ADDRESSING flagTero Kristo2017-03-081-2/+0
| | | | | | | This has been superceded by the usage of ti_clk_ll_ops for now. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
* clk: ti: move omap2_init_clk_clkdm under TI clock driverTero Kristo2017-03-081-1/+0
| | | | | | | | This is not needed outside the driver, so move it inside it and remove the prototype from the public header also. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
* clk: ti: add clkdm_lookup to the exported functionsTero Kristo2017-03-081-0/+2
| | | | | | | | This will be needed to move some additional clockdomain functionality under clock driver. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
* clk: ti: remove un-used definitions from public clk_hw_omap structTero Kristo2017-03-081-4/+0
| | | | | | | | Clksel support has been deprecated a while back, so remove these from the struct also. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
* clk: ti: dpll: add support for specifying max rate for DPLLsTero Kristo2016-04-151-0/+2
| | | | | | | | | | | | DPLLs typically have a maximum rate they can support, and this varies from DPLL to DPLL. Add support of the maximum rate value to the DPLL data struct, and also add check for this in the DPLL round_rate function. Signed-off-by: Tero Kristo <t-kristo@ti.com> Reviewed-by: Nishanth Menon <nm@ti.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* clk: ti: dpll: convert DPLL support code to use clk_hw instead of clk ptrsTero Kristo2016-02-221-4/+4
| | | | | | | | | | | | Convert DPLL support code to use clk_hw pointers for reference and bypass clocks. This allows us to use clk_hw_* APIs for accessing any required parameters for these clocks, avoiding some locking problems at least with DPLL enable code; this used clk_get_rate which uses mutex but isn't good under clk_enable / clk_disable. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* Merge tag 'armsoc-fixes-nc' of ↵Linus Torvalds2016-01-201-0/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull non-urgent ARM SoC fixes from Olof Johansson: "As usual, we queue up a few fixes that don't seem urgent enough to go in through -rc. - MAINTAINERS updates to add a list for brcmstb and fix a typo - A handful of fixes for OMAP 81xx, a recently resurrected platform so these can't be considered real regressions and thus got queued. - A couple of other small fixes for scoop, sa1100 and davinci" * tag 'armsoc-fixes-nc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: OMAP2+: Fix randconfig build warning for dm814_pllss_data ARM: sa1100/simpad: Be sure to clamp return value ARM: scoop: Be sure to clamp return value ARM: davinci: fix a problematic usage of WARN() ARM: davinci: only select WT cache if cache is enabled ARM: OMAP2+: Remove useless check for legacy booting for dm814x ARM: OMAP2+: Enable GPIO for dm814x ARM: dts: Fix dm814x pinctrl address and mask ARM: dts: Fix dm8148 control modules ranges ARM: OMAP2+: Fix timer entries for dm814x ARM: dts: Fix some mux and divider clocks to get dm814x-evm booting ARM: OMAP2+: Add DPPLS clock manager for dm814x clk: ti: Add few dm814x clock aliases ARM: dts: Fix dm814x entries for pllss and prcm MAINTAINERS: gpio-brcmstb: Remove stray '>' MAINTAINERS: brcmstb: Include Broadcom internal mailing-list
| * ARM: OMAP2+: Add DPPLS clock manager for dm814xTony Lindgren2015-12-091-0/+1
| | | | | | | | | | | | | | | | | | | | On dm814x we have some clocks at DPLLS and some at PRCM. Let's add a new omap_prcm_init_data entry for the DPLLS so we can initalize timer clocks early. Cc: Paul Walmsley <paul@pwsan.com> Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | clk: ti: omap5+: dpll: implement errata i810Tero Kristo2015-11-301-0/+1
|/ | | | | | | | | | | | | | | Errata i810 states that DPLL controller can get stuck while transitioning to a power saving state, while its M/N ratio is being re-programmed. As a workaround, before re-programming the M/N ratio, SW has to ensure the DPLL cannot start an idle state transition. SW can disable DPLL idling by setting the DPLL AUTO_DPLL_MODE=0 or keeping a clock request active by setting a dependent clock domain in SW_WKUP. This errata impacts OMAP5 and DRA7 chips, so enable the errata for these. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* Merge tag 'armsoc-soc' of ↵Linus Torvalds2015-09-011-1/+2
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC platform updates from Olof Johansson: "New or improved SoC support: - add support for Atmel's SAMA5D2 SoC - add support for Freescale i.MX6UL - improved support for TI's DM814x platform - misc fixes and improvements for RockChip platforms - Marvell MVEBU suspend/resume support A few driver changes that ideally would belong in the drivers branch are also here (acked by appropriate maintainers): - power key input driver for Freescale platforms (svns) - RTC driver updates for Freescale platforms (svns/mxc) - clk fixes for TI DM814/816X + a bunch of other changes for various platforms" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (83 commits) ARM: rockchip: pm: Fix PTR_ERR() argument ARM: imx: mach-imx6ul: Fix allmodconfig build clk: ti: fix for definition movement ARM: uniphier: drop v7_invalidate_l1 call at secondary entry memory: kill off set_irq_flags usage rtc: snvs: select option REGMAP_MMIO ARM: brcmstb: select ARCH_DMA_ADDR_T_64BIT for LPAE ARM: BCM: Enable ARM erratum 798181 for BRCMSTB ARM: OMAP2+: Fix power domain operations regression caused by 81xx ARM: rockchip: enable PMU_GPIOINT_WAKEUP_EN when entering shallow suspend ARM: rockchip: set correct stabilization thresholds in suspend ARM: rockchip: rename osc_switch_to_32k variable ARM: imx6ul: add fec MAC refrence clock and phy fixup init ARM: imx6ul: add fec bits to GPR syscon definition rtc: mxc: add support of device tree dt-binding: document the binding for mxc rtc rtc: mxc: use a second rtc clock ARM: davinci: cp_intc: use IRQCHIP_SKIP_SET_WAKE instead of irq_set_wake callback soc: mediatek: Fix SCPSYS compilation ARM: at91/soc: add basic support for new sama5d2 SoC ...
| * ARM: OMAP2+: Add support for initializing dm814x clocksTony Lindgren2015-07-161-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let's add a minimal clocks for dm814x to get it booted. This is mostly a placeholder and relies on the PLLs being on from the bootloader. Note that the divider clocks work the same way as on dm816x and am335x. Cc: Matthijs van Duin <matthijsvanduin@gmail.com> Cc: Mike Turquette <mturquette@linaro.org> Cc: Paul Walmsley <paul@pwsan.com> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Tero Kristo <t-kristo@ti.com> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | clk: ti: move low-level access and init code under clock driverTero Kristo2015-06-021-1/+6
| | | | | | | | | | | | | | | | | | With most of the clock code under clock driver already, the low-level register access code, and the init code for the same, is no longer needed outside the clock driver. Thus, these can be moved under clock driver also. Signed-off-by: Tero Kristo <t-kristo@ti.com>
* | clk: ti: remove exported ll_ops struct, instead add an API for registrationTero Kristo2015-06-021-2/+1
| | | | | | | | | | | | | | We should avoid exporting data from drivers, instead use an API for registering the clock low level operations. Signed-off-by: Tero Kristo <t-kristo@ti.com>
* | clk: ti: move some public definitions to private headerTero Kristo2015-06-021-45/+0
| | | | | | | | | | | | | | | | | | Several exported TI clock driver features are no longer needed outside the clock driver itself, thus move all of these to the driver private header file. Also, update some of the driver files to actually include this header. Signed-off-by: Tero Kristo <t-kristo@ti.com>
* | clk: ti: am3517: move remaining am3517 clock support code to clock driverTero Kristo2015-06-021-2/+0
| | | | | | | | | | | | | | | | With legacy clock support gone, this is no longer needed under platform, so move it under the clock driver itself. Make some exports be driver internal definitions at the same time. Signed-off-by: Tero Kristo <t-kristo@ti.com>
* | clk: ti: omap34xx: move omap34xx clock type support code to clock driverTero Kristo2015-06-021-4/+0
| | | | | | | | | | | | | | | | With the legacy clock data gone, this is no longer needed under platform, so move it under the clock driver itself. Remove unnecessary declarations from the TI clock header also. Signed-off-by: Tero Kristo <t-kristo@ti.com>
* | clk: ti: clkdm: move clkdm gate clock support code to clock driverTero Kristo2015-06-021-2/+0
| | | | | | | | | | | | | | | | With the legacy clock data gone, this is no longer needed under platform, so move it under the clock driver itself. Remove the exported clock driver APIs as well, as these are not needed outside clock driver anymore. Signed-off-by: Tero Kristo <t-kristo@ti.com>
* | clk: ti: omap2430: move clock support code under clock driverTero Kristo2015-06-021-1/+0
| | | | | | | | | | | | | | | | With the legacy clock support gone, this is no longer needed under platform code-base. Thus, move this under the TI clock driver, and remove the exported API from the public header. Signed-off-by: Tero Kristo <t-kristo@ti.com>
* | clk: ti: dflt: move support for default gate clock to clock driverTero Kristo2015-06-021-4/+0
| | | | | | | | | | | | | | | | | | With the legacy support gone, OMAP2+ default gate clock can be moved under clock driver. Create a new file for the purpose, and clean-up the header exports a bit as some clock APIs are no longer needed outside clock driver itself. Signed-off-by: Tero Kristo <t-kristo@ti.com>
* | ARM: OMAP2+: clock: remove clkdm_control static boolean from codeTero Kristo2015-06-021-0/+1
| | | | | | | | | | | | | | | | | | clkdm_control is used to determine, whether clocks should trigger a clockdomain transition when they are enabled/disabled. Keep this functionality intact, but replace this with a clk_features flag which can be initialized during boot if needed. Signed-off-by: Tero Kristo <t-kristo@ti.com>
* | clk: ti: dpll: move omap3 DPLL functionality to clock driverTero Kristo2015-06-021-30/+0
| | | | | | | | | | | | | | | | With the legacy clock support gone, OMAP3 generic DPLL code can now be moved over to the clock driver also. A few un-unused clkoutx2 functions are also removed at the same time. Signed-off-by: Tero Kristo <t-kristo@ti.com>
* | ARM: OMAP2+: clock: add support for specific CM ops to ti_clk_ll_opsTero Kristo2015-06-021-0/+6
| | | | | | | | | | | | | | | | | | | | | | Clock driver requires access to some CM API functions once the code is being moved under the clock driver from the platform directory. Gate type clock requires access to cm_wait_module_ready and cm_split_idlest_reg functions, which are both used for waiting until the module being clocked has been successfully activated. These CM APIs are now exported through the ti_clk_ll_ops struct. Signed-off-by: Tero Kristo <t-kristo@ti.com>
* | ARM: OMAP2+: clock: add support for clkdm ops to the low level clk opsTero Kristo2015-06-021-5/+11
| | | | | | | | | | | | | | | | | | Clock driver requires access to certain clockdomain handling ops once the code is being moved over under clock driver. Example of this is clk_enable / clk_disable under omap3 DPLL code. The required clkdm APIs are now exported through the ti_clk_ll_ops struct. Signed-off-by: Tero Kristo <t-kristo@ti.com>
* | clk: ti: move omap2_clk_enable_init_clocks under clock driverTero Kristo2015-06-021-1/+0
| | | | | | | | | | | | | | This is no longer used outside clock driver, so move it under the driver and remove the export for it from the global header file. Signed-off-by: Tero Kristo <t-kristo@ti.com>
* | clk: ti: autoidle: move generic autoidle handling code to clock driverTero Kristo2015-06-021-10/+3
| | | | | | | | | | | | | | | | This is no longer needed in platform directory, as the legacy clock data is gone, so move it under TI clock driver. Some static functions are renamed also. Signed-off-by: Tero Kristo <t-kristo@ti.com>
* | clk: ti: move interface clock implementation under drivers/clkTero Kristo2015-06-021-2/+8
| | | | | | | | | | | | | | | | With the legacy clock support gone, the OMAP interface clock implementation can be moved under the clock driver. Some temporary header file tweaks are also needed to make this change work properly. Signed-off-by: Tero Kristo <t-kristo@ti.com>
* | clk: ti: move OMAP4+ DPLL implementation under drivers/clkTero Kristo2015-06-021-12/+1
| | | | | | | | | | | | | | | | | | With the legacy clock support gone, the OMAP4 specific DPLL implementations can be moved under the clock driver. Change some of the function prototypes to be static at the same time, and remove some exports from the global TI clock driver header. Signed-off-by: Tero Kristo <t-kristo@ti.com>
* | clk: ti: move generic OMAP DPLL implementation under drivers/clkTero Kristo2015-06-021-1/+0
| | | | | | | | | | | | | | | | With the legacy clock data now gone, we can start moving OMAP clock type implementations under clock driver. Start this with moving the generic OMAP DPLL clock type under TI clock driver. Signed-off-by: Tero Kristo <t-kristo@ti.com>
* | ARM: OMAP2+: clock: export driver API to setup/get clock featuresTero Kristo2015-06-021-0/+16
|/ | | | | | | | | As most of the clock driver support code is going to be moved under drivers/clk/ti, an API for setting / getting the SoC specific clock features is needed. This patch provides this API and changes the existing code to use it. Signed-off-by: Tero Kristo <t-kristo@ti.com>
* ARM: OMAP2+: PRCM: split PRCM module init to their own driver filesTero Kristo2015-03-271-3/+2
| | | | | | | Splits the clock related provider module inits under their own driver files. Previously this was done for all modules under the common PRM driver. Signed-off-by: Tero Kristo <t-kristo@ti.com>
* ARM: OMAP2+: PRCM: add support for static clock memmap indicesTero Kristo2015-03-251-0/+1
| | | | | | | | All clock provider related drivers will now register their iomaps with a static index. This makes it easier to split up the individual drivers to their own files in subsequent patches. Signed-off-by: Tero Kristo <t-kristo@ti.com>
* clk: omap: compile legacy omap3 clocks conditionallyArnd Bergmann2015-02-031-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 'ARM: OMAP3: legacy clock data move under clk driver' patch series causes build errors when CONFIG_OMAP3 is not set: drivers/clk/ti/dpll.c: In function 'ti_clk_register_dpll': drivers/clk/ti/dpll.c:199:31: error: 'omap3_dpll_ck_ops' undeclared (first use in this function) const struct clk_ops *ops = &omap3_dpll_ck_ops; ^ drivers/clk/ti/dpll.c:199:31: note: each undeclared identifier is reported only once for each function it appears in drivers/clk/ti/dpll.c:259:10: error: 'omap3_dpll_per_ck_ops' undeclared (first use in this function) ops = &omap3_dpll_per_ck_ops; ^ drivers/built-in.o: In function `ti_clk_register_gate': drivers/clk/ti/gate.c:179: undefined reference to `clkhwops_omap3430es2_dss_usbhost_wait' drivers/clk/ti/gate.c:179: undefined reference to `clkhwops_am35xx_ipss_module_wait' -in.o: In function `ti_clk_register_interface': drivers/clk/ti/interface.c:100: undefined reference to `clkhwops_omap3430es2_iclk_hsotgusb_wait' drivers/clk/ti/interface.c:100: undefined reference to `clkhwops_omap3430es2_iclk_dss_usbhost_wait' drivers/clk/ti/interface.c:100: undefined reference to `clkhwops_omap3430es2_iclk_ssi_wait' drivers/clk/ti/interface.c:100: undefined reference to `clkhwops_am35xx_ipss_wait' drivers/built-in.o: In function `ti_clk_register_composite': :(.text+0x3da768): undefined reference to `ti_clk_build_component_gate' In order to fix that problem, this patch makes the omap3 legacy code compiled only when both CONFIG_OMAP3 and CONFIG_ATAGS are set. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Michael Turquette <mturquette@linaro.org>
* clk: Add rate constraints to clocksTomeu Vizoso2015-02-021-0/+4
| | | | | | | | | | | | | | | | Adds a way for clock consumers to set maximum and minimum rates. This can be used for thermal drivers to set minimum rates, or by misc. drivers to set maximum rates to assure a minimum performance level. Changes the signature of the determine_rate callback by adding the parameters min_rate and max_rate. Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> [sboyd@codeaurora.org: set req_rate in __clk_init] Signed-off-by: Michael Turquette <mturquette@linaro.org> [mturquette@linaro.org: min/max rate for sun6i_ahb1_clk_determine_rate migrated clk-private.h changes to clk.c]
* Merge branch 'clk-omap-legacy' into clk-nextMichael Turquette2015-02-021-0/+12
|\ | | | | | | | | Conflicts: arch/arm/mach-omap2/cclock3xxx_data.c
| * clk: ti: add omap3 legacy clock dataTero Kristo2015-01-301-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduces omap3 legacy clock data under clock driver. The clock data is also in new format, which makes it possible to get rid of the clk-private.h header. This patch also introduces SoC specific init functions that shall be called from the low level init. The data format used in this file has two possible evolution paths; it can either be removed completely once no longer needed, or it will be possible to retain the format and modify the TI clock driver to be a loadable module at some point. The actual path to be followed will be decided later. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Michael Turquette <mturquette@linaro.org>
* | clk: ti: Drop use of clk-private.hStephen Boyd2015-01-271-0/+1
|/ | | | | | | | | | | | | These modules don't need to include clk-private.h. Replace the include with clk.h because these modules are clock consumers and also include clk-provider.h in clk/ti.h because struct clk_hw_omap has a struct clk_hw embedded in it. Cc: Tero Kristo <t-kristo@ti.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Reviewed-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Michael Turquette <mturquette@linaro.org>
* ARM: OMAP2+: clock: fix DPLL code to use new determine rate APIsTero Kristo2014-12-151-2/+2
| | | | | | | | | | | | | | | | While the change for determine_rate clock operation was merged, the OMAP counterpart using these calls was overlooked for some reason, and caused boot failures on at least OMAP4 platforms. Fixed by updating the DPLL API calls to use the new parameters. Signed-off-by: Tero Kristo <t-kristo@ti.com> Fixes: 646cafc6aa ("clk: Change clk_ops->determine_rate") Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Paul Walmsley <paul@pwsan.com> Tested-by: Kevin Hilman <khilman@linaro.org> Reported-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Michael Turquette <mturquette@linaro.org>
* ARM: OMAP3: clock: add support for dpll4_set_rate_and_parentTero Kristo2014-11-131-0/+2
| | | | | | | | | Expand the support of omap4 per-dpll to provide set_rate_and_parent. This is required for proper behavior of clk_change_rate with determine_rate support. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
* ARM: OMAP4: clock: add support for determine_rate for omap4 regm4xen DPLLTero Kristo2014-11-131-0/+4
| | | | | | | | | | Similarly to OMAP3 noncore DPLL, the implementation of this DPLL clock type is wrong. This patch adds basic functionality for determine_rate for this clock type which will be taken into use in the patches following later. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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