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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Arnd Bergmann:
"Driver updates for ARM SoCs, including a couple of newly added
drivers:
- A new driver for the power management controller on TI Keystone
- Support for the prerelease "SCPI" firmware protocol that ended up
being shipped by Amlogic in their GXBB SoC.
- A soc_device can now be matched using a glob from inside the
kernel, when another driver wants to know the specific chip it is
running on and cannot find out from DT, firmware or hardware.
- Renesas SoCs now support identification through the soc_device
interface, both in user space and kernel.
- Renesas r8a7743 and r8a7745 gain support for their system
controller
- A new checking module for the ARM "PSCI" (not to be confused with
"SCPI" mentioned above) firmware interface.
- A new driver for the Tegra GMI memory interface
- Support for the Tegra firmware interfaces with their power
management controllers
As usual, the updates for the reset controller framework are merged
here, as they tend to touch multiple SoCs as well, including a new
driver for the Oxford (now Broadcom) OX820 chip and the Tegra bpmp
interface.
The existing drivers for Atmel, Qualcomm, NVIDIA, TI Davinci, and
Rockchips SoCs see some further updates"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (76 commits)
misc: sram: remove useless #ifdef
drivers: psci: Allow PSCI node to be disabled
drivers: psci: PSCI checker module
soc: renesas: Identify SoC and register with the SoC bus
firmware: qcom: scm: Return PTR_ERR when devm_clk_get fails
firmware: qcom: scm: Remove core, iface and bus clocks dependency
dt-bindings: firmware: scm: Add MSM8996 DT bindings
memory: da8xx-ddrctl: drop the call to of_flat_dt_get_machine_name()
bus: da8xx-mstpri: drop the call to of_flat_dt_get_machine_name()
ARM: shmobile: Document DT bindings for Product Register
soc: renesas: rcar-sysc: add R8A7745 support
reset: Add Tegra BPMP reset driver
dt-bindings: firmware: Allow child nodes inside the Tegra BPMP
dt-bindings: Add power domains to Tegra BPMP firmware
firmware: tegra: Add BPMP support
firmware: tegra: Add IVC library
dt-bindings: firmware: Add bindings for Tegra BPMP
mailbox: tegra-hsp: Use after free in tegra_hsp_remove_doorbells()
mailbox: Add Tegra HSP driver
firmware: arm_scpi: add support for pre-v1.0 SCPI compatible
...
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into next/drivers
Merge "ARM: keystone: add TI SCI protocol support for v4.10" from
Tero Kristo:
[description taken from http://processors.wiki.ti.com/index.php/TISCI
Texas Instruments' Keystone generation System on Chips (SoC) starting
with 66AK2G02, now include a dedicated SoC System Control entity called
PMMC(Power Management Micro Controller) in line with ARM architecture
recommendations. The function of this module is to integrate all system
operations in a centralized location. Communication with the SoC System
Control entity from various processing units like ARM/DSP occurs over
Message Manager hardware block.
...
Texas Instruments' System Control Interface defines the communication
protocol between various processing entities to the System Control Entity
on TI SoCs. This is a set of message formats and sequence of operations
required to communicate and get system services processed from System
Control entity in the SoC.]
* 'for-4.10-ti-sci-base' of https://github.com/t-kristo/linux-pm:
firmware: ti_sci: Add support for reboot core service
firmware: ti_sci: Add support for Clock control
firmware: ti_sci: Add support for Device control
firmware: Add basic support for TI System Control Interface (TI-SCI) protocol
Documentation: Add support for TI System Control Interface (TI-SCI) protocol
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Since system controller now has control over SoC power management, it
needs to be explicitly requested to reboot the SoC. Add support for
it.
In some systems however, SoC needs to toggle a GPIO or send event to an
external entity (like a PMIC) for a system reboot to take place. To
facilitate that, we allow for a DT property to determine if the reboot
handler will be registered and further, the service is also made
available to other drivers (such as PMIC driver) to sequence the
additional operation and trigger the SoC reboot as the last step.
Tested-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
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Texas Instrument's System Control Interface (TI-SCI) Message Protocol
is used in Texas Instrument's System on Chip (SoC) such as those
in keystone family K2G SoC to communicate between various compute
processors with a central system controller entity.
TI-SCI message protocol provides support for management of various
hardware entities within the SoC. Add support driver to allow
communication with system controller entity within the SoC using the
mailbox client.
In general, we expect to function at a device level of abstraction,
however, for proper operation of hardware blocks, many clocks directly
supplying the hardware block needs to be queried or configured.
Introduce support for the set of SCI message protocol support that
provide us with this capability.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
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Texas Instrument's System Control Interface (TI-SCI) Message Protocol
is used in Texas Instrument's System on Chip (SoC) such as those
in keystone family K2G SoC to communicate between various compute
processors with a central system controller entity.
TI-SCI message protocol provides support for management of various
hardware entitites within the SoC. Add support driver to allow
communication with system controller entity within the SoC using the
mailbox client.
We introduce the fundamental device management capability support to
the driver protocol as part of this change.
[d-gerlach@ti.com: Contributed device reset handling]
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
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Texas Instrument's System Control Interface (TI-SCI) Message Protocol
is used in Texas Instrument's System on Chip (SoC) such as those
in keystone family K2G SoC to communicate between various compute
processors with a central system controller entity.
TI-SCI message protocol provides support for management of various
hardware entities within the SoC. Add support driver to allow
communication with system controller entity within the SoC using the
mailbox client.
We introduce the basic registration and query capability for the
driver protocol as part of this change. Subsequent patches add in
functionality specific to the TI-SCI features.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into next/drivers
Pull "soc_device_match() interface for matching against soc_bus attributes"
from Geert Uytterhoeven:
This provides core infrastructure as a dependency for several users
(Freescale/NXP, Samsung, Renesas).
Its core parts have been acked by Greg, and the fixes by Arnd and/or
Greg (the last fix only received an informal ack, that's why I hadn't
added the ack).
This has already been pulled by Ulf, and is present in mmc/next, as a
dependency for a Freescale/NXP driver update.
* tag 'soc-device-match-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
base: soc: Provide a dummy implementation of soc_device_match()
base: soc: Check for NULL SoC device attributes
base: soc: Introduce soc_device_match() interface
base: soc: Early register bus when needed
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git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers
Pull "Renesas ARM Based SoC r8a7745 SYSC Driver Updates for v4.10" from Simon Horman:
* Add support for the r8a7745 SoC to rcar-sysc
* tag 'renesas-r8a7745-sysc-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
soc: renesas: rcar-sysc: add R8A7745 support
ARM: shmobile: r8a7745: add power domain index macros
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers
soc: tegra: Core SoC changes for v4.10-rc1
This contains mostly cleanup and new feature work on the power
management controller as well as the addition of a Kconfig symbol for
the new Tegra186 (Parker) SoC generation.
* tag 'tegra-for-4.10-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc/tegra: pmc: Use consistent naming for PM domains
soc/tegra: pmc: Remove genpd when adding provider fails
soc/tegra: pmc: Check return code for pm_genpd_init()
soc/tegra: pmc: Clean-up I/O rail error messages
soc/tegra: pmc: Simplify IO rail bit handling
soc/tegra: pmc: Guard against uninitialised PMC clock
soc/tegra: pmc: Add I/O pad voltage support
soc/tegra: pmc: Use consistent ordering of bit definitions
soc/tegra: pmc: Correct type of variable for tegra_pmc_readl()
soc/tegra: pmc: Use BIT macro for register field definition
Signed-off-by: Olof Johansson <olof@lixom.net>
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I/O pins on Tegra SoCs are grouped into so-called I/O pads. Each such
pad can be used to control the common voltage signal level and power
state of the pins in the given pad.
I/O pads can be powered down even if the system is active, which can
save power from that I/O interface. For SoC generations prior to
Tegra124 the I/O pad voltage is automatically detected and hence the
system software doesn't need to configure it. However, starting with
Tegra210 the detection logic has been removed, so explicit control of
the I/O pad voltage by system software is required.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers
firmware: Add Tegra IVC and BPMP support
IVC is an inter-processor communication protocol that uses shared memory
to exchange data between processors. The BPMP driver makes use of this
to communicate with the Boot and Power Management Processor (BPMP) and
uses an additional hardware synchronization primitive from the HSP block
to signal availability of new data (doorbell).
Firmware running on the BPMP implements a number of services such as the
control of clocks and resets within the system, or the ability to ungate
or gate power partitions.
* tag 'tegra-for-4.10-firmware' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: firmware: Allow child nodes inside the Tegra BPMP
dt-bindings: Add power domains to Tegra BPMP firmware
firmware: tegra: Add BPMP support
firmware: tegra: Add IVC library
dt-bindings: firmware: Add bindings for Tegra BPMP
Signed-off-by: Olof Johansson <olof@lixom.net>
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The Tegra186 BPMP is also a provider of power domains. Enhance the
device tree binding to describe this.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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The Boot and Power Management Processor (BPMP) is a co-processor found
on Tegra SoCs. It is designed to handle the early stages of the boot
process and offload power management tasks (such as clocks, resets,
powergates, ...) as well as system control services.
Compared to the ARM SCPI, the services provided by BPMP are message-
based rather than method-based. The BPMP firmware driver provides the
services to transmit data to and receive data from the BPMP. Users can
also register a Message ReQuest (MRQ), for which a service routine will
be run when a corresponding event is received from the firmware.
A set of messages, called the BPMP ABI, are specified for a number of
different services provided by the BPMP (such as clocks or resets).
Based on work by Sivaram Nair <sivaramn@nvidia.com> and Joseph Lo
<josephl@nvidia.com>.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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The Inter-VM communication (IVC) is a communication protocol which is
designed for interprocessor communication (IPC) or the communication
between the hypervisor and the virtual machine with a guest OS.
Message channels are used to communicate between processors. They are
backed by DRAM or SRAM, so care must be taken to maintain coherence of
data.
The IVC library maintains memory-based descriptors for the transmission
and reception channels as well as the data coherence of the counter and
payload. Clients, such as the driver for the BPMP firmware, can use the
library to exchange messages with remote processors.
Based on work by Peter Newman <pnewman@nvidia.com> and Joseph Lo
<josephl@nvidia.com>.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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The Boot and Power Management Processor (BPMP) is a co-processor found
in Tegra SoCs. It is designed to handle the early stages of the boot
process as well as to offload power management tasks (such as clocks,
resets, powergates, ...).
The binding document defines the resources that are used by the BPMP
firmware, which implements the interprocessor communication (IPC)
between the CPU and the BPMP.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers
mailbox: Add Tegra HSP driver
This contains the device tree bindings and a driver for the Tegra HSP, a
hardware block that provides hardware synchronization primitives and is
the foundation for inter-processor communication between CPU and BPMP.
* tag 'tegra-for-4.10-mailbox' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
mailbox: tegra-hsp: Use after free in tegra_hsp_remove_doorbells()
mailbox: Add Tegra HSP driver
dt-bindings: mailbox: Add Tegra HSP binding
soc/tegra: Add Tegra186 support
Signed-off-by: Olof Johansson <olof@lixom.net>
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Add DT binding for the Hardware Synchronization Primitives (HSP). The
HSP is designed for the processors to share resources and communicate
with one another. A set of hardware synchronization primitives for
interprocessor communication (IPC) is provided. IPC protocols can use
use these hardware synchronization primitives when operating between
processors in an AMP configuration.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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next/drivers
Reset controller changes for v4.10
- remove obsolete STiH41[56] platform support
- add Oxford Semiconductor OX820 support
- add reset index include files for OX810SE and OX820
- make drivers with boolean Kconfig options explicitly
non-modular
- allow shared pulsed resets via reset_control_reset, which
in this case means that the reset must have been triggered
once, but possibly earlier, after the function returns, and
is never triggered again for the lifetime of the reset
control
* tag 'reset-for-4.10' of git://git.pengutronix.de/git/pza/linux:
reset: allow using reset_control_reset with shared reset
reset: lpc18xx: make it explicitly non-modular
reset: zynq: make it explicitly non-modular
reset: sunxi: make it explicitly non-modular
reset: socfpga: make it explicitly non-modular
reset: berlin: make it explicitly non-modular
dt-bindings: reset: oxnas: Update for OX820
dt-bindings: reset: oxnas: Add include file with reset indexes
reset: oxnas: Add OX820 support
reset: sti: softreset: Remove obsolete platforms from dt binding doc.
reset: sti: Remove STiH415/6 reset support
Signed-off-by: Olof Johansson <olof@lixom.net>
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Add DT include file for Oxford Semiconductor OX810SE and OX820 reset
controller support.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux into next/drivers
Drivers for 4.10:
- few fixes for the memory drivers
- minimal security module driver
- support for the Secure SRAM
* tag 'at91-ab-4.10-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux:
misc: sram: add Atmel securam support
misc: sram: document new compatible
ARM: at91: add secumod register definitions
Documentation: dt: atmel-at91: Document secumod bindings
memory: atmel-sdramc: use builtin_platform_driver to simplify the code
memory: atmel-ebi: fix return value check in at91_ebi_dev_disable()
Signed-off-by: Olof Johansson <olof@lixom.net>
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Add registers and bits definitions for the security module found on
sama5d2.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/drivers
Qualcomm ARM Based Driver Updates for v4.10
* Fixup QCOM SCM to use devm_reset_controller_register
* Add QCOM pinctrl to Qualcomm MAINTAINERS entry
* Add PM8994 regulator definitions
* Add stub for WCNSS_CTRL API
* tag 'qcom-drivers-for-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
firmware: qcom: scm: Use devm_reset_controller_register()
MAINTAINERS: add drivers/pinctrl/qcom to ARM/QUALCOMM SUPPORT
pinctrl: pm8994: add pad voltage regulator defines
soc: qcom: wcnss_ctrl: Stub wcnss_ctrl API
Signed-off-by: Olof Johansson <olof@lixom.net>
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This patch adds defines for internal voltage regulators used
to switch voltage levels on gpio/mpp pads.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Stub the wcnss_ctrl API to allow compile testing wcnss function drivers.
Cc: Marcel Holtmann <marcel@holtmann.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Andy Gross <andy.gross@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers
Renesas ARM Based SoC Drivers Updates for v4.10
* Add support for the r8a7743 SoC to rcar-sysc
* tag 'renesas-drivers-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
soc: renesas: rcar-sysc: add R8A7743 support
ARM: shmobile: r8a7743: add power domain index macros
Signed-off-by: Olof Johansson <olof@lixom.net>
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM DT updates from Arnd Bergmann:
"Lots of changes as usual, so I'm trying to be brief here. Most of the
new hardware support has the respective driver changes merged through
other trees or has had it available for a while, so this is where
things come together.
We get a DT descriptions for a couple of new SoCs, all of them
variants of other chips we already support, and usually coming with a
new evaluation board:
- Oxford semiconductor (now Broadcom) OX820 SoC for NAS devices
- Qualcomm MDM9615 LTE baseband
- NXP imx6ull, the latest and smallest i.MX6 application processor variant
- Renesas RZ/G (r8a7743 and r8a7745) application processors
- Rockchip PX3, a variant of the rk3188 chip used in Android tablets
- Rockchip rk1108 single-core application processor
- ST stm32f746 Cortex-M7 based microcontroller
- TI DRA71x automotive processors
These are commercially available consumer platforms we now support:
- Motorola Droid 4 (xt894) mobile phone
- Rikomagic MK808 Android TV stick based on Rockchips rx3066
- Cloud Engines PogoPlug v3 based on OX820
- Various Broadcom based wireless devices:
- Netgear R8500 router
- Tenda AC9 router
- TP-LINK Archer C9 V1
- Luxul XAP-1510 Access point
- Turris Omnia open hardware router based on Armada 385
And a couple of new boards targeted at developers, makers or
industrial integration:
- Macnica Sodia development platform for Altera socfpga (Cyclone V)
- MicroZed board based on Xilinx Zynq FPGA platforms
- TOPEET itop/elite based on exynos4412
- WP8548 MangOH Open Hardware platform for IOT, based on Qualcomm MDM9615
- NextThing CHIP Pro gadget
- NanoPi M1 development board
- AM571x-IDK industrial board based on TI AM5718
- i.MX6SX UDOO Neo
- Boundary Devices Nitrogen6_SOM2 (i.MX6)
- Engicam i.CoreM6
- Grinn i.MX6UL liteSOM/liteBoard
- Toradex Colibri iMX6 module
Other changes:
- added peripherals on renesas, davinci, stm32f429, uniphier, sti,
mediatek, integrator, at91, imx, vybrid, ls1021a, omap, qualcomm,
mvebu, allwinner, broadcom, exynos, zynq
- Continued fixes for W=1 dtc warnings
- The old STiH415/416 SoC support gets removed, these never made it
into products and have served their purpose in the kernel as a
template for teh newer chips from ST
- The exynos4415 dtsi file is removed as nothing uses it.
- Intel PXA25x can now be booted using devicetree"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (422 commits)
arm: dts: zynq: Add MicroZed board support
ARM: dts: da850: enable high speed for mmc
ARM: dts: da850: Add node for pullup/pulldown pinconf
ARM: dts: da850: enable memctrl and mstpri nodes per board
ARM: dts: da850-lcdk: Add ethernet0 alias to DT
ARM: dts: artpec: add pcie support
ARM: dts: add support for Turris Omnia
devicetree: Add vendor prefix for CZ.NIC
ARM: dts: berlin2q-marvell-dmp: fix typo in chosen node
ARM: dts: berlin2q-marvell-dmp: fix regulators' name
ARM: dts: Add xo to sdhc clock node on qcom platforms
ARM: dts: r8a7794: Add device node for PRR
ARM: dts: r8a7793: Add device node for PRR
ARM: dts: r8a7792: Add device node for PRR
ARM: dts: r8a7791: Add device node for PRR
ARM: dts: r8a7790: Add device node for PRR
ARM: dts: r8a7779: Add device node for PRR
ARM: dts: r8a73a4: Add device node for PRR
ARM: dts: sk-rzg1e: add Ether support
ARM: dts: sk-rzg1e: initial device tree
...
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git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Pull "Rockchip dts32 changes for 4.10" from Heiko Stübner:
A bit of attention for the rk3066, fixed tsadc reset node
as well as enabling the dma for uart and mmc controllers.
And one new soc, the rk1108 combining a single-core Cortex-A7
with a separate DSP core.
* tag 'v4.10-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: add the sdmmc pinctrl for rk1108
ARM: dts: rockchip: add rockchip RK1108 Evaluation board
ARM: dts: rockchip: add basic support for RK1108 SOC
clk: rockchip: add dt-binding header for rk1108
dt-bindings: rockchip-dw-mshc: add RK1108 dw-mshc description
ARM: dts: rockchip: enable dma for uart and mmc on rk3066a
ARM: dts: rockchip: fix TSADC reset node for rk3066a
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http://github.com/Broadcom/stblinux into next/dt
Pull "Broadcom devicetree changes for 4.10" from Florian Fainelli:
This pull request contains Broadcom ARM-based SoC Device Tree changes for 4.10,
please pull the following:
- Rafal adds support for the Netgear R8500 routers, adds basic support
for the Tenda AC9 router which uses the new BCM53573 SoC (single core Cortex
A7). He also enables the UART on the Netgear R8000 and restructures the
include files a bit for the BCM47094 SoC, finally he adds USB 3.0 PHY nodes
which enables USB 3.0 on BCM5301X devices that support it. Finally he adds
support for the TP-LINK Archer C9 V1 router.
- Kamal adds support for the QSPI controller on the Northstar Plus SoCs and updates
the bcm958625k reference board to have it enabled
- Dan adds support for the Luxul XAP-1510 (using a BCM4708) and XWR-3100 (using
a BCM47094)
- Scott fixes the pinctrl names in the Cygnus DTS files
- Jonathan enables the Broadcom iProc mailbox controller for Broadcom Cygnus/iProc
SoCs, he adds interrupt support for the GPIO CRMU hardware block and finally adds
the node for the OTP controller found on Cygnus SoCs
- Dhananjay enables the GPIO B controller on Norstarh Plus SoCs
- Eric defines standard pinctrl groups in the BCM2835 GPIO node
- Gerd adds definitions for the pinctrl groups and updates the PWM, I2C and SDHCI nodes
to use their appropriate pinctrl functions
- Linus adds names for the Raspberry Pi GPIO lines based on the datasheet
- Martin adds the DT binding and nodes for the Raspberry Pi firmware thermal block
- Stefan fixes a few typos with respect to the BCM2835 mailbox binding example and
Device Tree nodes he also fixes the Raspberry Pi GPIO lines names and finally
adds names for the Raspberry Zero GPIO lines
* tag 'arm-soc/for-4.10/devicetree' of http://github.com/Broadcom/stblinux: (29 commits)
ARM: bcm2835: Add names for the RPi Zero GPIO lines
ARM: bcm2835: Fix names for the Raspberry Pi GPIO lines
ARM: dts: enable GPIO-b for Broadcom NSP
ARM: BCM5301X: Add DT for TP-LINK Archer C9 V1
ARM: dts: Add node for Broadcom OTP controller driver
ARM: dts: Enable interrupt support for cygnus crmu gpio driver
ARM: dts: Enable Broadcom iProc mailbox controller
ARM: bcm2835: Add names for the Raspberry Pi GPIO lines
ARM: bcm2835: dts: add thermal node to device-tree of bcm283x
dt: bindings: add thermal device driver for bcm2835
ARM: dts: bcm283x: fix typo in mailbox address
DT: binding: bcm2835-mbox: fix address typo in example
ARM: dts: cygnus: fix naming of pinctrl node
ARM: BCM53573: Specify PMU and its ILP clock in the DT
ARM: BCM5301X: Add DT for Luxul XWR-3100
ARM: BCM5301X: Add DT for Luxul XAP-1510
ARM: BCM5301X: Specify USB 3.0 PHY in DT
ARM: BCM5301X: Enable UART on Netgear R8000
ARM: BCM5301X: Add separated DTS include file for BCM47094
ARM: dts: NSP: Add QSPI nodes to NSPI and bcm958625k DTSes
...
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Also delete (unused) private enum from driver.
The pull defines can be used instead if needed.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Pull "Second Round of Renesas ARM Based SoC DT Updates for v4.10" from Simon Horman:
Enhancements:
* Add device nodes for PRR
* Add r8a7745 SoC and sk-rzg1e board
* Add r8a7743 SoC and sk-rzg1m board
* Enable SDR-104 and I2C demuxer on alt, koelsch and lager boards
Corrections:
* Use SYSC "always-on" PM Domain for sound on r8a7794 SoC
* Correct hsusb parent clock on r8a7794 SoC
* Correct PFC names for DU on alt board
* tag 'renesas-dt2-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (33 commits)
ARM: dts: r8a7794: Add device node for PRR
ARM: dts: r8a7793: Add device node for PRR
ARM: dts: r8a7792: Add device node for PRR
ARM: dts: r8a7791: Add device node for PRR
ARM: dts: r8a7790: Add device node for PRR
ARM: dts: r8a7779: Add device node for PRR
ARM: dts: r8a73a4: Add device node for PRR
ARM: dts: sk-rzg1e: add Ether support
ARM: dts: sk-rzg1e: initial device tree
ARM: dts: r8a7745: add IRQC support
ARM: dts: r8a7745: add Ether support
ARM: dts: r8a7745: add [H]SCIF{|A|B} support
ARM: dts: r8a7745: add SYS-DMAC support
ARM: dts: r8a7745: initial SoC device tree
ARM: dts: sk-rzg1m: add Ether support
ARM: dts: sk-rzg1m: initial device tree
ARM: dts: r8a7743: add IRQC support
ARM: dts: r8a7743: add Ether support
ARM: dts: r8a7743: add [H]SCIF{A|B} support
ARM: dts: r8a7743: add SYS-DMAC support
...
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'97ca8402997c' into dt-for-v4.10
Renesas RZ/G1M and RZ/G1E CPG Core Clock Definitions
Shared by clock drivers, and DTS files.
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Add macros usable by the device tree sources to reference R8A7745 SYSC power
domains by index.
Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Add macros usable by the device tree sources to reference R8A7743 SYSC power
domains by index.
Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into next/dt
Pull "Renesas RZ/G1M and RZ/G1E CPG Core Clock Definitions" from Geert Uytterhoeven:
Shared by clock drivers, and DTS files.
* tag 'rzg-clock-defs-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
clk: renesas: Add r8a7745 CPG Core Clock Definitions
clk: renesas: Add r8a7743 CPG Core Clock Definitions
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git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Device tree changes for omaps for v4.10 merge window:
- A series of patches to configure tps65217 PMIC interrupts for
power button, charger and usb and use them on am335x
- Configure EEPROM, LEDs and USR1 button for omap5 boards
- Add tscadc DMA properites for am33xx and am4372
- Configure baltos-ir5221 both musb channels to host mode
- Configure internal and external RTC clocks for am335x boards
- Don't reset gpio3 block on baltos
- Remove pinmux for dra72-evm for erratum i869, fix the regulators
and seprate out tps65917 support
- Add dra718-evm support
- Add minimal droid 4 xt894 support
* tag 'omap-for-v4.10/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (22 commits)
ARM: dts: Add minimal support for motorola droid 4 xt894
ARM: dts: Add support for dra718-evm
ARM: dts: dra72: Add separate dtsi for tps65917
ARM: dts: dra72-evm: Fix modelling of regulators
ARM: dts: dra72-evm: Remove pinmux configurations for erratum i869
ARM: dts: am335x-baltos: don't reset gpio3 block
ARM: dts: AM335X-evmsk: Add the internal and external clock nodes for rtc
ARM: dts: AM335X-evm: Add the internal and external clock nodes for rtc
ARM: dts: AM335X-bone-common: Add the internal and external clock nodes for rtc
ARM: dts: am335x-baltos-ir5221: use both musb channels in host mode
ARM: dts: am4372: add DMA properties for tscadc
ARM: dts: am33xx: add DMA properties for tscadc
ARM: dts: omap5 uevm: add USR1 button
ARM: dts: omap5 uevm: add LEDs
ARM: dts: omap5 uevm: add EEPROM
ARM: dts: am335x: Add the power button interrupt
ARM: dts: am335x: Add the charger interrupt
dt-bindings: mfd: Provide human readable defines for TPS65217 interrupts
ARM: dts: am335x: Support the PMIC interrupt
ARM: dts: tps65217: Add the power button device
...
Signed-off-by: Olof Johansson <olof@lixom.net>
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TPS65217 supports three interrupt sources. This patch enables assigning
each IRQ number in the charger and power button node. Then corresponding
IRQ will be requested by each driver.
Signed-off-by: Milo Kim <woogyom.kim@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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- Add bindings for mtk-scpsys for mt2701
- Add clocks for auxadc on mt8173-evb
- Add nodes needed by clock controller for mt2701
- Use clocks from the clock controller for the uart of mt2701
* tag 'v4.9-next-dts' of https://github.com/mbgg/linux-mediatek:
arm: dts: mt2701: Use real clock for UARTs
arm: dts: mt2701: Add clock controller device nodes
arm64: dts: mt8173: Fix auxadc node
soc: mediatek: Add MT2701 power dt-bindings
Signed-off-by: Olof Johansson <olof@lixom.net>
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Add power dt-bindings for MT2701.
Signed-off-by: Shunli Wang <shunli.wang@mediatek.com>
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
32bit devicetree changes for Rockchip including removal of skeleton.dtsi
inclusion, missing unit names for memory nodes, various frequency
optimizations allowing for better performance on rk3066, the usage of
pin constants to bridge between the two numbering schemes used (gpio
controllers using 0-31 and pins being labeled A0-A7,..., D0-D7)
and UHS/HS modes for the mmc controllers on the popmetal board.
Two new boards, the PX3-based evaluation board, with the PX3 being an
industrial variant of the rk3188 soc and the Rikomagic MK808 board
based around the rk3066 are also added.
* tag 'v4.10-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (21 commits)
ARM: dts: rockchip: replace to "max-frequency" instead of "clock-freq-min-max"
ARM: dts: rockchip: Set sdmmc frequency at boot time for rk3066a
ARM: dts: rockchip: use pin constants to describe gpios on Popmetal-RK3288
include: dt-bindings: Add GPIO pin index definition for rockchip pinctrl
ARM: dts: rockchip: Add rk3066 MK808 board
devicetree: Add vendor prefix for Rikomagic
ARM: dts: rockchip: initialize rk3066 PLL clock rate
clk: rockchip: Add binding ids for cpu and peri clocks on rk3066
ARM: dts: rockchip: enable HS200/DDR52 mode for emmc on rk3288-popmetal
ARM: dts: rockchip: Support UHS mode for SD card on PopMetal-RK3288 board
ARM: dts: rockchip: remove always-on and boot-on from vcc_sd for px3-evb
ARM: dts: rockchip: update compatible strings for Rockchip efuse
ARM: dts: rockchip: add rockchip PX3 Evaluation board
ARM: dts: rockchip: Add missing unit name to memory nodes in rk3xxx boards
ARM: dts: rockchip: Add missing unit name to memory nodes in rk3288 boards
ARM: dts: rockchip: Add missing unit name to memory nodes in rk322x boards
ARM: dts: rockchip: Add missing unit name to memory nodes in rk3036 boards
ARM: dts: rockchip: Remove skeleton.dtsi inclusion in rk3xxx.dtsi
ARM: dts: rockchip: Remove skeleton.dtsi inclusion in rk3288.dtsi
ARM: dts: rockchip: Remove skeleton.dtsi inclusion in rk322x.dtsi
...
Signed-off-by: Olof Johansson <olof@lixom.net>
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Add gpio pin index definition to make it easier to describe
GPIO in dts.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti into next/dt
STi dts update:
Change sound card name for B2120
Enable sound card for B2260
Remove stih415-clks.h
Identify critical clocks for STiH407
Fix typo in stih407-pinctrl.dtsi
* tag 'sti-dt-for-4.10-round2' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti:
ARM: dts: STiHxxx-b2120: change sound card name
ARM: dts: STiH410-B2260: enable sound card
ARM: dts: remove stih415-clks.h
ARM: dts: stih407-clocks: Identify critical clocks
ARM: dts: STiH407: DT fix s/interrupts-names/interrupt-names/
Signed-off-by: Olof Johansson <olof@lixom.net>
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Since v4.8, STiH415/416 clock support has
been removed [1], these platform doesn't boot.
We can remove DTS files related to these socs.
[1] https://patchwork.kernel.org/patch/9157571/
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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Linux 4.9-rc3
* tag 'v4.9-rc3': (292 commits)
Linux 4.9-rc3
x86/smpboot: Init apic mapping before usage
ACPICA: Dispatcher: Fix interpreter locking around acpi_ev_initialize_region()
ACPICA: Dispatcher: Fix an unbalanced lock exit path in acpi_ds_auto_serialize_method()
ACPICA: Dispatcher: Fix order issue of method termination
ARC: module: print pretty section names
ARC: module: elide loop to save reference to .eh_frame
ARC: mm: retire ARC_DBG_TLB_MISS_COUNT...
ARC: build: retire old toggles
ARC: boot log: refactor cpu name/release printing
ARC: boot log: remove awkward space comma from MMU line
ARC: boot log: don't assume SWAPE instruction support
ARC: boot log: refactor printing abt features not captured in BCRs
ARCv2: boot log: print IOC exists as well as enabled status
ubifs: Fix regression in ubifs_readdir()
ubi: fastmap: Fix add_vol() return value test in ubi_attach_fastmap()
MAINTAINERS: Add entry for genwqe driver
VMCI: Doorbell create and destroy fixes
GenWQE: Fix bad page access during abort of resource allocation
vme: vme_get_size potentially returning incorrect value on failure
...
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git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Renesas ARM Based SoC DT Updates for v4.10
Clean-Ups and Corrections:
* Removed Z clock from r8a7794 SoC; it is not present in hardware
* Use generic pinctrl properties in SDHI nodes in gose board
* Correct W=1 dtc warnings on r8a7794 SoC
* Correct DU reg property on r8a7779 SoC
* Correct SCIFB reg properties to cover all registers
Enhancements:
* Configure pinmuxing for the DU0 input clock on the Marzen board
* Enable VIN 0 - 2 on r8a7793 SoC
* Enable HDMI input on Koelsch and Lager boards
* Enable SDHI1 on rskrza1 board
* Add MMCIF nodes to r7s72100 SoC
* Add MSIOF clocks to r8a7792 SoC
* Enable UHS for SDHI 0 & 1 on koelsch and alt boards
* tag 'renesas-dt-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (29 commits)
ARM: dts: r8a7794: remove Z clock
ARM: dts: r8a7779: marzen: Configure pinmuxing for the DU0 input clock
ARM: dts: sh73a0: Remove skeleton.dtsi inclusion
ARM: dts: r8a7740: Remove skeleton.dtsi inclusion
ARM: dts: r8a7779: Remove skeleton.dtsi inclusion
ARM: dts: r8a7778: Remove skeleton.dtsi inclusion
ARM: dts: emev2: Remove skeleton.dtsi inclusion
ARM: dts: r8a7779: Fix DU reg property
ARM: dts: r8a7793: Enable VIN0-VIN2
ARM: dts: koelsch: add HDMI input
ARM: dts: lager: Add entries for VIN HDMI input support
ARM: dts: rskrza1: add sdhi1 DT support
ARM: dts: r7s72100: add sdhi to device tree
ARM: dts: r8a7794: Fix W=1 dtc warnings
ARM: dts: gose: use generic pinctrl properties in SDHI nodes
ARM: dts: r7s72100: add sdhi clock to device tree
ARM: dts: r7s72100: add mmcif to device tree
ARM: dts: r8a7792: add MSIOF support
ARM: dts: r8a7792: add MSIOF clocks
ARM: dts: wheat: add DU support
...
Signed-off-by: Olof Johansson <olof@lixom.net>
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R8A7794 doesn't have Cortex-A15 CPUs, thus there's no Z clock...
Fixes: 0dce5454d5c2 ("ARM: shmobile: Initial r8a7794 SoC device tree")
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform updates from Arnd Bergmann:
"These are updates for platform specific code on 32-bit ARM machines,
essentially anything that can not (yet) be expressed using DT files.
Noteworthy changes include:
- Added support for the TI DRA71x family of SoCs in mach-omap2, this
is an new variant of the the DRA72x/DRA74x automotive infotainment
chips we already supported for a while.
- Added support for the ST STM32F746 SoC, the first Cortex-M7 based
microcontroller we support, related to the smaller STM32F4 family.
- Renesas adds support for r8a7743 and r8a7745 in mach-shmobile, see
http://elinux.org/RZ-G
- SMP is now supported on the OX820 platform
- A lot of code in mach-omap2 gets removed as a follow-up to removing
support for board files in the previous release
- Davinci has some new work to improve USB support
- For i.MX, the performance monitor now supports profiling the memory
controller using 'perf'"
* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (95 commits)
ARM: davinci: da830-evm: use gpio descriptor for mmc pins
ARM: davinci: da850-evm: use gpio descriptor for mmc pins
ARM: davinci: hawk: use gpio descriptor for mmc pins
ARM: ARTPEC-6: add select MFD_SYSCON to MACH_ARTPEC6
ARM: davinci: da8xx: Fix ohci device name
ARM: oxnas: Add OX820 config and makefile entry
ARM: oxnas: Add OX820 SMP support
ARM: davinci: PM: fix build when da850 not compiled in
ARM: orion5x: remove legacy support of ls-chl
ARM: integrator: drop EBI access use syscon
ARM: BCM5301X: Add back handler ignoring external imprecise aborts
ARM: davinci: PM: support da8xx DT platforms
ARM: davinci: PM: cleanup: remove references to pdata
ARM: davinci: PM: rework init, remove platform device
ARM: Kconfig: Introduce MACH_STM32F746 flag
ARM: mach-stm32: Add a new SOC - STM32F746
ARM: shmobile: document SK-RZG1E board
ARM: shmobile: r8a7745: basic SoC support
ARM: imx: mach-imx6ul: add imx6ull support
ARM: zynq: Reserve correct amount of non-DMA RAM
...
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