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* ASoC: wm8985: add i2c dependencyArnd Bergmann2016-06-131-0/+1
| | | | | | | | | | | | | | | | | | | The wm8985 driver is now user-selectable, but building it with I2C disabled results in a link failure: sound/built-in.o: In function `wm8985_i2c_probe': :(.text+0x44914): undefined reference to `__devm_regmap_init_i2c' sound/built-in.o: In function `wm8985_exit': :(.exit.text+0x3d8): undefined reference to `i2c_del_driver' sound/built-in.o: In function `wm8985_modinit': :(.init.text+0x1454): undefined reference to `i2c_register_driver' This adds a Kconfig dependency the way that the other codec drivers have it. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Fixes: 811e66de2241 ("ASoC: wm8985: add support for WM8758") Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: wm8985: add support for WM8758Petr Kulhavy2016-05-302-36/+109
| | | | | | | | | | | | | The WM8758 chip is almost identical to WM8985 with the difference that it doesn't feature the AUX input. This patch adds the WM8758 support into the WM8985 driver. The chip selection is done by the I2C name. The SPI probe supports only the WM8985. Signed-off-by: Petr Kulhavy <petr@barix.com> Reviewed-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: wm8985: add register definitions for WM8758Petr Kulhavy2016-05-301-0/+38
| | | | | | | | | | The WM8758 chip is almost identical to WM8985 with the difference that it doesn't feature the AUX input. This patch adds the register definitions for WM8758 specific bit fields to the header file. Signed-off-by: Petr Kulhavy <petr@barix.com> Acked-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* Merge remote-tracking branch 'asoc/topic/hdmi' into asoc-nextMark Brown2016-05-139-24/+809
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| * ASoC: hdac_hdmi: Potential NULL deref in hdac_hdmi_get_spk_alloc()Dan Carpenter2016-05-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | We intended || here instead of &&. The original code potentially leads to a NULL dereference. Fixes: 2889099eb8cd ('ASoC: hdac_hdmi: Register chmap controls and ops') Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Reviewd-by: Takashi Sakamoto <o-takashi@sakamocchi.jp> Acked-by: Vinod Koul <vinod.koul@intel.com> Tested-by: Sachin Mokashi <sachinx.mokashi@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * ASoC: Intel: Skylake: Update channel map based on runtime paramsSubhransu S. Prusty2016-04-281-1/+20
| | | | | | | | | | | | | | | | | | Default channel map is set for 2 channels. Fix the channel map based on runtime params to support multichannel. Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * ASoC: Intel: Skylake: Add multichannel support for HDMISubhransu S. Prusty2016-04-281-7/+7
| | | | | | | | | | | | | | | | | | Channel max is changed to 8 from stereo to support multichannel capability for HDMI devices. Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * ASoC: hdac_hdmi: Register chmap controls and opsSubhransu S. Prusty2016-04-281-0/+100
| | | | | | | | | | | | | | | | | | With this patch, chmap controls are created and user space can set the channel map. Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * ASoC: Intel: boards: Update skl_nau88l25_ssm4567 driver to support chmapSubhransu S. Prusty2016-04-281-3/+70
| | | | | | | | | | | | | | | | | | | | | | | | | | HDMI registers channel map controls per PCM. As PCMs are not registered during dai_link init callback, store the pcm ids and codec DAIs during this init callback. Register for late probe and call the jack_init API which also registers channel map in the late probe callback handler. Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * ASoC: Intel: boards: Update skl_nau88l25_max98357a driver to support chmapSubhransu S. Prusty2016-04-281-3/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | HDMI registers channel map controls per PCM. As PCMs are not registered during dai_link init callback, store the pcm ids and codec DAIs during this init callback. Register for late probe and call the jack_init API which also registers channel map in the late probe callback handler. Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * ASoC: skl_rt286: Fix to support hdmi channel map supportSubhransu S. Prusty2016-04-281-1/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | HDMI registers channel map controls per PCM. As PCMs are not registered during dai_link init callback, store the pcm ids and codec DAIs during this init callback. Register for late probe and call the jack_init API which also registers channel map in the late probe callback handler. The patch following the machine driver changes adds the channel map control in the hdac_hdmi codec driver. Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * ASoC: hdac_hdmi: Add multichannel supportSubhransu S. Prusty2016-04-281-9/+41
| | | | | | | | | | | | | | | | | | | | | | | | To support multichannel hdac hdmi driver registers with HDA channel map framework. Channel count and channel slot verbs are programmed by using the chmap helpers/ops. The channel allocation is then programmed in the audio infoframe as per CEA spec. Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * ASoC: hdac_hdmi: parse eld for channel map capabilitySubhransu S. Prusty2016-04-281-0/+13
| | | | | | | | | | | | | | | | | | This patch parses ELD speaker allocation data block to find sink's chmap capability. Signed-off-by: Subhransu S. Prusty <subhransu.s.prusty@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * ASoC: hdmi-codec: Add ELD controlPhilipp Zabel2016-04-221-2/+0
| | | | | | | | Signed-off-by: Mark Brown <broonie@kernel.org>
| * ASoC: hdmi-codec: Add ELD controlPhilipp Zabel2016-04-211-0/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ALSA doesn't know about all the different compressed audio formats, so there is no interface to let userspace enumerate the formats that are supported by the connected sink. Exporting the raw ELD bytes to userspace allows an application to select the appropriate audio format depending on the current capabilities of the connected HDMI sink device. Usually userspace then just pretends to ALSA that the data is in one of the raw 16-bit PCM audio formats and relies on the IEC controls to tell the sink how to interpret the data. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Jyri Sarha <jsarha@ti.com> Tested-by: Jyri Sarha <jsarha@ti.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * ASoC: hdmi-codec: Add hdmi-codec for external HDMI-encodersJyri Sarha2016-04-183-0/+404
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The hdmi-codec is a platform device driver to be registered from drivers of external HDMI encoders with I2S and/or spdif interface. The driver in turn registers an ASoC codec for the HDMI encoder's audio functionality. The structures and definitions in the API header are mostly redundant copies of similar structures in ASoC headers. This is on purpose to avoid direct dependencies to ASoC structures in video side driver. Signed-off-by: Jyri Sarha <jsarha@ti.com> Acked-by: Arnaud Pouliquen <arnaud.pouliquen@st.com> Acked-by: PC Liao <pc.liao@mediatek.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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*-------. \ Merge remote-tracking branches 'asoc/topic/es8328', 'asoc/topic/find-dai', ↵Mark Brown2016-05-135-64/+271
|\ \ \ \ \ \ | | | | |_|/ | | | |/| | | | | | | | 'asoc/topic/fsl', 'asoc/topic/fsl-sai' and 'asoc/topic/fsl-ssi' into asoc-next
| | | | | * ASoC: fsl_ssi: Fix channel slipping on capture (or playback) restart in full ↵Arnaud Mouiche2016-05-131-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | duplex. Happened when the Playback (or Capture) is running continuously and Capture (or Playback) is restarted (xrun, manual stop/start...) Since the RX (or TX) FIFO are only reset when the whole SSI is disabled, pending samples from previous capture (or playback) session may still be present. They must be erased to not introduce channel slipping. FIFO Clear register fields are documented in IMX51, IMX35 reference manual. They are not documented in IMX50 or IMX6 RM, despite they are working as expected on IMX6SL and IMX6solo. Signed-off-by: Arnaud Mouiche <arnaud.mouiche@invoxia.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Tested-by: Caleb Crome <caleb@crome.org> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | | | * ASoC: fsl_ssi: Fix channel slipping in Playback at startupArnaud Mouiche2016-05-131-1/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously, SCR.SSIEN and SCR.TE were enabled at once if no capture stream was also running. This may not give a chance for the DMA to write the first sample in TX FIFO before the streaming starts on the PCM bus, inserting void samples first. Those void samples are then responsible for slipping the channels. Signed-off-by: Arnaud Mouiche <arnaud.mouiche@invoxia.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Tested-by: Caleb Crome <caleb@crome.org> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | | | * ASoC: fsl_ssi: Fix samples being dropped at Playback startupArnaud Mouiche2016-05-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the capture is already running while playback is started, it is highly probable (>80% in a 8 channels scenario) that samples are lost between the DMA and TX fifo. The reason is that SIER.TDMAE is set before STCR.TFEN0, leaving a time window where the FIFO doesn't receive the samples written by the DMA. This particular case happened only if capture is already enabled as SCR.SSIEN is already set at the playback startup instant. Signed-off-by: Arnaud Mouiche <arnaud.mouiche@invoxia.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Tested-by: Caleb Crome <caleb@crome.org> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | | | * ASoC: fsl_ssi: Save a dev reference for dev_err() purpose.Arnaud Mouiche2016-05-131-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Most of functions only receive the ssi_private reference and don't have a knowledge of 'dev' pointer, even for debug purpose. Signed-off-by: Arnaud Mouiche <arnaud.mouiche@invoxia.com> Tested-by: Caleb Crome <caleb@crome.org> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | | | * ASoC: fsl_ssi: The IPG/5 limitation concerns the bitclk, not the sysclk.Arnaud Mouiche2016-05-131-7/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | im6sl reference manual 47.7.4: " Bit clock - Used to serially clock the data bits in and out of the SSI port. This clock is either generated internally (from SSI's sys clock) or taken from external clock source (through the Tx/Rx clock ports). [...] Care should be taken to ensure that the bit clock frequency (either internally generated by dividing the SSI's sys clock or sourced from external device through Tx/Rx clock ports) is never greater than 1/5 of the ipg_clk (from CCM) frequency. " Since, in master mode, the sysclk is a multiple of bitclk, we can easily reach a high sysclk value, whereas keeping a reasonable bitclk. ex: 8ch x 16bit x 48kHz = 6144000, requires a 24576000 sysclk (PM=1) yet ipg_clk/5 = 66Mhz/5 = 13.2 Signed-off-by: Arnaud Mouiche <arnaud.mouiche@invoxia.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Tested-by: Caleb Crome <caleb@crome.org> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | | | * ASoC: fsl_ssi: Real hardware channels max number is 32Arnaud Mouiche2016-05-131-2/+2
| | | | |/ | | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The max number of slots in TDM mode is 32: - Frame Rate Divider Control is a 5bit value - Time slot mask registers control 32 slots. Signed-off-by: Arnaud Mouiche <arnaud.mouiche@invoxia.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Tested-by: Caleb Crome <caleb@crome.org> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | | * ASoC: fsl_sai: Allow setting the SAI MCLK directionFabio Estevam2016-05-051-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On mx6ul the General Purpose Register 1 (GPR1) contains the following bits for configuring the direction of the SAI MCLKs: SAI1_MCLK_DIR, SAI2_MCLK_DIR, SAI3_MCLK_DIR Introduce the "fsl,sai-mclk-direction-output" optional property to allow configuring the SAI_MCLK outputs. Tested on a imx6ul-evk board. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Acked-by: Nicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | | * ASoC: fsl_sai: Introduce a compatible string for MX6ULFabio Estevam2016-05-051-1/+3
| | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MX6UL may need to configure the General Purpose Register 1 (GPR1), so it is better to add a new compatible string to differentiate. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Acked-by: Nicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | ASoC: Add kerneldoc comments for snd_soc_find_daiMengdong Lin2016-04-221-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | snd_soc_find_dai() has been exported and so add the kerneldoc comments for it. Signed-off-by: Mengdong Lin <mengdong.lin@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | ASoC: Export snd_soc_find_dai()Mengdong Lin2016-04-201-1/+2
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | This API can be used by topology to find an existing BE dai by name and further configure it. Topology will also check DAI ID to avoid wrong match. Signed-off-by: Mengdong Lin <mengdong.lin@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | ASoC: es8328: Set symmetric ratesJohn Keeping2016-05-101-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Although the ES8328 does support different rates for capture and playback, only very limited combinations are supported (8kHz and 48kHz or 8.0182kHz and 44.1kHz) with most rates required to be symmetric. Instead of adding a lot of complexity for little gain, let's enforce symmetric rates. Signed-off-by: John Keeping <john@metanate.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | ASoC: es8328: Support more sample ratesJohn Keeping2016-05-101-35/+100
| | | | | | | | | | | | | | | Signed-off-by: John Keeping <john@metanate.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | ASoC: es8328: Support more sample formatsJohn Keeping2016-05-102-16/+31
| | | | | | | | | | | | | | | | | | | | | | | | The values are the same for the DAC and ADC so remove the specific values and use values with shifts. Signed-off-by: John Keeping <john@metanate.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | ASoC: es8328: Move sample size setup to hw_paramsJohn Keeping2016-05-102-5/+18
| | | | | | | | | | | | | | | | | | | | | | | | This is a refactor in preparation for supporting more sample sizes which has no functional change. Signed-off-by: John Keeping <john@metanate.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | ASoC: es8328: Use single R/W for regmapJohn Keeping2016-05-101-0/+1
| | | | | | | | | | | | | | | | | | | | | The chip only supports single reads and writes. Signed-off-by: John Keeping <john@metanate.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | ASoC: es8328: Fix mask for VMIDSELJohn Keeping2016-05-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | This is always used along with ES8328_CONTROL1_ENREF so there is no change in the generated code as a result of this fix. Signed-off-by: John Keeping <john@metanate.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | ASoC: es8328: Fix ADC format setupJohn Keeping2016-05-102-6/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ADCCONTROL4 and DACCONTROL1 registers are similar but not identical, with the DACCONTROL1 having each field starting one bit higher than ADCCONTROL4. Instead of introducing a magic shift, add new constants for the values in ADCCONTROL4 and use a second variable to setup the ADC. Signed-off-by: John Keeping <john@metanate.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | ASoC: es8328: Move clock setup to hw_paramsJohn Keeping2016-05-101-15/+16
| |/ | | | | | | | | | | | | | | | | This ensures that the clock is setup after its frequency has been set; the existing code in set_dai_fmt may be called before the clock rate has been set resulting in an incorrect configuration. Signed-off-by: John Keeping <john@metanate.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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*-. \ Merge remote-tracking branches 'asoc/topic/davinci' and 'asoc/topic/dwc' ↵Mark Brown2016-05-135-63/+132
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| | * | ASoC: dwc: Use fifo depth to program FCRJose Abreu2016-04-071-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch makes Designware I2S driver use the fifo depth value to program the fifo configuration register instead of using hardcoded values. Signed-off-by: Jose Abreu <joabreu@synopsys.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | ASoC: dwc: Unmask I2S interrupts only for enabled channelsJose Abreu2016-04-051-2/+3
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no need to unmask all interrupts at I2S start. This can cause performance issues in slower platforms. Unmask only the interrupts for the used channels. Signed-off-by: Jose Abreu <joabreu@synopsys.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | ASoC: davinci-mcasp: Calculate AUXCLK divider when setting up master clocksPeter Ujfalusi2016-05-091-4/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the McASP is used as clock master and the reference clock is AUXCLK we can have additional level of divider. The BCLK divider is limited to maximum 32, if the desired bclk can not be reached with this, the AUXCLK divider also needs to be used. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | ASoC: davinci-mcasp: Restructure the davinci_mcasp_calc_clk_div()Peter Ujfalusi2016-05-091-19/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | Change the return value to error_pmm instead of the BCLK div and handle the divider configuration to McASP within the function when the set flag is true. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | ASoC: davinci-mcasp: Change __davinci_mcasp_set_clkdiv() first parameterPeter Ujfalusi2016-05-091-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | Change the first parameter to struct davinci_mcasp* from struct snd_soc_dai* The function internally does not use or need the DAI information. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | ASoC: davinci-mcasp: Use defines for clkdiv IDsPeter Ujfalusi2016-05-092-3/+9
| | | | | | | | | | | | | | | | | | | | | Instead of hardwired IDs add defines for the available dividers. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | ASoC: davinci-mcasp: Do not allow multiple streams in one directionPeter Ujfalusi2016-05-091-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | Make sure that the user can not start multiple streams with the same direction. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | ASoC: Davinci: McBSP: add device tree support for McBSPPetr Kulhavy2016-04-182-27/+59
| |/ | | | | | | | | | | | | | | This adds DT support for the TI DA8xx/OMAP-L1x/AM17xx/AM18xx McBSP driver. Signed-off-by: Petr Kulhavy <petr@barix.com> Reviewed-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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*-------. \ Merge remote-tracking branches 'asoc/topic/bcm2835', 'asoc/topic/cs42l56', ↵Mark Brown2016-05-138-86/+188
|\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | 'asoc/topic/da7213', 'asoc/topic/da7218' and 'asoc/topic/da7219' into asoc-next
| | | | | * | ASoC: da7129: Add missing include of acpi.hMark Brown2016-05-061-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | | | * | ASoC: da7219: Add initial ACPI id for deviceAdam Thomson2016-05-051-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds "DLGS7219" ACPI id for the codec. Signed-off-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com> Tested-by: Sathyanarayana Nujella <sathyanarayana.nujella@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | | | * | ASoC: da7219: Disallow unsupported 32KHz clock setting in set_dai_sysclk()Adam Thomson2016-04-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PLL function was updated to disallow 32KHz in commit 501f72e9c520 ("ASoC: da7219: Remove support for 32KHz PLL mode"), but set_dai_sysclk() was missed and still permits it. This patch resolves that discrepancy. Signed-off-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | | | * | ASoC: da7219: Update PLL ranges and dividers to improve lockingAdam Thomson2016-04-192-24/+24
| | | | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The expected MCLK frequency ranges and the associated dividers are updated to improve PLL locking in a corner scenario, with low MCLK frequency near an input divider change boundary. Signed-off-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | | * / ASoC: da7218: Update PLL ranges and dividers to improve lockingAdam Thomson2016-04-222-25/+28
| | | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The expected MCLK frequency ranges and the associated dividers are updated to improve PLL locking in a corner scenario, with low MCLK frequency near an input divider change boundary. Signed-off-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com> Signed-off-by: Mark Brown <broonie@kernel.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-09 22:29:21 +0000