arch/arm/boot/dts/kirkwood-rd88f6281.dtsi


1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152

/*
 * Marvell RD88F6181 Common Board descrition
 *
 * Andrew Lunn <andrew@lunn.ch>
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2.  This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 *
 * This file contains the definitions that are common between the two
 * variants of the Marvell Kirkwood Development Board.
 */

#include "kirkwood.dtsi"
#include "kirkwood-6281.dtsi"

/ {
	memory {
		device_type = "memory";
		reg = <0x00000000 0x20000000>;
	};

	chosen {
		bootargs = "console=ttyS0,115200n8";
	};

	mbus {
		pcie-controller {
			status = "okay";

			pcie@1,0 {
				status = "okay";
			};
		};
	};

	ocp@f1000000 {
		pinctrl: pinctrl@10000 {
			pinctrl-0 = <&pmx_sdio_cd>;
			pinctrl-names = "default";

			pmx_sdio_cd: pmx-sdio-cd {
				marvell,pins = "mpp28";
				marvell,function = "gpio";
			};
		};

		serial@12000 {
			status = "okay";

		};

		sata@80000 {
			status = "okay";
			nr-ports = <2>;
		};
		mvsdio@90000 {
			pinctrl-0 = <&pmx_sdio &pmx_sdio_cd>;
			pinctrl-names = "default";
			status = "okay";
			cd-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
			/* No WP GPIO */
		};
	};

	dsa@0 {
		compatible = "marvell,dsa";
		#address-cells = <2>;
		#size-cells = <0>;

		dsa,ethernet = <&eth0>;
		dsa,mii-bus = <&ethphy1>;

		switch@0 {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				label = "lan1";
			};

			port@1 {
				reg = <1>;
				label = "lan2";
			};

			port@2 {
				reg = <2>;
				label = "lan3";
			};

			port@3 {
				reg = <3>;
				label = "lan4";
			};

			port@5 {
				reg = <5>;
				label = "cpu";
			};
		};
       };
};

&nand {
	status = "okay";

	partition@0 {
		label = "u-boot";
		reg = <0x0000000 0x100000>;
		read-only;
	};

	partition@100000 {
		label = "uImage";
		reg = <0x0100000 0x200000>;
	};

	partition@300000 {
		label = "data";
		reg = <0x0300000 0x500000>;
	};
};

&mdio {
	status = "okay";

	ethphy0: ethernet-phy@0 {
		reg = <0>;
	};

	ethphy1: ethernet-phy@ff {
		reg = <0xff>; /* No PHY attached */
		speed = <1000>;
		duple = <1>;
	};
};

&eth0 {
	status = "okay";
	ethernet0-port@0 {
		phy-handle = <&ethphy0>;
	};
};

&eth1 {
	status = "okay";
	ethernet1-port@0 {
		phy-handle = <&ethphy1>;
	};
};