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authorJoakim Tjernlund <joakim.tjernlund@infinera.com>2017-10-11 12:40:55 +0200
committerLee Jones <lee.jones@linaro.org>2017-10-24 09:12:03 +0100
commit07d70913dce59f3c8e5d0ca76250861158a9ca6c (patch)
tree1774c886dbaec33f7f68d4b831d557bcdb7eb1ca
parentb2b3adc93e9e46554bedf26f2ee081126c2b8a22 (diff)
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mfd: lpc_ich: Avoton/Rangeley uses SPI_BYT method
Avoton/Rangeley are based on Silvermount micro-architecture, like Bay Trail, and uses the INTEL_SPI_BYT method to drive SPI. Cc: stable@vger.kernel.org Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
-rw-r--r--drivers/mfd/lpc_ich.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/mfd/lpc_ich.c b/drivers/mfd/lpc_ich.c
index 450ae36645aa..cf1120abbf52 100644
--- a/drivers/mfd/lpc_ich.c
+++ b/drivers/mfd/lpc_ich.c
@@ -522,6 +522,7 @@ static struct lpc_ich_info lpc_chipset_info[] = {
.name = "Avoton SoC",
.iTCO_version = 3,
.gpio_version = AVOTON_GPIO,
+ .spi_type = INTEL_SPI_BYT,
},
[LPC_BAYTRAIL] = {
.name = "Bay Trail SoC",