diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2024-07-19 15:46:29 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2024-07-19 15:46:29 -0700 |
| commit | 09ea8089abb5d851ce08a9b1a43706e42ef39db2 (patch) | |
| tree | 0942f261cbeb80851a69809d62726c7cfd4b4bb7 | |
| parent | 04d17331ca33744e1426fdeee7ba5e975c4b2239 (diff) | |
| parent | 104e004739ef03890a1e175b3c2672d50c6d1a6a (diff) | |
| download | linux-09ea8089abb5d851ce08a9b1a43706e42ef39db2.tar.gz linux-09ea8089abb5d851ce08a9b1a43706e42ef39db2.tar.bz2 linux-09ea8089abb5d851ce08a9b1a43706e42ef39db2.zip | |
Merge tag 'staging-6.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging
Pull staging driver updates from Greg KH:
"This is the "big" staging driver update for 6.11-rc1. Not really all
that much happened this release cycle, just lots of tiny cleanups,
overall about 3000 lines removed, so the cleanups were worth it.
Included in here are:
- loads of rtl8723bs driver cleanups
- lots of rtl8192e driver cleanups
- vc04_services reworks and cleanups as that codebase gets slowly
evolved into something that will make it into the "real" part of
the kernel hopefully soon.
- other tiny staging driver cleanups
All of these have been in linux-next for a while with no reported
issues"
* tag 'staging-6.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: (124 commits)
staging: rtl8723bs: Remove constant result function CheckNegative()
staging: rtl8723bs: Remove unused macros in rtw_mlme_ext.h
staging: rtl8723bs: Remove unused macros in hal_pwr_seq.h
staging: rtl8723bs: Remove unused macros in rtw_efuse.h
staging: rtl8723bs: Remove unused macros in rtw_mlme.h
staging: rtl8723bs: Remove unused macros in HalPwrSeqCmd.h
staging: rtl8723bs: Remove unused macros in Hal8723BReg.h
staging: rtl8723bs: Remove unused macros in Hal8192CPhyReg.h
staging: rtl8723bs: Delete file hal_phy_reg_8723b.h
staging: rtl8723bs: Move last macro from hal_phy_reg_8723b.h
staging: rtl8723bs: Remove unused macros in hal_phy_reg_8723b.h
staging: rtl8723bs: Remove unused macros in hal_com_reg.h
staging: rtl8723bs: Remove unused macros in rtw_ht.h
staging: rtl8723bs: Remove unused macros in hal_com_h2c.h
staging: vc04_services: vchiq_core: Stop kthreads on vchiq module unload
staging: vchiq_core: Bubble up wait_event_interruptible() return value
staging: nvec: Use x instead of x != NULL to improve readability.
staging: rtl8192e: Fix conflicting types error with net_device.
staging: rtl8723bs: Remove unused variable pwdev_priv
staging: vc04_services: Update testing instructions
...
87 files changed, 616 insertions, 3622 deletions
diff --git a/drivers/staging/fbtft/fbtft-core.c b/drivers/staging/fbtft/fbtft-core.c index c8d52c63d79f..8e2fd0c0fee2 100644 --- a/drivers/staging/fbtft/fbtft-core.c +++ b/drivers/staging/fbtft/fbtft-core.c @@ -1276,4 +1276,5 @@ void fbtft_remove_common(struct device *dev, struct fb_info *info) } EXPORT_SYMBOL(fbtft_remove_common); +MODULE_DESCRIPTION("Core FB support for small TFT LCD display modules"); MODULE_LICENSE("GPL"); diff --git a/drivers/staging/greybus/audio_manager.c b/drivers/staging/greybus/audio_manager.c index fa43d35bbcec..27ca5f796c5f 100644 --- a/drivers/staging/greybus/audio_manager.c +++ b/drivers/staging/greybus/audio_manager.c @@ -182,5 +182,6 @@ static void __exit manager_exit(void) module_init(manager_init); module_exit(manager_exit); +MODULE_DESCRIPTION("Greybus audio operations manager"); MODULE_LICENSE("GPL"); MODULE_AUTHOR("Svetlin Ankov <ankov_svetlin@projectara.com>"); diff --git a/drivers/staging/greybus/audio_topology.c b/drivers/staging/greybus/audio_topology.c index 5dc4721105d4..6ca938dca4fd 100644 --- a/drivers/staging/greybus/audio_topology.c +++ b/drivers/staging/greybus/audio_topology.c @@ -10,12 +10,6 @@ #define GBAUDIO_INVALID_ID 0xFF -/* mixer control */ -struct gb_mixer_control { - int min, max; - unsigned int reg, rreg, shift, rshift, invert; -}; - struct gbaudio_ctl_pvt { unsigned int ctl_id; unsigned int data_cport; diff --git a/drivers/staging/greybus/bootrom.c b/drivers/staging/greybus/bootrom.c index c0d338db6b52..d4d86b3898de 100644 --- a/drivers/staging/greybus/bootrom.c +++ b/drivers/staging/greybus/bootrom.c @@ -522,4 +522,5 @@ static struct greybus_driver gb_bootrom_driver = { module_greybus_driver(gb_bootrom_driver); +MODULE_DESCRIPTION("BOOTROM Greybus driver"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/staging/greybus/camera.c b/drivers/staging/greybus/camera.c index b8b2bdfa59e5..ca71023df447 100644 --- a/drivers/staging/greybus/camera.c +++ b/drivers/staging/greybus/camera.c @@ -1374,4 +1374,5 @@ static struct greybus_driver gb_camera_driver = { module_greybus_driver(gb_camera_driver); +MODULE_DESCRIPTION("Greybus Camera protocol driver."); MODULE_LICENSE("GPL v2"); diff --git a/drivers/staging/greybus/gbphy.c b/drivers/staging/greybus/gbphy.c index d827f03f5253..d992db8d45cb 100644 --- a/drivers/staging/greybus/gbphy.c +++ b/drivers/staging/greybus/gbphy.c @@ -354,4 +354,5 @@ static void __exit gbphy_exit(void) } module_exit(gbphy_exit); +MODULE_DESCRIPTION("Greybus Bridged-Phy Bus driver"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/staging/greybus/gpio.c b/drivers/staging/greybus/gpio.c index 5217aacfcf54..9b26e148d40f 100644 --- a/drivers/staging/greybus/gpio.c +++ b/drivers/staging/greybus/gpio.c @@ -631,4 +631,5 @@ static struct gbphy_driver gpio_driver = { }; module_gbphy_driver(gpio_driver); +MODULE_DESCRIPTION("GPIO Greybus driver"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/staging/greybus/hid.c b/drivers/staging/greybus/hid.c index 15335c38cb26..63c77a3df591 100644 --- a/drivers/staging/greybus/hid.c +++ b/drivers/staging/greybus/hid.c @@ -516,4 +516,5 @@ static struct greybus_driver gb_hid_driver = { }; module_greybus_driver(gb_hid_driver); +MODULE_DESCRIPTION("HID class driver for the Greybus"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/staging/greybus/i2c.c b/drivers/staging/greybus/i2c.c index 22325ab9d652..14f1ff6d448c 100644 --- a/drivers/staging/greybus/i2c.c +++ b/drivers/staging/greybus/i2c.c @@ -318,4 +318,5 @@ static struct gbphy_driver i2c_driver = { }; module_gbphy_driver(i2c_driver); +MODULE_DESCRIPTION("I2C bridge driver for the Greybus 'generic' I2C module"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/staging/greybus/light.c b/drivers/staging/greybus/light.c index 00360f4a0485..e509fdc715db 100644 --- a/drivers/staging/greybus/light.c +++ b/drivers/staging/greybus/light.c @@ -1339,4 +1339,5 @@ static struct greybus_driver gb_lights_driver = { }; module_greybus_driver(gb_lights_driver); +MODULE_DESCRIPTION("Greybus Lights protocol driver"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/staging/greybus/log.c b/drivers/staging/greybus/log.c index 971f36dccac6..57dcf9453bf1 100644 --- a/drivers/staging/greybus/log.c +++ b/drivers/staging/greybus/log.c @@ -129,4 +129,5 @@ static struct greybus_driver gb_log_driver = { }; module_greybus_driver(gb_log_driver); +MODULE_DESCRIPTION("Greybus driver for the log protocol"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/staging/greybus/loopback.c b/drivers/staging/greybus/loopback.c index 4313d3bbc23a..1f19323b0e1a 100644 --- a/drivers/staging/greybus/loopback.c +++ b/drivers/staging/greybus/loopback.c @@ -1175,4 +1175,5 @@ static void __exit loopback_exit(void) } module_exit(loopback_exit); +MODULE_DESCRIPTION("Loopback bridge driver for the Greybus loopback module"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/staging/greybus/power_supply.c b/drivers/staging/greybus/power_supply.c index 75cb170e05fb..2ef46822f676 100644 --- a/drivers/staging/greybus/power_supply.c +++ b/drivers/staging/greybus/power_supply.c @@ -1136,4 +1136,5 @@ static struct greybus_driver gb_power_supply_driver = { }; module_greybus_driver(gb_power_supply_driver); +MODULE_DESCRIPTION("Power Supply driver for a Greybus module"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/staging/greybus/pwm.c b/drivers/staging/greybus/pwm.c index 01883fbcd79b..1cb7b9089ead 100644 --- a/drivers/staging/greybus/pwm.c +++ b/drivers/staging/greybus/pwm.c @@ -327,4 +327,5 @@ static struct gbphy_driver pwm_driver = { }; module_gbphy_driver(pwm_driver); +MODULE_DESCRIPTION("PWM Greybus driver"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/staging/greybus/raw.c b/drivers/staging/greybus/raw.c index 836d35e5fa85..71de6776739c 100644 --- a/drivers/staging/greybus/raw.c +++ b/drivers/staging/greybus/raw.c @@ -377,4 +377,5 @@ static void __exit raw_exit(void) } module_exit(raw_exit); +MODULE_DESCRIPTION("Greybus driver for the Raw protocol"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/staging/greybus/sdio.c b/drivers/staging/greybus/sdio.c index 25bee5335c70..5326ea372b24 100644 --- a/drivers/staging/greybus/sdio.c +++ b/drivers/staging/greybus/sdio.c @@ -880,4 +880,5 @@ static struct gbphy_driver sdio_driver = { }; module_gbphy_driver(sdio_driver); +MODULE_DESCRIPTION("SD/MMC Greybus driver"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/staging/greybus/spi.c b/drivers/staging/greybus/spi.c index 68e8d272db6d..45ea8d1bdd51 100644 --- a/drivers/staging/greybus/spi.c +++ b/drivers/staging/greybus/spi.c @@ -75,4 +75,5 @@ static struct gbphy_driver spi_driver = { }; module_gbphy_driver(spi_driver); +MODULE_DESCRIPTION("Greybus SPI bridge PHY driver"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/staging/greybus/spilib.c b/drivers/staging/greybus/spilib.c index 34f10685139f..0e4ae01eb00f 100644 --- a/drivers/staging/greybus/spilib.c +++ b/drivers/staging/greybus/spilib.c @@ -567,4 +567,5 @@ void gb_spilib_master_exit(struct gb_connection *connection) } EXPORT_SYMBOL_GPL(gb_spilib_master_exit); +MODULE_DESCRIPTION("Greybus SPI library"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/staging/greybus/uart.c b/drivers/staging/greybus/uart.c index 999ce613dca8..cdf4ebb93b10 100644 --- a/drivers/staging/greybus/uart.c +++ b/drivers/staging/greybus/uart.c @@ -1024,4 +1024,5 @@ static void gb_uart_driver_exit(void) } module_exit(gb_uart_driver_exit); +MODULE_DESCRIPTION("UART driver for the Greybus 'generic' UART module"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/staging/greybus/usb.c b/drivers/staging/greybus/usb.c index b7badf87a3f0..475f24f20cd4 100644 --- a/drivers/staging/greybus/usb.c +++ b/drivers/staging/greybus/usb.c @@ -242,4 +242,5 @@ static struct gbphy_driver usb_driver = { }; module_gbphy_driver(usb_driver); +MODULE_DESCRIPTION("USB host driver for the Greybus 'generic' USB module"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/staging/greybus/vibrator.c b/drivers/staging/greybus/vibrator.c index 89bef8045549..ee112aa13ff1 100644 --- a/drivers/staging/greybus/vibrator.c +++ b/drivers/staging/greybus/vibrator.c @@ -245,4 +245,5 @@ static __exit void gb_vibrator_exit(void) } module_exit(gb_vibrator_exit); +MODULE_DESCRIPTION("Greybus Vibrator protocol driver"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/staging/nvec/nvec.c b/drivers/staging/nvec/nvec.c index e5ca78e57384..d09211589d1c 100644 --- a/drivers/staging/nvec/nvec.c +++ b/drivers/staging/nvec/nvec.c @@ -300,7 +300,7 @@ int nvec_write_sync(struct nvec_chip *nvec, { mutex_lock(&nvec->sync_write_mutex); - if (msg != NULL) + if (msg) *msg = NULL; nvec->sync_write_pending = (data[1] << 8) + data[0]; @@ -322,7 +322,7 @@ int nvec_write_sync(struct nvec_chip *nvec, dev_dbg(nvec->dev, "nvec_sync_write: pong!\n"); - if (msg != NULL) + if (msg) *msg = nvec->last_sync_msg; else nvec_msg_free(nvec, nvec->last_sync_msg); @@ -571,6 +571,22 @@ static void nvec_tx_set(struct nvec_chip *nvec) } /** + * tegra_i2c_writel - safely write to an I2C client controller register + * @val: value to be written + * @reg: register to write to + * + * A write to an I2C controller register needs to be read back to make sure + * that the value has arrived. + */ +static void tegra_i2c_writel(u32 val, void *reg) +{ + writel_relaxed(val, reg); + + /* read back register to make sure that register writes completed */ + readl_relaxed(reg); +} + +/** * nvec_interrupt - Interrupt handler * @irq: The IRQ * @dev: The nvec device @@ -604,7 +620,7 @@ static irqreturn_t nvec_interrupt(int irq, void *dev) if ((status & RNW) == 0) { received = readl(nvec->base + I2C_SL_RCVD); if (status & RCVD) - writel(0, nvec->base + I2C_SL_RCVD); + tegra_i2c_writel(0, nvec->base + I2C_SL_RCVD); } if (status == (I2C_SL_IRQ | RCVD)) @@ -696,7 +712,7 @@ static irqreturn_t nvec_interrupt(int irq, void *dev) /* Send data if requested, but not on end of transmission */ if ((status & (RNW | END_TRANS)) == RNW) - writel(to_send, nvec->base + I2C_SL_RCVD); + tegra_i2c_writel(to_send, nvec->base + I2C_SL_RCVD); /* If we have send the first byte */ if (status == (I2C_SL_IRQ | RNW | RCVD)) @@ -713,15 +729,6 @@ static irqreturn_t nvec_interrupt(int irq, void *dev) status & RCVD ? " RCVD" : "", status & RNW ? " RNW" : ""); - /* - * TODO: replace the udelay with a read back after each writel above - * in order to work around a hardware issue, see i2c-tegra.c - * - * Unfortunately, this change causes an initialisation issue with the - * touchpad, which needs to be fixed first. - */ - udelay(100); - return IRQ_HANDLED; } @@ -737,15 +744,15 @@ static void tegra_init_i2c_slave(struct nvec_chip *nvec) val = I2C_CNFG_NEW_MASTER_SFM | I2C_CNFG_PACKET_MODE_EN | (0x2 << I2C_CNFG_DEBOUNCE_CNT_SHIFT); - writel(val, nvec->base + I2C_CNFG); + tegra_i2c_writel(val, nvec->base + I2C_CNFG); clk_set_rate(nvec->i2c_clk, 8 * 80000); - writel(I2C_SL_NEWSL, nvec->base + I2C_SL_CNFG); - writel(0x1E, nvec->base + I2C_SL_DELAY_COUNT); + tegra_i2c_writel(I2C_SL_NEWSL, nvec->base + I2C_SL_CNFG); + tegra_i2c_writel(0x1E, nvec->base + I2C_SL_DELAY_COUNT); - writel(nvec->i2c_addr >> 1, nvec->base + I2C_SL_ADDR1); - writel(0, nvec->base + I2C_SL_ADDR2); + tegra_i2c_writel(nvec->i2c_addr >> 1, nvec->base + I2C_SL_ADDR1); + tegra_i2c_writel(0, nvec->base + I2C_SL_ADDR2); enable_irq(nvec->irq); } @@ -754,7 +761,7 @@ static void tegra_init_i2c_slave(struct nvec_chip *nvec) static void nvec_disable_i2c_slave(struct nvec_chip *nvec) { disable_irq(nvec->irq); - writel(I2C_SL_NEWSL | I2C_SL_NACK, nvec->base + I2C_SL_CNFG); + tegra_i2c_writel(I2C_SL_NEWSL | I2C_SL_NACK, nvec->base + I2C_SL_CNFG); clk_disable_unprepare(nvec->i2c_clk); } #endif diff --git a/drivers/staging/rtl8192e/rtl8192e/r8190P_def.h b/drivers/staging/rtl8192e/rtl8192e/r8190P_def.h index 8c85f1c866d3..d87bace0a19b 100644 --- a/drivers/staging/rtl8192e/rtl8192e/r8190P_def.h +++ b/drivers/staging/rtl8192e/rtl8192e/r8190P_def.h @@ -88,9 +88,7 @@ enum version_8190_loopback { VERSION_8190_BE }; -#define IC_VersionCut_C 0x2 #define IC_VersionCut_D 0x3 -#define IC_VersionCut_E 0x4 enum rf_optype { RF_OP_By_SW_3wire = 0, @@ -138,13 +136,6 @@ struct tx_fwinfo_8190pci { u32 PacketID:13; }; -struct phy_ofdm_rx_status_rxsc_sgien_exintfflag { - u8 reserved:4; - u8 rxsc:2; - u8 sgi_en:1; - u8 ex_intf_flag:1; -}; - struct phy_sts_ofdm_819xpci { u8 trsw_gain_X[4]; u8 pwdb_all; diff --git a/drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c b/drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c index fdf8fc66939d..b3d4b3394284 100644 --- a/drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c +++ b/drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c @@ -859,8 +859,8 @@ static u8 _rtl92e_query_is_short(u8 TxHT, u8 TxRate, struct cb_desc *tcb_desc) { u8 tmp_Short; - tmp_Short = (TxHT == 1) ? ((tcb_desc->bUseShortGI) ? 1 : 0) : - ((tcb_desc->bUseShortPreamble) ? 1 : 0); + tmp_Short = (TxHT == 1) ? ((tcb_desc->use_short_gi) ? 1 : 0) : + ((tcb_desc->use_short_preamble) ? 1 : 0); if (TxHT == 1 && TxRate != DESC90_RATEMCS15) tmp_Short = 0; @@ -892,18 +892,18 @@ void rtl92e_fill_tx_desc(struct net_device *dev, struct tx_desc *pdesc, pTxFwInfo->RxAMD = 0; } - pTxFwInfo->RtsEnable = (cb_desc->bRTSEnable) ? 1 : 0; - pTxFwInfo->CtsEnable = (cb_desc->bCTSEnable) ? 1 : 0; - pTxFwInfo->RtsSTBC = (cb_desc->bRTSSTBC) ? 1 : 0; + pTxFwInfo->RtsEnable = (cb_desc->rts_enable) ? 1 : 0; + pTxFwInfo->CtsEnable = (cb_desc->cts_enable) ? 1 : 0; + pTxFwInfo->RtsSTBC = (cb_desc->rtsstbc) ? 1 : 0; pTxFwInfo->RtsHT = (cb_desc->rts_rate & 0x80) ? 1 : 0; pTxFwInfo->RtsRate = _rtl92e_rate_mgn_to_hw(cb_desc->rts_rate); pTxFwInfo->RtsBandwidth = 0; pTxFwInfo->RtsSubcarrier = cb_desc->RTSSC; pTxFwInfo->RtsShort = (pTxFwInfo->RtsHT == 0) ? (cb_desc->rts_use_short_preamble ? 1 : 0) : - (cb_desc->bRTSUseShortGI ? 1 : 0); + (cb_desc->rts_use_short_gi ? 1 : 0); if (priv->current_chnl_bw == HT_CHANNEL_WIDTH_20_40) { - if (cb_desc->bPacketBW) { + if (cb_desc->packet_bw) { pTxFwInfo->TxBandwidth = 1; pTxFwInfo->TxSubCarrier = 0; } else { @@ -934,7 +934,7 @@ void rtl92e_fill_tx_desc(struct net_device *dev, struct tx_desc *pdesc, pdesc->NoEnc = 1; pdesc->SecType = 0x0; - if (cb_desc->bHwSec) { + if (cb_desc->hw_sec) { static u8 tmp; if (!tmp) @@ -1640,13 +1640,12 @@ bool rtl92e_get_rx_stats(struct net_device *dev, struct rtllib_rx_stats *stats, if (stats->Length < 24) stats->bHwError |= 1; - if (stats->bHwError) { + if (stats->bHwError) return false; - } stats->RxDrvInfoSize = pdesc->RxDrvInfoSize; stats->RxBufShift = (pdesc->Shift) & 0x03; - stats->Decrypted = !pdesc->SWDec; + stats->decrypted = !pdesc->SWDec; pDrvInfo = (struct rx_fwinfo *)(skb->data + stats->RxBufShift); diff --git a/drivers/staging/rtl8192e/rtl8192e/rtl_cam.h b/drivers/staging/rtl8192e/rtl8192e/rtl_cam.h index 615b84bca9b8..9deffdf96072 100644 --- a/drivers/staging/rtl8192e/rtl8192e/rtl_cam.h +++ b/drivers/staging/rtl8192e/rtl8192e/rtl_cam.h @@ -11,6 +11,7 @@ #define _RTL_CAM_H #include <linux/types.h> + struct net_device; void rtl92e_cam_reset(struct net_device *dev); diff --git a/drivers/staging/rtl8192e/rtl8192e/rtl_core.c b/drivers/staging/rtl8192e/rtl8192e/rtl_core.c index 08d057ab8f74..9eeae01dc98d 100644 --- a/drivers/staging/rtl8192e/rtl8192e/rtl_core.c +++ b/drivers/staging/rtl8192e/rtl8192e/rtl_core.c @@ -951,10 +951,10 @@ static void _rtl92e_watchdog_wq_cb(void *data) return; if (priv->rtllib->link_state >= MAC80211_LINKED) { - if (priv->rtllib->CntAfterLink < 2) - priv->rtllib->CntAfterLink++; + if (priv->rtllib->cnt_after_link < 2) + priv->rtllib->cnt_after_link++; } else { - priv->rtllib->CntAfterLink = 0; + priv->rtllib->cnt_after_link = 0; } rtl92e_dm_watchdog(dev); diff --git a/drivers/staging/rtl8192e/rtl8192e/rtl_dm.c b/drivers/staging/rtl8192e/rtl8192e/rtl_dm.c index aebe67f1a46d..0c7f38a4a7db 100644 --- a/drivers/staging/rtl8192e/rtl8192e/rtl_dm.c +++ b/drivers/staging/rtl8192e/rtl8192e/rtl_dm.c @@ -377,7 +377,7 @@ static void _rtl92e_dm_init_bandwidth_autoswitch(struct net_device *dev) priv->rtllib->bandwidth_auto_switch.threshold_20Mhzto40Mhz = BW_AUTO_SWITCH_LOW_HIGH; priv->rtllib->bandwidth_auto_switch.threshold_40Mhzto20Mhz = BW_AUTO_SWITCH_HIGH_LOW; - priv->rtllib->bandwidth_auto_switch.bforced_tx20Mhz = false; + priv->rtllib->bandwidth_auto_switch.forced_tx_20MHz = false; priv->rtllib->bandwidth_auto_switch.bautoswitch_enable = false; } @@ -388,14 +388,14 @@ static void _rtl92e_dm_bandwidth_autoswitch(struct net_device *dev) if (priv->current_chnl_bw == HT_CHANNEL_WIDTH_20 || !priv->rtllib->bandwidth_auto_switch.bautoswitch_enable) return; - if (!priv->rtllib->bandwidth_auto_switch.bforced_tx20Mhz) { + if (!priv->rtllib->bandwidth_auto_switch.forced_tx_20MHz) { if (priv->undecorated_smoothed_pwdb <= priv->rtllib->bandwidth_auto_switch.threshold_40Mhzto20Mhz) - priv->rtllib->bandwidth_auto_switch.bforced_tx20Mhz = true; + priv->rtllib->bandwidth_auto_switch.forced_tx_20MHz = true; } else { if (priv->undecorated_smoothed_pwdb >= priv->rtllib->bandwidth_auto_switch.threshold_20Mhzto40Mhz) - priv->rtllib->bandwidth_auto_switch.bforced_tx20Mhz = false; + priv->rtllib->bandwidth_auto_switch.forced_tx_20MHz = false; } } @@ -1335,51 +1335,52 @@ static void _rtl92e_dm_rx_path_sel_byrssi(struct net_device *dev) for (i = 0; i < RF90_PATH_MAX; i++) { dm_rx_path_sel_table.rf_rssi[i] = priv->stats.rx_rssi_percentage[i]; - if (priv->brfpath_rxenable[i]) { - rf_num++; - cur_rf_rssi = dm_rx_path_sel_table.rf_rssi[i]; + if (!priv->brfpath_rxenable[i]) + continue; - if (rf_num == 1) { - max_rssi_index = min_rssi_index = sec_rssi_index = i; - tmp_max_rssi = tmp_min_rssi = tmp_sec_rssi = cur_rf_rssi; - } else if (rf_num == 2) { - if (cur_rf_rssi >= tmp_max_rssi) { - tmp_max_rssi = cur_rf_rssi; - max_rssi_index = i; - } else { - tmp_sec_rssi = tmp_min_rssi = cur_rf_rssi; - sec_rssi_index = min_rssi_index = i; - } + rf_num++; + cur_rf_rssi = dm_rx_path_sel_table.rf_rssi[i]; + + if (rf_num == 1) { + max_rssi_index = min_rssi_index = sec_rssi_index = i; + tmp_max_rssi = tmp_min_rssi = tmp_sec_rssi = cur_rf_rssi; + } else if (rf_num == 2) { + if (cur_rf_rssi >= tmp_max_rssi) { + tmp_max_rssi = cur_rf_rssi; + max_rssi_index = i; } else { - if (cur_rf_rssi > tmp_max_rssi) { - tmp_sec_rssi = tmp_max_rssi; - sec_rssi_index = max_rssi_index; - tmp_max_rssi = cur_rf_rssi; - max_rssi_index = i; - } else if (cur_rf_rssi == tmp_max_rssi) { - tmp_sec_rssi = cur_rf_rssi; - sec_rssi_index = i; - } else if ((cur_rf_rssi < tmp_max_rssi) && - (cur_rf_rssi > tmp_sec_rssi)) { + tmp_sec_rssi = tmp_min_rssi = cur_rf_rssi; + sec_rssi_index = min_rssi_index = i; + } + } else { + if (cur_rf_rssi > tmp_max_rssi) { + tmp_sec_rssi = tmp_max_rssi; + sec_rssi_index = max_rssi_index; + tmp_max_rssi = cur_rf_rssi; + max_rssi_index = i; + } else if (cur_rf_rssi == tmp_max_rssi) { + tmp_sec_rssi = cur_rf_rssi; + sec_rssi_index = i; + } else if ((cur_rf_rssi < tmp_max_rssi) && + (cur_rf_rssi > tmp_sec_rssi)) { + tmp_sec_rssi = cur_rf_rssi; + sec_rssi_index = i; + } else if (cur_rf_rssi == tmp_sec_rssi) { + if (tmp_sec_rssi == tmp_min_rssi) { tmp_sec_rssi = cur_rf_rssi; sec_rssi_index = i; - } else if (cur_rf_rssi == tmp_sec_rssi) { - if (tmp_sec_rssi == tmp_min_rssi) { - tmp_sec_rssi = cur_rf_rssi; - sec_rssi_index = i; - } - } else if ((cur_rf_rssi < tmp_sec_rssi) && - (cur_rf_rssi > tmp_min_rssi)) { - ; - } else if (cur_rf_rssi == tmp_min_rssi) { - if (tmp_sec_rssi == tmp_min_rssi) { - tmp_min_rssi = cur_rf_rssi; - min_rssi_index = i; - } - } else if (cur_rf_rssi < tmp_min_rssi) { + } + } else if ((cur_rf_rssi < tmp_sec_rssi) && + (cur_rf_rssi > tmp_min_rssi)) { + ; + } else if (cur_rf_rssi == tmp_min_rssi) { + if (tmp_sec_rssi == tmp_min_rssi) { tmp_min_rssi = cur_rf_rssi; min_rssi_index = i; } + } else if (cur_rf_rssi < tmp_min_rssi) { + tmp_min_rssi = cur_rf_rssi; + min_rssi_index = i; } } } @@ -1387,59 +1388,52 @@ static void _rtl92e_dm_rx_path_sel_byrssi(struct net_device *dev) rf_num = 0; if (dm_rx_path_sel_table.cck_method == CCK_Rx_Version_2) { for (i = 0; i < RF90_PATH_MAX; i++) { - if (priv->brfpath_rxenable[i]) { - rf_num++; - cur_cck_pwdb = - dm_rx_path_sel_table.cck_pwdb_sta[i]; + if (!priv->brfpath_rxenable[i]) + continue; - if (rf_num == 1) { + rf_num++; + cur_cck_pwdb = dm_rx_path_sel_table.cck_pwdb_sta[i]; + + if (rf_num == 1) { + cck_rx_ver2_max_index = i; + cck_rx_ver2_sec_index = i; + tmp_cck_max_pwdb = cur_cck_pwdb; + tmp_cck_min_pwdb = cur_cck_pwdb; + tmp_cck_sec_pwdb = cur_cck_pwdb; + } else if (rf_num == 2) { + if (cur_cck_pwdb >= tmp_cck_max_pwdb) { + tmp_cck_max_pwdb = cur_cck_pwdb; cck_rx_ver2_max_index = i; + } else { + tmp_cck_sec_pwdb = cur_cck_pwdb; + tmp_cck_min_pwdb = cur_cck_pwdb; cck_rx_ver2_sec_index = i; + } + } else { + if (cur_cck_pwdb > tmp_cck_max_pwdb) { + tmp_cck_sec_pwdb = tmp_cck_max_pwdb; + cck_rx_ver2_sec_index = cck_rx_ver2_max_index; tmp_cck_max_pwdb = cur_cck_pwdb; - tmp_cck_min_pwdb = cur_cck_pwdb; + cck_rx_ver2_max_index = i; + } else if (cur_cck_pwdb == tmp_cck_max_pwdb) { tmp_cck_sec_pwdb = cur_cck_pwdb; - } else if (rf_num == 2) { - if (cur_cck_pwdb >= tmp_cck_max_pwdb) { - tmp_cck_max_pwdb = cur_cck_pwdb; - cck_rx_ver2_max_index = i; - } else { + cck_rx_ver2_sec_index = i; + } else if (PWDB_IN_RANGE) { + tmp_cck_sec_pwdb = cur_cck_pwdb; + cck_rx_ver2_sec_index = i; + } else if (cur_cck_pwdb == tmp_cck_sec_pwdb) { + if (tmp_cck_sec_pwdb == tmp_cck_min_pwdb) { tmp_cck_sec_pwdb = cur_cck_pwdb; - tmp_cck_min_pwdb = cur_cck_pwdb; cck_rx_ver2_sec_index = i; } - } else { - if (cur_cck_pwdb > tmp_cck_max_pwdb) { - tmp_cck_sec_pwdb = - tmp_cck_max_pwdb; - cck_rx_ver2_sec_index = - cck_rx_ver2_max_index; - tmp_cck_max_pwdb = cur_cck_pwdb; - cck_rx_ver2_max_index = i; - } else if (cur_cck_pwdb == - tmp_cck_max_pwdb) { - tmp_cck_sec_pwdb = cur_cck_pwdb; - cck_rx_ver2_sec_index = i; - } else if (PWDB_IN_RANGE) { - tmp_cck_sec_pwdb = cur_cck_pwdb; - cck_rx_ver2_sec_index = i; - } else if (cur_cck_pwdb == - tmp_cck_sec_pwdb) { - if (tmp_cck_sec_pwdb == - tmp_cck_min_pwdb) { - tmp_cck_sec_pwdb = - cur_cck_pwdb; - cck_rx_ver2_sec_index = - i; - } - } else if ((cur_cck_pwdb < tmp_cck_sec_pwdb) && - (cur_cck_pwdb > tmp_cck_min_pwdb)) { - ; - } else if (cur_cck_pwdb == tmp_cck_min_pwdb) { - if (tmp_cck_sec_pwdb == tmp_cck_min_pwdb) - tmp_cck_min_pwdb = cur_cck_pwdb; - } else if (cur_cck_pwdb < tmp_cck_min_pwdb) { + } else if ((cur_cck_pwdb < tmp_cck_sec_pwdb) && + (cur_cck_pwdb > tmp_cck_min_pwdb)) { + ; + } else if (cur_cck_pwdb == tmp_cck_min_pwdb) { + if (tmp_cck_sec_pwdb == tmp_cck_min_pwdb) tmp_cck_min_pwdb = cur_cck_pwdb; - } + } else if (cur_cck_pwdb < tmp_cck_min_pwdb) { + tmp_cck_min_pwdb = cur_cck_pwdb; } } } @@ -1758,7 +1752,7 @@ static void _rtl92e_dm_check_fsync(struct net_device *dev) if (priv->rtllib->link_state == MAC80211_LINKED) { if (priv->undecorated_smoothed_pwdb <= - RegC38_TH) { + REG_C38_TH) { if (reg_c38_State != RegC38_NonFsync_Other_AP) { rtl92e_writeb(dev, @@ -1769,7 +1763,7 @@ static void _rtl92e_dm_check_fsync(struct net_device *dev) RegC38_NonFsync_Other_AP; } } else if (priv->undecorated_smoothed_pwdb >= - (RegC38_TH + 5)) { + (REG_C38_TH + 5)) { if (reg_c38_State) { rtl92e_writeb(dev, rOFDM0_RxDetector3, diff --git a/drivers/staging/rtl8192e/rtl8192e/rtl_dm.h b/drivers/staging/rtl8192e/rtl8192e/rtl_dm.h index 84e673452be4..55641f17412b 100644 --- a/drivers/staging/rtl8192e/rtl8192e/rtl_dm.h +++ b/drivers/staging/rtl8192e/rtl8192e/rtl_dm.h @@ -33,8 +33,6 @@ #define RATE_ADAPTIVE_TH_LOW_40M 10 #define VERY_LOW_RSSI 15 -#define WA_IOT_TH_VAL 25 - #define E_FOR_TX_POWER_TRACK 300 #define TX_POWER_NEAR_FIELD_THRESH_HIGH 68 #define TX_POWER_NEAR_FIELD_THRESH_LOW 62 @@ -44,7 +42,7 @@ #define CURRENT_TX_RATE_REG 0x1e0 #define INITIAL_TX_RATE_REG 0x1e1 #define TX_RETRY_COUNT_REG 0x1ac -#define RegC38_TH 20 +#define REG_C38_TH 20 /*--------------------------Define Parameters-------------------------------*/ @@ -135,8 +133,6 @@ extern struct dig_t dm_digtable; extern const u32 dm_tx_bb_gain[TX_BB_GAIN_TABLE_LEN]; extern const u8 dm_cck_tx_bb_gain[CCK_TX_BB_GAIN_TABLE_LEN][8]; extern const u8 dm_cck_tx_bb_gain_ch14[CCK_TX_BB_GAIN_TABLE_LEN][8]; -/* Maps table index to iq amplify gain (dB, 12 to -24dB) */ -#define dm_tx_bb_gain_idx_to_amplify(idx) (-idx + 12) /*------------------------Export global variable----------------------------*/ diff --git a/drivers/staging/rtl8192e/rtl8192e/rtl_pci.h b/drivers/staging/rtl8192e/rtl8192e/rtl_pci.h index 866e0efbc4fd..3e39c4835ac8 100644 --- a/drivers/staging/rtl8192e/rtl8192e/rtl_pci.h +++ b/drivers/staging/rtl8192e/rtl8192e/rtl_pci.h @@ -14,6 +14,7 @@ #include <linux/pci.h> struct net_device; + bool rtl92e_check_adapter(struct pci_dev *pdev, struct net_device *dev); #endif diff --git a/drivers/staging/rtl8192e/rtl8192e/rtl_wx.c b/drivers/staging/rtl8192e/rtl8192e/rtl_wx.c index d131ef525f46..c21a0560410a 100644 --- a/drivers/staging/rtl8192e/rtl8192e/rtl_wx.c +++ b/drivers/staging/rtl8192e/rtl8192e/rtl_wx.c @@ -241,7 +241,7 @@ static int _rtl92e_wx_set_scan(struct net_device *dev, (ieee->link_state <= RTLLIB_ASSOCIATING_AUTHENTICATED)) return 0; if ((priv->rtllib->link_state == MAC80211_LINKED) && - (priv->rtllib->CntAfterLink < 2)) + (priv->rtllib->cnt_after_link < 2)) return 0; } diff --git a/drivers/staging/rtl8192e/rtl819x_HTProc.c b/drivers/staging/rtl8192e/rtl819x_HTProc.c index 9b0a981f6f22..e38cd0c9c013 100644 --- a/drivers/staging/rtl8192e/rtl819x_HTProc.c +++ b/drivers/staging/rtl8192e/rtl819x_HTProc.c @@ -496,7 +496,7 @@ void ht_on_assoc_rsp(struct rtllib_device *ieee) ieee->HTHighestOperaRate = ht_get_highest_mcs_rate(ieee, ieee->dot11ht_oper_rate_set, pMcsFilter); - ieee->HTCurrentOperaRate = ieee->HTHighestOperaRate; + ieee->ht_curr_op_rate = ieee->HTHighestOperaRate; ht_info->current_op_mode = pPeerHTInfo->opt_mode; } @@ -625,7 +625,7 @@ EXPORT_SYMBOL(HT_update_self_and_peer_setting); u8 ht_c_check(struct rtllib_device *ieee, u8 *pFrame) { if (ieee->ht_info->current_ht_support) { - if ((IsQoSDataFrame(pFrame) && frame_order(pFrame)) == 1) { + if ((is_qos_data_frame(pFrame) && frame_order(pFrame)) == 1) { netdev_dbg(ieee->dev, "HT CONTROL FILED EXIST!!\n"); return true; } diff --git a/drivers/staging/rtl8192e/rtl819x_TSProc.c b/drivers/staging/rtl8192e/rtl819x_TSProc.c index 9903fe3f3c77..ed6a488bc7ac 100644 --- a/drivers/staging/rtl8192e/rtl819x_TSProc.c +++ b/drivers/staging/rtl8192e/rtl819x_TSProc.c @@ -18,7 +18,7 @@ static void RxPktPendingTimeout(struct timer_list *t) unsigned long flags = 0; u8 index = 0; - bool bPktInBuf = false; + bool pkt_in_buf = false; spin_lock_irqsave(&(ieee->reorder_spinlock), flags); if (ts->rx_timeout_indicate_seq != 0xffff) { @@ -50,7 +50,7 @@ static void RxPktPendingTimeout(struct timer_list *t) list_add_tail(&pReorderEntry->list, &ieee->RxReorder_Unused_List); } else { - bPktInBuf = true; + pkt_in_buf = true; break; } } @@ -68,10 +68,10 @@ static void RxPktPendingTimeout(struct timer_list *t) return; } rtllib_indicate_packets(ieee, ieee->stats_IndicateArray, index); - bPktInBuf = false; + pkt_in_buf = false; } - if (bPktInBuf && (ts->rx_timeout_indicate_seq == 0xffff)) { + if (pkt_in_buf && (ts->rx_timeout_indicate_seq == 0xffff)) { ts->rx_timeout_indicate_seq = ts->rx_indicate_seq; mod_timer(&ts->rx_pkt_pending_timer, jiffies + msecs_to_jiffies(ieee->ht_info->rx_reorder_pending_time) @@ -431,7 +431,7 @@ void remove_all_ts(struct rtllib_device *ieee) } } -void TsStartAddBaProcess(struct rtllib_device *ieee, struct tx_ts_record *pTxTS) +void rtllib_ts_start_add_ba_process(struct rtllib_device *ieee, struct tx_ts_record *pTxTS) { if (pTxTS->add_ba_req_in_progress == false) { pTxTS->add_ba_req_in_progress = true; diff --git a/drivers/staging/rtl8192e/rtllib.h b/drivers/staging/rtl8192e/rtllib.h index 0809af3fd041..022851b7f1a9 100644 --- a/drivers/staging/rtl8192e/rtllib.h +++ b/drivers/staging/rtl8192e/rtllib.h @@ -105,26 +105,26 @@ struct cb_desc { u8 bCmdOrInit:1; u8 tx_dis_rate_fallback:1; u8 tx_use_drv_assinged_rate:1; - u8 bHwSec:1; + u8 hw_sec:1; u8 nStuckCount; /* Tx Firmware Related flags (10-11)*/ - u8 bCTSEnable:1; - u8 bRTSEnable:1; - u8 bUseShortGI:1; - u8 bUseShortPreamble:1; + u8 cts_enable:1; + u8 rts_enable:1; + u8 use_short_gi:1; + u8 use_short_preamble:1; u8 tx_enable_fw_calc_dur:1; u8 ampdu_enable:1; - u8 bRTSSTBC:1; + u8 rtsstbc:1; u8 RTSSC:1; - u8 bRTSBW:1; - u8 bPacketBW:1; + u8 rts_bw:1; + u8 packet_bw:1; u8 rts_use_short_preamble:1; - u8 bRTSUseShortGI:1; + u8 rts_use_short_gi:1; u8 multicast:1; - u8 bBroadcast:1; + u8 broadcast:1; u8 drv_agg_enable:1; u8 reserved2:1; @@ -338,9 +338,9 @@ enum rt_op_mode { #define RTLLIB_QCTL_TID 0x000F #define FC_QOS_BIT BIT(7) -#define IsDataFrame(pdu) (((pdu[0] & 0x0C) == 0x08) ? true : false) -#define IsLegacyDataFrame(pdu) (IsDataFrame(pdu) && (!(pdu[0]&FC_QOS_BIT))) -#define IsQoSDataFrame(pframe) \ +#define is_data_frame(pdu) (((pdu[0] & 0x0C) == 0x08) ? true : false) +#define is_legacy_data_frame(pdu) (is_data_frame(pdu) && (!(pdu[0]&FC_QOS_BIT))) +#define is_qos_data_frame(pframe) \ ((*(u16 *)pframe&(IEEE80211_STYPE_QOS_DATA|RTLLIB_FTYPE_DATA)) == \ (IEEE80211_STYPE_QOS_DATA|RTLLIB_FTYPE_DATA)) #define frame_order(pframe) (*(u16 *)pframe&IEEE80211_FCTL_ORDER) @@ -481,7 +481,7 @@ struct rtllib_rx_stats { u16 bHwError:1; u16 bCRC:1; u16 bICV:1; - u16 Decrypted:1; + u16 decrypted:1; u32 time_stamp_low; u32 time_stamp_high; @@ -489,7 +489,7 @@ struct rtllib_rx_stats { u8 RxBufShift; bool bIsAMPDU; bool bFirstMPDU; - bool bContainHTC; + bool contain_htc; u32 RxPWDBAll; u8 RxMIMOSignalStrength[4]; s8 RxMIMOSignalQuality[2]; @@ -728,7 +728,7 @@ union frameqos { #define QOS_VERSION_1 1 struct rtllib_qos_information_element { - u8 elementID; + u8 element_id; u8 length; u8 qui[QOS_OUI_LEN]; u8 qui_type; @@ -799,7 +799,7 @@ static inline const char *eap_get_type(int type) eap_types[type]; } -static inline u8 Frame_QoSTID(u8 *buf) +static inline u8 frame_qos_tid(u8 *buf) { struct ieee80211_hdr_3addr *hdr; u16 fc; @@ -910,14 +910,14 @@ struct rtllib_network { u8 hidden_ssid_len; struct rtllib_qos_data qos_data; - bool bWithAironetIE; + bool with_aironet_ie; bool ckip_supported; bool ccx_rm_enable; - u8 CcxRmState[2]; - bool bMBssidValid; - u8 MBssidMask; - u8 MBssid[ETH_ALEN]; - bool bWithCcxVerNum; + u8 ccx_rm_state[2]; + bool mb_ssid_valid; + u8 mb_ssid_mask; + u8 mb_ssid[ETH_ALEN]; + bool with_ccx_ver_num; u8 bss_ccx_ver_number; /* These are network statistics */ struct rtllib_rx_stats stats; @@ -949,8 +949,8 @@ struct rtllib_network { u8 wmm_info; struct rtllib_wmm_ac_param wmm_param[4]; u8 turbo_enable; - u16 CountryIeLen; - u8 CountryIeBuf[MAX_IE_LEN]; + u16 country_ie_len; + u8 country_ie_buf[MAX_IE_LEN]; struct bss_ht bssht; bool broadcom_cap_exist; bool realtek_cap_exit; @@ -1018,7 +1018,7 @@ struct tx_pending { struct bandwidth_autoswitch { long threshold_20Mhzto40Mhz; long threshold_40Mhzto20Mhz; - bool bforced_tx20Mhz; + bool forced_tx_20MHz; bool bautoswitch_enable; }; @@ -1168,7 +1168,7 @@ struct rtllib_device { bool disable_mgnt_queue; unsigned long status; - u8 CntAfterLink; + u8 cnt_after_link; enum rt_op_mode op_mode; @@ -1198,7 +1198,7 @@ struct rtllib_device { u8 reg_dot11tx_ht_oper_rate_set[16]; u8 dot11ht_oper_rate_set[16]; u8 reg_ht_supp_rate_set[16]; - u8 HTCurrentOperaRate; + u8 ht_curr_op_rate; u8 HTHighestOperaRate; u8 tx_dis_rate_fallback; u8 tx_use_drv_assinged_rate; @@ -1407,9 +1407,9 @@ struct rtllib_device { struct work_struct wx_sync_scan_wq; union { - struct rtllib_rxb *RfdArray[REORDER_WIN_SIZE]; + struct rtllib_rxb *rfd_array[REORDER_WIN_SIZE]; struct rtllib_rxb *stats_IndicateArray[REORDER_WIN_SIZE]; - struct rtllib_rxb *prxbIndicateArray[REORDER_WIN_SIZE]; + struct rtllib_rxb *prxb_indicate_array[REORDER_WIN_SIZE]; struct { struct sw_chnl_cmd PreCommonCmd[MAX_PRECMD_CNT]; struct sw_chnl_cmd PostCommonCmd[MAX_POSTCMD_CNT]; @@ -1770,7 +1770,7 @@ void rtllib_reset_ba_entry(struct ba_record *ba); bool rtllib_get_ts(struct rtllib_device *ieee, struct ts_common_info **ppTS, u8 *addr, u8 TID, enum tr_select tx_rx_select, bool bAddNewTs); void rtllib_ts_init(struct rtllib_device *ieee); -void TsStartAddBaProcess(struct rtllib_device *ieee, +void rtllib_ts_start_add_ba_process(struct rtllib_device *ieee, struct tx_ts_record *pTxTS); void remove_peer_ts(struct rtllib_device *ieee, u8 *addr); void remove_all_ts(struct rtllib_device *ieee); @@ -1803,7 +1803,7 @@ int rtllib_parse_info_param(struct rtllib_device *ieee, struct rtllib_rx_stats *stats); void rtllib_indicate_packets(struct rtllib_device *ieee, - struct rtllib_rxb **prxbIndicateArray, u8 index); + struct rtllib_rxb **prxb_indicate_array, u8 index); #define RT_ASOC_RETRY_LIMIT 5 u8 mgnt_query_tx_rate_exclude_cck_rates(struct rtllib_device *ieee); diff --git a/drivers/staging/rtl8192e/rtllib_crypt_ccmp.c b/drivers/staging/rtl8192e/rtllib_crypt_ccmp.c index cbb8c8dbe9b0..639877069fad 100644 --- a/drivers/staging/rtl8192e/rtllib_crypt_ccmp.c +++ b/drivers/staging/rtl8192e/rtllib_crypt_ccmp.c @@ -182,7 +182,7 @@ static int rtllib_ccmp_encrypt(struct sk_buff *skb, int hdr_len, void *priv) *pos++ = key->tx_pn[0]; hdr = (struct ieee80211_hdr *)skb->data; - if (!tcb_desc->bHwSec) { + if (!tcb_desc->hw_sec) { struct aead_request *req; struct scatterlist sg[2]; u8 *aad = key->tx_aad; @@ -265,7 +265,7 @@ static int rtllib_ccmp_decrypt(struct sk_buff *skb, int hdr_len, void *priv) key->dot11rsna_stats_ccmp_replays++; return -4; } - if (!tcb_desc->bHwSec) { + if (!tcb_desc->hw_sec) { size_t data_len = skb->len - hdr_len - CCMP_HDR_LEN; struct aead_request *req; struct scatterlist sg[2]; @@ -407,4 +407,5 @@ static void __exit rtllib_crypto_ccmp_exit(void) module_init(rtllib_crypto_ccmp_init); module_exit(rtllib_crypto_ccmp_exit); +MODULE_DESCRIPTION("Support module for rtllib CCMP crypto"); MODULE_LICENSE("GPL"); diff --git a/drivers/staging/rtl8192e/rtllib_crypt_tkip.c b/drivers/staging/rtl8192e/rtllib_crypt_tkip.c index 0244b524a7d4..dc0917b03511 100644 --- a/drivers/staging/rtl8192e/rtllib_crypt_tkip.c +++ b/drivers/staging/rtl8192e/rtllib_crypt_tkip.c @@ -268,7 +268,7 @@ static int rtllib_tkip_encrypt(struct sk_buff *skb, int hdr_len, void *priv) hdr = (struct ieee80211_hdr *)skb->data; - if (!tcb_desc->bHwSec) { + if (!tcb_desc->hw_sec) { if (!tkey->tx_phase1_done) { tkip_mixing_phase1(tkey->tx_ttak, tkey->key, hdr->addr2, tkey->tx_iv32); @@ -285,7 +285,7 @@ static int rtllib_tkip_encrypt(struct sk_buff *skb, int hdr_len, void *priv) memmove(pos, pos + 8, hdr_len); pos += hdr_len; - if (tcb_desc->bHwSec) { + if (tcb_desc->hw_sec) { *pos++ = Hi8(tkey->tx_iv16); *pos++ = (Hi8(tkey->tx_iv16) | 0x20) & 0x7F; *pos++ = Lo8(tkey->tx_iv16); @@ -301,7 +301,7 @@ static int rtllib_tkip_encrypt(struct sk_buff *skb, int hdr_len, void *priv) *pos++ = (tkey->tx_iv32 >> 16) & 0xff; *pos++ = (tkey->tx_iv32 >> 24) & 0xff; - if (!tcb_desc->bHwSec) { + if (!tcb_desc->hw_sec) { icv = skb_put(skb, 4); crc = ~crc32_le(~0, pos, len); icv[0] = crc; @@ -319,7 +319,7 @@ static int rtllib_tkip_encrypt(struct sk_buff *skb, int hdr_len, void *priv) tkey->tx_iv32++; } - if (!tcb_desc->bHwSec) + if (!tcb_desc->hw_sec) return ret; return 0; } @@ -371,7 +371,7 @@ static int rtllib_tkip_decrypt(struct sk_buff *skb, int hdr_len, void *priv) iv32 = pos[4] | (pos[5] << 8) | (pos[6] << 16) | (pos[7] << 24); pos += 8; - if (!tcb_desc->bHwSec || (skb->cb[0] == 1)) { + if (!tcb_desc->hw_sec || (skb->cb[0] == 1)) { if ((iv32 < tkey->rx_iv32 || (iv32 == tkey->rx_iv32 && iv16 <= tkey->rx_iv16)) && tkey->initialized) { @@ -708,4 +708,5 @@ static void __exit rtllib_crypto_tkip_exit(void) module_init(rtllib_crypto_tkip_init); module_exit(rtllib_crypto_tkip_exit); +MODULE_DESCRIPTION("Support module for rtllib TKIP crypto"); MODULE_LICENSE("GPL"); diff --git a/drivers/staging/rtl8192e/rtllib_crypt_wep.c b/drivers/staging/rtl8192e/rtllib_crypt_wep.c index 21c2b7666d6f..10092f6884ff 100644 --- a/drivers/staging/rtl8192e/rtllib_crypt_wep.c +++ b/drivers/staging/rtl8192e/rtllib_crypt_wep.c @@ -102,7 +102,7 @@ static int prism2_wep_encrypt(struct sk_buff *skb, int hdr_len, void *priv) /* Copy rest of the WEP key (the secret part) */ memcpy(key + 3, wep->key, wep->key_len); - if (!tcb_desc->bHwSec) { + if (!tcb_desc->hw_sec) { /* Append little-endian CRC32 and encrypt it to produce ICV */ crc = ~crc32_le(~0, pos, len); icv = skb_put(skb, 4); @@ -155,7 +155,7 @@ static int prism2_wep_decrypt(struct sk_buff *skb, int hdr_len, void *priv) /* Apply RC4 to data and compute CRC32 over decrypted data */ plen = skb->len - hdr_len - 8; - if (!tcb_desc->bHwSec) { + if (!tcb_desc->hw_sec) { arc4_setkey(&wep->rx_ctx_arc4, key, klen); arc4_crypt(&wep->rx_ctx_arc4, pos, pos, plen + 4); @@ -238,4 +238,5 @@ static void __exit rtllib_crypto_wep_exit(void) module_init(rtllib_crypto_wep_init); module_exit(rtllib_crypto_wep_exit); +MODULE_DESCRIPTION("Support module for rtllib WEP crypto"); MODULE_LICENSE("GPL"); diff --git a/drivers/staging/rtl8192e/rtllib_module.c b/drivers/staging/rtl8192e/rtllib_module.c index e7af4a25b0be..469a69726c16 100644 --- a/drivers/staging/rtl8192e/rtllib_module.c +++ b/drivers/staging/rtl8192e/rtllib_module.c @@ -175,4 +175,5 @@ static void __exit rtllib_exit(void) module_init(rtllib_init); module_exit(rtllib_exit); +MODULE_DESCRIPTION("Support module for rtllib wireless devices"); MODULE_LICENSE("GPL"); diff --git a/drivers/staging/rtl8192e/rtllib_rx.c b/drivers/staging/rtl8192e/rtllib_rx.c index ee469c9118b8..84ca5d769b7e 100644 --- a/drivers/staging/rtl8192e/rtllib_rx.c +++ b/drivers/staging/rtl8192e/rtllib_rx.c @@ -55,7 +55,7 @@ static inline void rtllib_monitor_rx(struct rtllib_device *ieee, /* Called only as a tasklet (software IRQ) */ static struct rtllib_frag_entry * rtllib_frag_cache_find(struct rtllib_device *ieee, unsigned int seq, - unsigned int frag, u8 tid, u8 *src, u8 *dst) + unsigned int frag, u8 tid, u8 *src, u8 *dst) { struct rtllib_frag_entry *entry; int i; @@ -84,7 +84,7 @@ rtllib_frag_cache_find(struct rtllib_device *ieee, unsigned int seq, /* Called only as a tasklet (software IRQ) */ static struct sk_buff * rtllib_frag_cache_get(struct rtllib_device *ieee, - struct ieee80211_hdr *hdr) + struct ieee80211_hdr *hdr) { struct sk_buff *skb = NULL; u16 fc = le16_to_cpu(hdr->frame_control); @@ -143,7 +143,7 @@ rtllib_frag_cache_get(struct rtllib_device *ieee, * should have already been received */ entry = rtllib_frag_cache_find(ieee, seq, frag, tid, hdr->addr2, - hdr->addr1); + hdr->addr1); if (entry) { entry->last_frag = frag; skb = entry->skb; @@ -155,7 +155,7 @@ rtllib_frag_cache_get(struct rtllib_device *ieee, /* Called only as a tasklet (software IRQ) */ static int rtllib_frag_cache_invalidate(struct rtllib_device *ieee, - struct ieee80211_hdr *hdr) + struct ieee80211_hdr *hdr) { u16 fc = le16_to_cpu(hdr->frame_control); u16 sc = le16_to_cpu(hdr->seq_ctrl); @@ -181,7 +181,7 @@ static int rtllib_frag_cache_invalidate(struct rtllib_device *ieee, } entry = rtllib_frag_cache_find(ieee, seq, -1, tid, hdr->addr2, - hdr->addr1); + hdr->addr1); if (!entry) { netdev_dbg(ieee->dev, @@ -202,8 +202,7 @@ static int rtllib_frag_cache_invalidate(struct rtllib_device *ieee, */ static inline int rtllib_rx_frame_mgmt(struct rtllib_device *ieee, struct sk_buff *skb, - struct rtllib_rx_stats *rx_stats, u16 type, - u16 stype) + struct rtllib_rx_stats *rx_stats, u16 type, u16 stype) { /* On the struct stats definition there is written that * this is not mandatory.... but seems that the probe @@ -228,7 +227,7 @@ rtllib_rx_frame_mgmt(struct rtllib_device *ieee, struct sk_buff *skb, /* Called by rtllib_rx_frame_decrypt */ static int rtllib_is_eapol_frame(struct rtllib_device *ieee, - struct sk_buff *skb, size_t hdrlen) + struct sk_buff *skb, size_t hdrlen) { struct net_device *dev = ieee->dev; u16 fc, ethertype; @@ -282,10 +281,10 @@ rtllib_rx_frame_decrypt(struct rtllib_device *ieee, struct sk_buff *skb, struct cb_desc *tcb_desc = (struct cb_desc *) (skb->cb + MAX_DEV_ADDR_SIZE); - tcb_desc->bHwSec = 1; + tcb_desc->hw_sec = 1; if (ieee->need_sw_enc) - tcb_desc->bHwSec = 0; + tcb_desc->hw_sec = 0; } hdr = (struct ieee80211_hdr *)skb->data; @@ -321,10 +320,10 @@ rtllib_rx_frame_decrypt_msdu(struct rtllib_device *ieee, struct sk_buff *skb, struct cb_desc *tcb_desc = (struct cb_desc *) (skb->cb + MAX_DEV_ADDR_SIZE); - tcb_desc->bHwSec = 1; + tcb_desc->hw_sec = 1; if (ieee->need_sw_enc) - tcb_desc->bHwSec = 0; + tcb_desc->hw_sec = 0; } hdr = (struct ieee80211_hdr *)skb->data; @@ -346,7 +345,7 @@ rtllib_rx_frame_decrypt_msdu(struct rtllib_device *ieee, struct sk_buff *skb, /* this function is stolen from ipw2200 driver*/ #define IEEE_PACKET_RETRY_TIME (5 * HZ) static int is_duplicate_packet(struct rtllib_device *ieee, - struct ieee80211_hdr *header) + struct ieee80211_hdr *header) { u16 fc = le16_to_cpu(header->frame_control); u16 sc = le16_to_cpu(header->seq_ctrl); @@ -403,40 +402,40 @@ drop: return 1; } -static bool AddReorderEntry(struct rx_ts_record *ts, - struct rx_reorder_entry *pReorderEntry) +static bool add_reorder_entry(struct rx_ts_record *ts, + struct rx_reorder_entry *pReorderEntry) { - struct list_head *pList = &ts->rx_pending_pkt_list; + struct list_head *list = &ts->rx_pending_pkt_list; - while (pList->next != &ts->rx_pending_pkt_list) { + while (list->next != &ts->rx_pending_pkt_list) { if (SN_LESS(pReorderEntry->SeqNum, ((struct rx_reorder_entry *) - list_entry(pList->next, struct rx_reorder_entry, + list_entry(list->next, struct rx_reorder_entry, list))->SeqNum)) - pList = pList->next; + list = list->next; else if (SN_EQUAL(pReorderEntry->SeqNum, - ((struct rx_reorder_entry *)list_entry(pList->next, + ((struct rx_reorder_entry *)list_entry(list->next, struct rx_reorder_entry, list))->SeqNum)) return false; else break; } - pReorderEntry->list.next = pList->next; + pReorderEntry->list.next = list->next; pReorderEntry->list.next->prev = &pReorderEntry->list; - pReorderEntry->list.prev = pList; - pList->next = &pReorderEntry->list; + pReorderEntry->list.prev = list; + list->next = &pReorderEntry->list; return true; } void rtllib_indicate_packets(struct rtllib_device *ieee, - struct rtllib_rxb **prxbIndicateArray, u8 index) + struct rtllib_rxb **prxb_indicate_array, u8 index) { struct net_device_stats *stats = &ieee->stats; u8 i = 0, j = 0; u16 ethertype; for (j = 0; j < index; j++) { - struct rtllib_rxb *prxb = prxbIndicateArray[j]; + struct rtllib_rxb *prxb = prxb_indicate_array[j]; for (i = 0; i < prxb->nr_subframes; i++) { struct sk_buff *sub_skb = prxb->subframes[i]; @@ -491,13 +490,13 @@ void rtllib_flush_rx_ts_pending_pkts(struct rtllib_device *ieee, struct rx_ts_record *ts) { struct rx_reorder_entry *pRxReorderEntry; - u8 RfdCnt = 0; + u8 rfd_cnt = 0; del_timer_sync(&ts->rx_pkt_pending_timer); while (!list_empty(&ts->rx_pending_pkt_list)) { - if (RfdCnt >= REORDER_WIN_SIZE) { + if (rfd_cnt >= REORDER_WIN_SIZE) { netdev_info(ieee->dev, - "-------------->%s() error! RfdCnt >= REORDER_WIN_SIZE\n", + "-------------->%s() error! rfd_cnt >= REORDER_WIN_SIZE\n", __func__); break; } @@ -509,36 +508,36 @@ void rtllib_flush_rx_ts_pending_pkts(struct rtllib_device *ieee, pRxReorderEntry->SeqNum); list_del_init(&pRxReorderEntry->list); - ieee->RfdArray[RfdCnt] = pRxReorderEntry->prxb; + ieee->rfd_array[rfd_cnt] = pRxReorderEntry->prxb; - RfdCnt = RfdCnt + 1; + rfd_cnt = rfd_cnt + 1; list_add_tail(&pRxReorderEntry->list, &ieee->RxReorder_Unused_List); } - rtllib_indicate_packets(ieee, ieee->RfdArray, RfdCnt); + rtllib_indicate_packets(ieee, ieee->rfd_array, rfd_cnt); ts->rx_indicate_seq = 0xffff; } -static void RxReorderIndicatePacket(struct rtllib_device *ieee, - struct rtllib_rxb *prxb, - struct rx_ts_record *ts, u16 SeqNum) +static void rx_reorder_indicate_packet(struct rtllib_device *ieee, + struct rtllib_rxb *prxb, + struct rx_ts_record *ts, u16 SeqNum) { struct rt_hi_throughput *ht_info = ieee->ht_info; struct rx_reorder_entry *pReorderEntry = NULL; - u8 WinSize = ht_info->rx_reorder_win_size; - u16 WinEnd = 0; + u8 win_size = ht_info->rx_reorder_win_size; + u16 win_end = 0; u8 index = 0; - bool bMatchWinStart = false, bPktInBuf = false; + bool match_win_start = false, pkt_in_buf = false; unsigned long flags; netdev_dbg(ieee->dev, - "%s(): Seq is %d, ts->rx_indicate_seq is %d, WinSize is %d\n", - __func__, SeqNum, ts->rx_indicate_seq, WinSize); + "%s(): Seq is %d, ts->rx_indicate_seq is %d, win_size is %d\n", + __func__, SeqNum, ts->rx_indicate_seq, win_size); spin_lock_irqsave(&(ieee->reorder_spinlock), flags); - WinEnd = (ts->rx_indicate_seq + WinSize - 1) % 4096; + win_end = (ts->rx_indicate_seq + win_size - 1) % 4096; /* Rx Reorder initialize condition.*/ if (ts->rx_indicate_seq == 0xffff) ts->rx_indicate_seq = SeqNum; @@ -563,17 +562,17 @@ static void RxReorderIndicatePacket(struct rtllib_device *ieee, /* Sliding window manipulation. Conditions includes: * 1. Incoming SeqNum is equal to WinStart =>Window shift 1 - * 2. Incoming SeqNum is larger than the WinEnd => Window shift N + * 2. Incoming SeqNum is larger than the win_end => Window shift N */ if (SN_EQUAL(SeqNum, ts->rx_indicate_seq)) { ts->rx_indicate_seq = (ts->rx_indicate_seq + 1) % 4096; - bMatchWinStart = true; - } else if (SN_LESS(WinEnd, SeqNum)) { - if (SeqNum >= (WinSize - 1)) - ts->rx_indicate_seq = SeqNum + 1 - WinSize; + match_win_start = true; + } else if (SN_LESS(win_end, SeqNum)) { + if (SeqNum >= (win_size - 1)) + ts->rx_indicate_seq = SeqNum + 1 - win_size; else ts->rx_indicate_seq = 4095 - - (WinSize - (SeqNum + 1)) + 1; + (win_size - (SeqNum + 1)) + 1; netdev_dbg(ieee->dev, "Window Shift! IndicateSeq: %d, NewSeq: %d\n", ts->rx_indicate_seq, SeqNum); @@ -589,12 +588,12 @@ static void RxReorderIndicatePacket(struct rtllib_device *ieee, * 2. All packets with SeqNum larger than or equal to * WinStart => Buffer it. */ - if (bMatchWinStart) { + if (match_win_start) { /* Current packet is going to be indicated.*/ netdev_dbg(ieee->dev, "Packets indication! IndicateSeq: %d, NewSeq: %d\n", ts->rx_indicate_seq, SeqNum); - ieee->prxbIndicateArray[0] = prxb; + ieee->prxb_indicate_array[0] = prxb; index = 1; } else { /* Current packet is going to be inserted into pending list.*/ @@ -610,7 +609,7 @@ static void RxReorderIndicatePacket(struct rtllib_device *ieee, pReorderEntry->SeqNum = SeqNum; pReorderEntry->prxb = prxb; - if (!AddReorderEntry(ts, pReorderEntry)) { + if (!add_reorder_entry(ts, pReorderEntry)) { int i; netdev_dbg(ieee->dev, @@ -665,7 +664,7 @@ static void RxReorderIndicatePacket(struct rtllib_device *ieee, netdev_err(ieee->dev, "%s(): Buffer overflow!\n", __func__); - bPktInBuf = true; + pkt_in_buf = true; break; } @@ -675,7 +674,7 @@ static void RxReorderIndicatePacket(struct rtllib_device *ieee, ts->rx_indicate_seq = (ts->rx_indicate_seq + 1) % 4096; - ieee->prxbIndicateArray[index] = pReorderEntry->prxb; + ieee->prxb_indicate_array[index] = pReorderEntry->prxb; netdev_dbg(ieee->dev, "%s(): Indicate SeqNum %d!\n", __func__, pReorderEntry->SeqNum); index++; @@ -683,7 +682,7 @@ static void RxReorderIndicatePacket(struct rtllib_device *ieee, list_add_tail(&pReorderEntry->list, &ieee->RxReorder_Unused_List); } else { - bPktInBuf = true; + pkt_in_buf = true; break; } } @@ -706,11 +705,11 @@ static void RxReorderIndicatePacket(struct rtllib_device *ieee, flags); return; } - rtllib_indicate_packets(ieee, ieee->prxbIndicateArray, index); - bPktInBuf = false; + rtllib_indicate_packets(ieee, ieee->prxb_indicate_array, index); + pkt_in_buf = false; } - if (bPktInBuf && ts->rx_timeout_indicate_seq == 0xffff) { + if (pkt_in_buf && ts->rx_timeout_indicate_seq == 0xffff) { netdev_dbg(ieee->dev, "%s(): SET rx timeout timer\n", __func__); ts->rx_timeout_indicate_seq = ts->rx_indicate_seq; spin_unlock_irqrestore(&ieee->reorder_spinlock, flags); @@ -728,11 +727,10 @@ static u8 parse_subframe(struct rtllib_device *ieee, struct sk_buff *skb, struct ieee80211_hdr_3addr *hdr = (struct ieee80211_hdr_3addr *)skb->data; u16 fc = le16_to_cpu(hdr->frame_control); - u16 LLCOffset = sizeof(struct ieee80211_hdr_3addr); - u16 ChkLength; + u16 llc_offset = sizeof(struct ieee80211_hdr_3addr); bool is_aggregate_frame = false; u16 nSubframe_Length; - u8 nPadding_Length = 0; + u8 pad_len = 0; u16 SeqNum = 0; struct sk_buff *sub_skb; /* just for debug purpose */ @@ -742,16 +740,14 @@ static u8 parse_subframe(struct rtllib_device *ieee, struct sk_buff *skb, is_aggregate_frame = true; if (RTLLIB_QOS_HAS_SEQ(fc)) - LLCOffset += 2; - if (rx_stats->bContainHTC) - LLCOffset += sHTCLng; + llc_offset += 2; + if (rx_stats->contain_htc) + llc_offset += sHTCLng; - ChkLength = LLCOffset; - - if (skb->len <= ChkLength) + if (skb->len <= llc_offset) return 0; - skb_pull(skb, LLCOffset); + skb_pull(skb, llc_offset); ieee->is_aggregate_frame = is_aggregate_frame; if (!is_aggregate_frame) { rxb->nr_subframes = 1; @@ -833,15 +829,15 @@ static u8 parse_subframe(struct rtllib_device *ieee, struct sk_buff *skb, skb_pull(skb, nSubframe_Length); if (skb->len != 0) { - nPadding_Length = 4 - ((nSubframe_Length + + pad_len = 4 - ((nSubframe_Length + ETHERNET_HEADER_SIZE) % 4); - if (nPadding_Length == 4) - nPadding_Length = 0; + if (pad_len == 4) + pad_len = 0; - if (skb->len < nPadding_Length) + if (skb->len < pad_len) return 0; - skb_pull(skb, nPadding_Length); + skb_pull(skb, pad_len); } } @@ -862,7 +858,7 @@ static size_t rtllib_rx_get_hdrlen(struct rtllib_device *ieee, netdev_info(ieee->dev, "%s: find HTCControl!\n", __func__); hdrlen += 4; - rx_stats->bContainHTC = true; + rx_stats->contain_htc = true; } return hdrlen; @@ -881,8 +877,8 @@ static int rtllib_rx_check_duplicate(struct rtllib_device *ieee, if (!ieee->ht_info->cur_rx_reorder_enable || !ieee->current_network.qos_data.active || - !IsDataFrame(skb->data) || - IsLegacyDataFrame(skb->data)) { + !is_data_frame(skb->data) || + is_legacy_data_frame(skb->data)) { if (!ieee80211_is_beacon(hdr->frame_control)) { if (is_duplicate_packet(ieee, hdr)) return -1; @@ -891,7 +887,7 @@ static int rtllib_rx_check_duplicate(struct rtllib_device *ieee, struct rx_ts_record *ts = NULL; if (rtllib_get_ts(ieee, (struct ts_common_info **)&ts, hdr->addr2, - (u8)Frame_QoSTID((u8 *)(skb->data)), RX_DIR, true)) { + (u8)frame_qos_tid((u8 *)(skb->data)), RX_DIR, true)) { if ((fc & (1 << 11)) && (frag == ts->rx_last_frag_num) && (WLAN_GET_SEQ_SEQ(sc) == ts->rx_last_seq_num)) return -1; @@ -1025,7 +1021,7 @@ static int rtllib_rx_decrypt(struct rtllib_device *ieee, struct sk_buff *skb, sc = le16_to_cpu(hdr->seq_ctrl); frag = WLAN_GET_SEQ_FRAG(sc); - if ((!rx_stats->Decrypted)) + if ((!rx_stats->decrypted)) ieee->need_sw_enc = 1; else ieee->need_sw_enc = 0; @@ -1223,7 +1219,7 @@ static void rtllib_rx_indicate_pkt_legacy(struct rtllib_device *ieee, kfree(rxb); } -static int rtllib_rx_InfraAdhoc(struct rtllib_device *ieee, struct sk_buff *skb, +static int rtllib_rx_infra_adhoc(struct rtllib_device *ieee, struct sk_buff *skb, struct rtllib_rx_stats *rx_stats) { struct net_device *dev = ieee->dev; @@ -1322,9 +1318,9 @@ static int rtllib_rx_InfraAdhoc(struct rtllib_device *ieee, struct sk_buff *skb, /* Get TS for Rx Reorder */ hdr = (struct ieee80211_hdr *)skb->data; - if (ieee->current_network.qos_data.active && IsQoSDataFrame(skb->data) + if (ieee->current_network.qos_data.active && is_qos_data_frame(skb->data) && !is_multicast_ether_addr(hdr->addr1)) { - TID = Frame_QoSTID(skb->data); + TID = frame_qos_tid(skb->data); SeqNum = WLAN_GET_SEQ_SEQ(sc); rtllib_get_ts(ieee, (struct ts_common_info **)&ts, hdr->addr2, TID, RX_DIR, true); @@ -1366,7 +1362,7 @@ static int rtllib_rx_InfraAdhoc(struct rtllib_device *ieee, struct sk_buff *skb, if (!ieee->ht_info->cur_rx_reorder_enable || !ts) rtllib_rx_indicate_pkt_legacy(ieee, rx_stats, rxb, dst, src); else - RxReorderIndicatePacket(ieee, rxb, ts, SeqNum); + rx_reorder_indicate_packet(ieee, rxb, ts, SeqNum); dev_kfree_skb(skb); @@ -1383,7 +1379,7 @@ static int rtllib_rx_InfraAdhoc(struct rtllib_device *ieee, struct sk_buff *skb, return 0; } -static int rtllib_rx_Monitor(struct rtllib_device *ieee, struct sk_buff *skb, +static int rtllib_rx_monitor(struct rtllib_device *ieee, struct sk_buff *skb, struct rtllib_rx_stats *rx_stats) { struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; @@ -1431,10 +1427,10 @@ int rtllib_rx(struct rtllib_device *ieee, struct sk_buff *skb, switch (ieee->iw_mode) { case IW_MODE_INFRA: - ret = rtllib_rx_InfraAdhoc(ieee, skb, rx_stats); + ret = rtllib_rx_infra_adhoc(ieee, skb, rx_stats); break; case IW_MODE_MONITOR: - ret = rtllib_rx_Monitor(ieee, skb, rx_stats); + ret = rtllib_rx_monitor(ieee, skb, rx_stats); break; default: netdev_info(ieee->dev, "%s: ERR iw mode!!!\n", __func__); @@ -1456,7 +1452,7 @@ static u8 qos_oui[QOS_OUI_LEN] = { 0x00, 0x50, 0xF2 }; static int rtllib_verify_qos_info(struct rtllib_qos_information_element *info_element, int sub_type) { - if (info_element->elementID != QOS_ELEMENT_ID) + if (info_element->element_id != QOS_ELEMENT_ID) return -1; if (info_element->qui_subtype != sub_type) return -1; @@ -1813,21 +1809,21 @@ static void rtllib_parse_mife_generic(struct rtllib_device *ieee, info_element->data[2] == 0x96 && info_element->data[3] == 0x01) { if (info_element->len == 6) { - memcpy(network->CcxRmState, &info_element->data[4], 2); - if (network->CcxRmState[0] != 0) + memcpy(network->ccx_rm_state, &info_element->data[4], 2); + if (network->ccx_rm_state[0] != 0) network->ccx_rm_enable = true; else network->ccx_rm_enable = false; - network->MBssidMask = network->CcxRmState[1] & 0x07; - if (network->MBssidMask != 0) { - network->bMBssidValid = true; - network->MBssidMask = 0xff << - (network->MBssidMask); - ether_addr_copy(network->MBssid, + network->mb_ssid_mask = network->ccx_rm_state[1] & 0x07; + if (network->mb_ssid_mask != 0) { + network->mb_ssid_valid = true; + network->mb_ssid_mask = 0xff << + (network->mb_ssid_mask); + ether_addr_copy(network->mb_ssid, network->bssid); - network->MBssid[5] &= network->MBssidMask; + network->mb_ssid[5] &= network->mb_ssid_mask; } else { - network->bMBssidValid = false; + network->mb_ssid_valid = false; } } else { network->ccx_rm_enable = false; @@ -1839,10 +1835,10 @@ static void rtllib_parse_mife_generic(struct rtllib_device *ieee, info_element->data[2] == 0x96 && info_element->data[3] == 0x03) { if (info_element->len == 5) { - network->bWithCcxVerNum = true; + network->with_ccx_ver_num = true; network->bss_ccx_ver_number = info_element->data[4]; } else { - network->bWithCcxVerNum = false; + network->with_ccx_ver_num = false; network->bss_ccx_ver_number = 0; } } @@ -1914,7 +1910,7 @@ int rtllib_parse_info_param(struct rtllib_device *ieee, switch (info_element->id) { case MFIE_TYPE_SSID: if (rtllib_is_empty_essid(info_element->data, - info_element->len)) { + info_element->len)) { network->flags |= NETWORK_EMPTY_ESSID; break; } @@ -2090,7 +2086,7 @@ int rtllib_parse_info_param(struct rtllib_device *ieee, netdev_dbg(ieee->dev, "MFIE_TYPE_AIRONET: %d bytes\n", info_element->len); if (info_element->len > IE_CISCO_FLAG_POSITION) { - network->bWithAironetIE = true; + network->with_aironet_ie = true; if ((info_element->data[IE_CISCO_FLAG_POSITION] & SUPPORT_CKIP_MIC) || @@ -2100,7 +2096,7 @@ int rtllib_parse_info_param(struct rtllib_device *ieee, else network->ckip_supported = false; } else { - network->bWithAironetIE = false; + network->with_aironet_ie = false; network->ckip_supported = false; } break; @@ -2183,8 +2179,8 @@ static inline int rtllib_network_init( network->turbo_enable = 0; network->SignalStrength = stats->SignalStrength; network->RSSI = stats->SignalStrength; - network->CountryIeLen = 0; - memset(network->CountryIeBuf, 0, MAX_IE_LEN); + network->country_ie_len = 0; + memset(network->country_ie_buf, 0, MAX_IE_LEN); ht_initialize_bss_desc(&network->bssht); network->flags |= NETWORK_HAS_CCK; @@ -2193,10 +2189,10 @@ static inline int rtllib_network_init( network->wzc_ie_len = 0; if (rtllib_parse_info_param(ieee, - beacon->info_element, - (stats->len - sizeof(*beacon)), - network, - stats)) + beacon->info_element, + (stats->len - sizeof(*beacon)), + network, + stats)) return 1; network->mode = 0; @@ -2342,21 +2338,21 @@ static inline void update_network(struct rtllib_device *ieee, dst->RSSI = src->RSSI; dst->turbo_enable = src->turbo_enable; - dst->CountryIeLen = src->CountryIeLen; - memcpy(dst->CountryIeBuf, src->CountryIeBuf, src->CountryIeLen); + dst->country_ie_len = src->country_ie_len; + memcpy(dst->country_ie_buf, src->country_ie_buf, src->country_ie_len); - dst->bWithAironetIE = src->bWithAironetIE; + dst->with_aironet_ie = src->with_aironet_ie; dst->ckip_supported = src->ckip_supported; - memcpy(dst->CcxRmState, src->CcxRmState, 2); + memcpy(dst->ccx_rm_state, src->ccx_rm_state, 2); dst->ccx_rm_enable = src->ccx_rm_enable; - dst->MBssidMask = src->MBssidMask; - dst->bMBssidValid = src->bMBssidValid; - memcpy(dst->MBssid, src->MBssid, 6); - dst->bWithCcxVerNum = src->bWithCcxVerNum; + dst->mb_ssid_mask = src->mb_ssid_mask; + dst->mb_ssid_valid = src->mb_ssid_valid; + memcpy(dst->mb_ssid, src->mb_ssid, 6); + dst->with_ccx_ver_num = src->with_ccx_ver_num; dst->bss_ccx_ver_number = src->bss_ccx_ver_number; } -static int IsPassiveChannel(struct rtllib_device *rtllib, u8 channel) +static int is_passive_channel(struct rtllib_device *rtllib, u8 channel) { if (channel > MAX_CHANNEL_NUMBER) { netdev_info(rtllib->dev, "%s(): Invalid Channel\n", __func__); @@ -2432,7 +2428,7 @@ static inline void rtllib_process_probe_response( goto free_network; if (ieee80211_is_probe_resp(frame_ctl)) { - if (IsPassiveChannel(ieee, network->channel)) { + if (is_passive_channel(ieee, network->channel)) { netdev_info(ieee->dev, "GetScanInfo(): For Global Domain, filter probe response at channel(%d).\n", network->channel); @@ -2562,7 +2558,7 @@ static void rtllib_rx_mgt(struct rtllib_device *ieee, schedule_work(&ieee->ps_task); } else if (ieee80211_is_probe_resp(header->frame_control)) { netdev_dbg(ieee->dev, "received PROBE RESPONSE\n"); - rtllib_process_probe_response(ieee, - (struct rtllib_probe_response *)header, stats); + rtllib_process_probe_response(ieee, (struct rtllib_probe_response *)header, + stats); } } diff --git a/drivers/staging/rtl8192e/rtllib_softmac.c b/drivers/staging/rtl8192e/rtllib_softmac.c index 97fdca828da7..0fc97c868f81 100644 --- a/drivers/staging/rtl8192e/rtllib_softmac.c +++ b/drivers/staging/rtl8192e/rtllib_softmac.c @@ -421,7 +421,7 @@ static void rtllib_softmac_scan_syncro(struct rtllib_device *ieee) * So we switch to MAC80211_LINKED_SCANNING to remember * that we are still logically linked (not interested in * new network events, despite for updating the net list, - * but we are temporarly 'unlinked' as the driver shall + * but we are temporarily 'unlinked' as the driver shall * not filter RX frames and the channel is changing. * So the only situation in which are interested is to check * if the state become LINKED because of the #1 situation @@ -934,7 +934,7 @@ static void rtllib_associate_abort(struct rtllib_device *ieee) ieee->associate_seq++; - /* don't scan, and avoid to have the RX path possibily + /* don't scan, and avoid to have the RX path possibly * try again to associate. Even do not react to AUTH or * ASSOC response. Just wait for the retry wq to be scheduled. * Here we will check if there are good nets to associate @@ -1359,7 +1359,7 @@ static short rtllib_sta_ps_sleep(struct rtllib_device *ieee, u64 *time) return 0; timeout = ieee->current_network.beacon_interval; ieee->current_network.dtim_data = RTLLIB_DTIM_INVALID; - /* there's no need to nofity AP that I find you buffered + /* there's no need to notify AP that I find you buffered * with broadcast packet */ if (dtim & (RTLLIB_DTIM_UCAST & ieee->ps)) @@ -1806,7 +1806,7 @@ void rtllib_softmac_xmit(struct rtllib_txb *txb, struct rtllib_device *ieee) spin_lock_irqsave(&ieee->lock, flags); - /* called with 2nd parm 0, no tx mgmt lock required */ + /* called with 2nd param 0, no tx mgmt lock required */ rtllib_sta_wakeup(ieee, 0); /* update the tx status */ diff --git a/drivers/staging/rtl8192e/rtllib_tx.c b/drivers/staging/rtl8192e/rtllib_tx.c index 1aeb207a3fee..8e2abd16eb86 100644 --- a/drivers/staging/rtl8192e/rtllib_tx.c +++ b/drivers/staging/rtl8192e/rtllib_tx.c @@ -228,7 +228,7 @@ err_free: return NULL; } -static int rtllib_classify(struct sk_buff *skb, u8 bIsAmsdu) +static int rtllib_classify(struct sk_buff *skb) { struct ethhdr *eth; struct iphdr *ip; @@ -275,12 +275,12 @@ static void rtllib_tx_query_agg_cap(struct rtllib_device *ieee, if (!ht_info->current_ht_support || !ht_info->enable_ht) return; - if (!IsQoSDataFrame(skb->data)) + if (!is_qos_data_frame(skb->data)) return; if (is_multicast_ether_addr(hdr->addr1)) return; - if (tcb_desc->bdhcp || ieee->CntAfterLink < 2) + if (tcb_desc->bdhcp || ieee->cnt_after_link < 2) return; if (ht_info->iot_action & HT_IOT_ACT_TX_NO_AGGREGATION) @@ -290,7 +290,7 @@ static void rtllib_tx_query_agg_cap(struct rtllib_device *ieee, return; if (ht_info->current_ampdu_enable) { if (!rtllib_get_ts(ieee, (struct ts_common_info **)(&ts), hdr->addr1, - skb->priority, TX_DIR, true)) { + skb->priority, TX_DIR, true)) { netdev_info(ieee->dev, "%s: can't get TS\n", __func__); return; } @@ -301,7 +301,7 @@ static void rtllib_tx_query_agg_cap(struct rtllib_device *ieee, } else if (tcb_desc->bdhcp == 1) { ; } else if (!ts->disable_add_ba) { - TsStartAddBaProcess(ieee, ts); + rtllib_ts_start_add_ba_process(ieee, ts); } return; } else if (!ts->using_ba) { @@ -319,51 +319,51 @@ static void rtllib_tx_query_agg_cap(struct rtllib_device *ieee, } } -static void rtllib_query_ShortPreambleMode(struct rtllib_device *ieee, - struct cb_desc *tcb_desc) +static void rtllib_query_short_preamble_mode(struct rtllib_device *ieee, + struct cb_desc *tcb_desc) { - tcb_desc->bUseShortPreamble = false; + tcb_desc->use_short_preamble = false; if (tcb_desc->data_rate == 2) return; else if (ieee->current_network.capability & WLAN_CAPABILITY_SHORT_PREAMBLE) - tcb_desc->bUseShortPreamble = true; + tcb_desc->use_short_preamble = true; } -static void rtllib_query_HTCapShortGI(struct rtllib_device *ieee, - struct cb_desc *tcb_desc) +static void rtllib_query_ht_cap_short_gi(struct rtllib_device *ieee, + struct cb_desc *tcb_desc) { struct rt_hi_throughput *ht_info = ieee->ht_info; - tcb_desc->bUseShortGI = false; + tcb_desc->use_short_gi = false; if (!ht_info->current_ht_support || !ht_info->enable_ht) return; if (ht_info->cur_bw_40mhz && ht_info->cur_short_gi_40mhz) - tcb_desc->bUseShortGI = true; + tcb_desc->use_short_gi = true; else if (!ht_info->cur_bw_40mhz && ht_info->cur_short_gi_20mhz) - tcb_desc->bUseShortGI = true; + tcb_desc->use_short_gi = true; } -static void rtllib_query_BandwidthMode(struct rtllib_device *ieee, - struct cb_desc *tcb_desc) +static void rtllib_query_bandwidth_mode(struct rtllib_device *ieee, + struct cb_desc *tcb_desc) { struct rt_hi_throughput *ht_info = ieee->ht_info; - tcb_desc->bPacketBW = false; + tcb_desc->packet_bw = false; if (!ht_info->current_ht_support || !ht_info->enable_ht) return; - if (tcb_desc->multicast || tcb_desc->bBroadcast) + if (tcb_desc->multicast || tcb_desc->broadcast) return; if ((tcb_desc->data_rate & 0x80) == 0) return; if (ht_info->cur_bw_40mhz && ht_info->cur_tx_bw40mhz && - !ieee->bandwidth_auto_switch.bforced_tx20Mhz) - tcb_desc->bPacketBW = true; + !ieee->bandwidth_auto_switch.forced_tx_20MHz) + tcb_desc->packet_bw = true; } static void rtllib_query_protectionmode(struct rtllib_device *ieee, @@ -372,13 +372,13 @@ static void rtllib_query_protectionmode(struct rtllib_device *ieee, { struct rt_hi_throughput *ht_info; - tcb_desc->bRTSSTBC = false; - tcb_desc->bRTSUseShortGI = false; - tcb_desc->bCTSEnable = false; + tcb_desc->rtsstbc = false; + tcb_desc->rts_use_short_gi = false; + tcb_desc->cts_enable = false; tcb_desc->RTSSC = 0; - tcb_desc->bRTSBW = false; + tcb_desc->rts_bw = false; - if (tcb_desc->bBroadcast || tcb_desc->multicast) + if (tcb_desc->broadcast || tcb_desc->multicast) return; if (is_broadcast_ether_addr(skb->data + 16)) @@ -386,11 +386,11 @@ static void rtllib_query_protectionmode(struct rtllib_device *ieee, if (ieee->mode < WIRELESS_MODE_N_24G) { if (skb->len > ieee->rts) { - tcb_desc->bRTSEnable = true; + tcb_desc->rts_enable = true; tcb_desc->rts_rate = MGN_24M; } else if (ieee->current_network.buseprotection) { - tcb_desc->bRTSEnable = true; - tcb_desc->bCTSEnable = true; + tcb_desc->rts_enable = true; + tcb_desc->cts_enable = true; tcb_desc->rts_rate = MGN_24M; } return; @@ -400,54 +400,54 @@ static void rtllib_query_protectionmode(struct rtllib_device *ieee, while (true) { if (ht_info->iot_action & HT_IOT_ACT_FORCED_CTS2SELF) { - tcb_desc->bCTSEnable = true; + tcb_desc->cts_enable = true; tcb_desc->rts_rate = MGN_24M; - tcb_desc->bRTSEnable = true; + tcb_desc->rts_enable = true; break; } else if (ht_info->iot_action & (HT_IOT_ACT_FORCED_RTS | HT_IOT_ACT_PURE_N_MODE)) { - tcb_desc->bRTSEnable = true; + tcb_desc->rts_enable = true; tcb_desc->rts_rate = MGN_24M; break; } if (ieee->current_network.buseprotection) { - tcb_desc->bRTSEnable = true; - tcb_desc->bCTSEnable = true; + tcb_desc->rts_enable = true; + tcb_desc->cts_enable = true; tcb_desc->rts_rate = MGN_24M; break; } if (ht_info->current_ht_support && ht_info->enable_ht) { - u8 HTOpMode = ht_info->current_op_mode; + u8 ht_op_mode = ht_info->current_op_mode; - if ((ht_info->cur_bw_40mhz && (HTOpMode == 2 || - HTOpMode == 3)) || - (!ht_info->cur_bw_40mhz && HTOpMode == 3)) { + if ((ht_info->cur_bw_40mhz && (ht_op_mode == 2 || + ht_op_mode == 3)) || + (!ht_info->cur_bw_40mhz && ht_op_mode == 3)) { tcb_desc->rts_rate = MGN_24M; - tcb_desc->bRTSEnable = true; + tcb_desc->rts_enable = true; break; } } if (skb->len > ieee->rts) { tcb_desc->rts_rate = MGN_24M; - tcb_desc->bRTSEnable = true; + tcb_desc->rts_enable = true; break; } if (tcb_desc->ampdu_enable) { tcb_desc->rts_rate = MGN_24M; - tcb_desc->bRTSEnable = false; + tcb_desc->rts_enable = false; break; } goto NO_PROTECTION; } if (ieee->current_network.capability & WLAN_CAPABILITY_SHORT_PREAMBLE) - tcb_desc->bUseShortPreamble = true; + tcb_desc->use_short_preamble = true; return; NO_PROTECTION: - tcb_desc->bRTSEnable = false; - tcb_desc->bCTSEnable = false; + tcb_desc->rts_enable = false; + tcb_desc->cts_enable = false; tcb_desc->rts_rate = 0; tcb_desc->RTSSC = 0; - tcb_desc->bRTSBW = false; + tcb_desc->rts_bw = false; } static void rtllib_txrate_selectmode(struct rtllib_device *ieee, @@ -472,11 +472,11 @@ static u16 rtllib_query_seqnum(struct rtllib_device *ieee, struct sk_buff *skb, if (is_multicast_ether_addr(dst)) return 0; - if (IsQoSDataFrame(skb->data)) { + if (is_qos_data_frame(skb->data)) { struct tx_ts_record *ts = NULL; if (!rtllib_get_ts(ieee, (struct ts_common_info **)(&ts), dst, - skb->priority, TX_DIR, true)) + skb->priority, TX_DIR, true)) return 0; seqnum = ts->tx_cur_seq; ts->tx_cur_seq = (ts->tx_cur_seq + 1) % 4096; @@ -510,8 +510,8 @@ static u8 rtllib_current_rate(struct rtllib_device *ieee) if (ieee->mode & IEEE_MODE_MASK) return ieee->rate; - if (ieee->HTCurrentOperaRate) - return ieee->HTCurrentOperaRate; + if (ieee->ht_curr_op_rate) + return ieee->ht_curr_op_rate; else return ieee->rate & 0x7F; } @@ -538,8 +538,7 @@ static int rtllib_xmit_inter(struct sk_buff *skb, struct net_device *dev) u8 src[ETH_ALEN]; struct lib80211_crypt_data *crypt = NULL; struct cb_desc *tcb_desc; - u8 bIsMulticast = false; - u8 IsAmsdu = false; + u8 is_multicast = false; bool bdhcp = false; spin_lock_irqsave(&ieee->lock, flags); @@ -548,8 +547,8 @@ static int rtllib_xmit_inter(struct sk_buff *skb, struct net_device *dev) * creating it... */ if (!(ieee->softmac_features & IEEE_SOFTMAC_TX_QUEUE) || - ((!ieee->softmac_data_hard_start_xmit && - (ieee->softmac_features & IEEE_SOFTMAC_TX_QUEUE)))) { + ((!ieee->softmac_data_hard_start_xmit && + (ieee->softmac_features & IEEE_SOFTMAC_TX_QUEUE)))) { netdev_warn(ieee->dev, "No xmit handler.\n"); goto success; } @@ -607,7 +606,7 @@ static int rtllib_xmit_inter(struct sk_buff *skb, struct net_device *dev) } } - skb->priority = rtllib_classify(skb, IsAmsdu); + skb->priority = rtllib_classify(skb); crypt = ieee->crypt_info.crypt[ieee->crypt_info.tx_keyidx]; encrypt = !(ether_type == ETH_P_PAE && ieee->ieee802_1x) && crypt && crypt->ops; if (!encrypt && ieee->ieee802_1x && @@ -648,21 +647,17 @@ static int rtllib_xmit_inter(struct sk_buff *skb, struct net_device *dev) ether_addr_copy(header.addr1, ieee->current_network.bssid); ether_addr_copy(header.addr2, src); - if (IsAmsdu) - ether_addr_copy(header.addr3, - ieee->current_network.bssid); - else - ether_addr_copy(header.addr3, dest); + ether_addr_copy(header.addr3, dest); } - bIsMulticast = is_multicast_ether_addr(header.addr1); + is_multicast = is_multicast_ether_addr(header.addr1); header.frame_control = cpu_to_le16(fc); /* Determine fragmentation size based on destination (multicast * and broadcast are not fragmented) */ - if (bIsMulticast) { + if (is_multicast) { frag_size = MAX_FRAG_THRESHOLD; qos_ctl |= QOS_CTL_NOTCONTAIN_ACK; } else { @@ -751,14 +746,14 @@ static int rtllib_xmit_inter(struct sk_buff *skb, struct net_device *dev) if (encrypt) { if (ieee->hwsec_active) - tcb_desc->bHwSec = 1; + tcb_desc->hw_sec = 1; else - tcb_desc->bHwSec = 0; + tcb_desc->hw_sec = 0; skb_reserve(skb_frag, crypt->ops->extra_mpdu_prefix_len + crypt->ops->extra_msdu_prefix_len); } else { - tcb_desc->bHwSec = 0; + tcb_desc->hw_sec = 0; } frag_hdr = skb_put_data(skb_frag, &header, hdr_len); @@ -774,7 +769,7 @@ static int rtllib_xmit_inter(struct sk_buff *skb, struct net_device *dev) /* The last fragment has the remaining length */ bytes = bytes_last_frag; } - if ((qos_activated) && (!bIsMulticast)) { + if ((qos_activated) && (!is_multicast)) { frag_hdr->seq_ctrl = cpu_to_le16(rtllib_query_seqnum(ieee, skb_frag, header.addr1)); @@ -809,7 +804,7 @@ static int rtllib_xmit_inter(struct sk_buff *skb, struct net_device *dev) skb_put(skb_frag, 4); } - if ((qos_activated) && (!bIsMulticast)) { + if ((qos_activated) && (!is_multicast)) { if (ieee->seq_ctrl[UP2AC(skb->priority) + 1] == 0xFFF) ieee->seq_ctrl[UP2AC(skb->priority) + 1] = 0; else @@ -845,9 +840,9 @@ static int rtllib_xmit_inter(struct sk_buff *skb, struct net_device *dev) if (is_multicast_ether_addr(header.addr1)) tcb_desc->multicast = 1; if (is_broadcast_ether_addr(header.addr1)) - tcb_desc->bBroadcast = 1; + tcb_desc->broadcast = 1; rtllib_txrate_selectmode(ieee, tcb_desc); - if (tcb_desc->multicast || tcb_desc->bBroadcast) + if (tcb_desc->multicast || tcb_desc->broadcast) tcb_desc->data_rate = ieee->basic_rate; else tcb_desc->data_rate = rtllib_current_rate(ieee); @@ -868,11 +863,11 @@ static int rtllib_xmit_inter(struct sk_buff *skb, struct net_device *dev) tcb_desc->bdhcp = 1; } - rtllib_query_ShortPreambleMode(ieee, tcb_desc); + rtllib_query_short_preamble_mode(ieee, tcb_desc); rtllib_tx_query_agg_cap(ieee, txb->fragments[0], tcb_desc); - rtllib_query_HTCapShortGI(ieee, tcb_desc); - rtllib_query_BandwidthMode(ieee, tcb_desc); + rtllib_query_ht_cap_short_gi(ieee, tcb_desc); + rtllib_query_bandwidth_mode(ieee, tcb_desc); rtllib_query_protectionmode(ieee, tcb_desc, txb->fragments[0]); } diff --git a/drivers/staging/rtl8712/rtl8712_xmit.c b/drivers/staging/rtl8712/rtl8712_xmit.c index d7d678b04ca8..12f2fdb1b3cb 100644 --- a/drivers/staging/rtl8712/rtl8712_xmit.c +++ b/drivers/staging/rtl8712/rtl8712_xmit.c @@ -247,7 +247,7 @@ void r8712_construct_txaggr_cmd_desc(struct xmit_buf *pxmitbuf) { struct tx_desc *ptx_desc = (struct tx_desc *)pxmitbuf->pbuf; - /* Fill up TxCmd Descriptor according as USB FW Tx Aaggregation info.*/ + /* Fill up TxCmd Descriptor according as USB FW Tx Aggregation info.*/ /* dw0 */ ptx_desc->txdw0 = cpu_to_le32(CMD_HDR_SZ & 0xffff); ptx_desc->txdw0 |= diff --git a/drivers/staging/rtl8712/rtl871x_event.h b/drivers/staging/rtl8712/rtl871x_event.h index 759a2d27d8f2..0cc780cf4341 100644 --- a/drivers/staging/rtl8712/rtl871x_event.h +++ b/drivers/staging/rtl8712/rtl871x_event.h @@ -37,7 +37,7 @@ struct surveydone_event { }; /* - * Used to report the link result of joinning the given bss + * Used to report the link result of joining the given bss * join_res: * -1: authentication fail * -2: association fail diff --git a/drivers/staging/rtl8712/rtl871x_io.h b/drivers/staging/rtl8712/rtl871x_io.h index c5b12f74ebf8..f09d50a29b82 100644 --- a/drivers/staging/rtl8712/rtl871x_io.h +++ b/drivers/staging/rtl8712/rtl871x_io.h @@ -62,7 +62,7 @@ #define IO_WR_BURST(x) (IO_WRITE_ | _IO_SYNC_ | _IO_BURST_ | \ ((x) & _IOSZ_MASK_)) #define IO_RD_BURST(x) (_IO_SYNC_ | _IO_BURST_ | ((x) & _IOSZ_MASK_)) -/*below is for the intf_option bit defition...*/ +/*below is for the intf_option bit definition...*/ #define _INTF_ASYNC_ BIT(0) /*support async io*/ struct intf_priv; struct intf_hdl; diff --git a/drivers/staging/rtl8712/rtl871x_mlme.c b/drivers/staging/rtl8712/rtl871x_mlme.c index fccfa0915a02..70c295e97068 100644 --- a/drivers/staging/rtl8712/rtl871x_mlme.c +++ b/drivers/staging/rtl8712/rtl871x_mlme.c @@ -944,7 +944,7 @@ void r8712_cpwm_event_callback(struct _adapter *adapter, u8 *pbuf) /* When the Netgear 3500 AP is with WPA2PSK-AES mode, it will send * the ADDBA req frame with start seq control = 0 to wifi client after - * the WPA handshake and the seqence number of following data packet + * the WPA handshake and the sequence number of following data packet * will be 0. In this case, the Rx reorder sequence is not longer than 0 * and the WiFi client will drop the data with seq number 0. * So, the 8712 firmware has to inform driver with receiving the diff --git a/drivers/staging/rtl8712/rtl871x_xmit.c b/drivers/staging/rtl8712/rtl871x_xmit.c index 6353dbe554d3..408616e9afcf 100644 --- a/drivers/staging/rtl8712/rtl871x_xmit.c +++ b/drivers/staging/rtl8712/rtl871x_xmit.c @@ -117,12 +117,9 @@ int _r8712_init_xmit_priv(struct xmit_priv *pxmitpriv, /*init xmit_buf*/ _init_queue(&pxmitpriv->free_xmitbuf_queue); _init_queue(&pxmitpriv->pending_xmitbuf_queue); - pxmitpriv->pallocated_xmitbuf = - kmalloc(NR_XMITBUFF * sizeof(struct xmit_buf) + 4, GFP_ATOMIC); - if (!pxmitpriv->pallocated_xmitbuf) + pxmitpriv->pxmitbuf = kmalloc(NR_XMITBUFF * sizeof(struct xmit_buf), GFP_ATOMIC); + if (!pxmitpriv->pxmitbuf) goto clean_up_frame_buf; - pxmitpriv->pxmitbuf = pxmitpriv->pallocated_xmitbuf + 4 - - ((addr_t)(pxmitpriv->pallocated_xmitbuf) & 3); pxmitbuf = (struct xmit_buf *)pxmitpriv->pxmitbuf; for (i = 0; i < NR_XMITBUFF; i++) { INIT_LIST_HEAD(&pxmitbuf->list); @@ -165,8 +162,8 @@ clean_up_alloc_buf: for (k = 0; k < 8; k++) /* delete xmit urb's */ usb_free_urb(pxmitbuf->pxmit_urb[k]); } - kfree(pxmitpriv->pallocated_xmitbuf); - pxmitpriv->pallocated_xmitbuf = NULL; + kfree(pxmitpriv->pxmitbuf); + pxmitpriv->pxmitbuf = NULL; clean_up_frame_buf: kfree(pxmitpriv->pallocated_frame_buf); pxmitpriv->pallocated_frame_buf = NULL; @@ -193,7 +190,7 @@ void _free_xmit_priv(struct xmit_priv *pxmitpriv) pxmitbuf++; } kfree(pxmitpriv->pallocated_frame_buf); - kfree(pxmitpriv->pallocated_xmitbuf); + kfree(pxmitpriv->pxmitbuf); free_hwxmits(padapter); } diff --git a/drivers/staging/rtl8712/rtl871x_xmit.h b/drivers/staging/rtl8712/rtl871x_xmit.h index cdcbc87a3cad..784172c385e3 100644 --- a/drivers/staging/rtl8712/rtl871x_xmit.h +++ b/drivers/staging/rtl8712/rtl871x_xmit.h @@ -244,7 +244,6 @@ struct xmit_priv { int cmdseq; struct __queue free_xmitbuf_queue; struct __queue pending_xmitbuf_queue; - u8 *pallocated_xmitbuf; u8 *pxmitbuf; uint free_xmitbuf_cnt; }; diff --git a/drivers/staging/rtl8712/usb_ops_linux.c b/drivers/staging/rtl8712/usb_ops_linux.c index b2181e1e2d38..0a3451cdc8a1 100644 --- a/drivers/staging/rtl8712/usb_ops_linux.c +++ b/drivers/staging/rtl8712/usb_ops_linux.c @@ -26,13 +26,6 @@ #define RTL871X_VENQT_READ 0xc0 #define RTL871X_VENQT_WRITE 0x40 -struct zero_bulkout_context { - void *pbuf; - void *purb; - void *pirp; - void *padapter; -}; - uint r8712_usb_init_intf_priv(struct intf_priv *pintfpriv) { pintfpriv->piorw_urb = usb_alloc_urb(0, GFP_ATOMIC); diff --git a/drivers/staging/rtl8723bs/hal/Hal8723BReg.h b/drivers/staging/rtl8723bs/hal/Hal8723BReg.h index 6bf7933cbe4a..0b327a70aa15 100644 --- a/drivers/staging/rtl8723bs/hal/Hal8723BReg.h +++ b/drivers/staging/rtl8723bs/hal/Hal8723BReg.h @@ -21,418 +21,45 @@ /* */ /* */ -/* */ - -/* */ -/* */ -/* 0x0000h ~ 0x00FFh System Configuration */ -/* */ -/* */ -#define REG_SYS_ISO_CTRL_8723B 0x0000 /* 2 Byte */ -#define REG_SYS_FUNC_EN_8723B 0x0002 /* 2 Byte */ -#define REG_APS_FSMCO_8723B 0x0004 /* 4 Byte */ -#define REG_SYS_CLKR_8723B 0x0008 /* 2 Byte */ -#define REG_9346CR_8723B 0x000A /* 2 Byte */ -#define REG_EE_VPD_8723B 0x000C /* 2 Byte */ -#define REG_AFE_MISC_8723B 0x0010 /* 1 Byte */ -#define REG_SPS0_CTRL_8723B 0x0011 /* 7 Byte */ -#define REG_SPS_OCP_CFG_8723B 0x0018 /* 4 Byte */ -#define REG_RSV_CTRL_8723B 0x001C /* 3 Byte */ -#define REG_RF_CTRL_8723B 0x001F /* 1 Byte */ -#define REG_LPLDO_CTRL_8723B 0x0023 /* 1 Byte */ -#define REG_AFE_XTAL_CTRL_8723B 0x0024 /* 4 Byte */ -#define REG_AFE_PLL_CTRL_8723B 0x0028 /* 4 Byte */ -#define REG_MAC_PLL_CTRL_EXT_8723B 0x002c /* 4 Byte */ -#define REG_EFUSE_CTRL_8723B 0x0030 -#define REG_EFUSE_TEST_8723B 0x0034 -#define REG_PWR_DATA_8723B 0x0038 -#define REG_CAL_TIMER_8723B 0x003C -#define REG_ACLK_MON_8723B 0x003E -#define REG_GPIO_MUXCFG_8723B 0x0040 -#define REG_GPIO_IO_SEL_8723B 0x0042 -#define REG_MAC_PINMUX_CFG_8723B 0x0043 -#define REG_GPIO_PIN_CTRL_8723B 0x0044 -#define REG_GPIO_INTM_8723B 0x0048 -#define REG_LEDCFG0_8723B 0x004C -#define REG_LEDCFG1_8723B 0x004D -#define REG_LEDCFG2_8723B 0x004E -#define REG_LEDCFG3_8723B 0x004F -#define REG_FSIMR_8723B 0x0050 -#define REG_FSISR_8723B 0x0054 -#define REG_HSIMR_8723B 0x0058 -#define REG_HSISR_8723B 0x005c -#define REG_GPIO_EXT_CTRL 0x0060 -#define REG_MULTI_FUNC_CTRL_8723B 0x0068 -#define REG_GPIO_STATUS_8723B 0x006C -#define REG_SDIO_CTRL_8723B 0x0070 -#define REG_OPT_CTRL_8723B 0x0074 -#define REG_AFE_XTAL_CTRL_EXT_8723B 0x0078 -#define REG_MCUFWDL_8723B 0x0080 -#define REG_BT_PATCH_STATUS_8723B 0x0088 -#define REG_HIMR0_8723B 0x00B0 -#define REG_HISR0_8723B 0x00B4 -#define REG_HIMR1_8723B 0x00B8 -#define REG_HISR1_8723B 0x00BC -#define REG_PMC_DBG_CTRL2_8723B 0x00CC -#define REG_EFUSE_BURN_GNT_8723B 0x00CF -#define REG_HPON_FSM_8723B 0x00EC -#define REG_SYS_CFG_8723B 0x00F0 -#define REG_SYS_CFG1_8723B 0x00FC -#define REG_ROM_VERSION 0x00FD - -/* */ -/* */ /* 0x0100h ~ 0x01FFh MACTOP General Configuration */ /* */ /* */ -#define REG_CR_8723B 0x0100 -#define REG_PBP_8723B 0x0104 -#define REG_PKT_BUFF_ACCESS_CTRL_8723B 0x0106 -#define REG_TRXDMA_CTRL_8723B 0x010C -#define REG_TRXFF_BNDY_8723B 0x0114 -#define REG_TRXFF_STATUS_8723B 0x0118 -#define REG_RXFF_PTR_8723B 0x011C -#define REG_CPWM_8723B 0x012F -#define REG_FWIMR_8723B 0x0130 -#define REG_FWISR_8723B 0x0134 -#define REG_FTIMR_8723B 0x0138 -#define REG_PKTBUF_DBG_CTRL_8723B 0x0140 -#define REG_RXPKTBUF_CTRL_8723B 0x0142 -#define REG_PKTBUF_DBG_DATA_L_8723B 0x0144 -#define REG_PKTBUF_DBG_DATA_H_8723B 0x0148 - -#define REG_TC0_CTRL_8723B 0x0150 -#define REG_TC1_CTRL_8723B 0x0154 -#define REG_TC2_CTRL_8723B 0x0158 -#define REG_TC3_CTRL_8723B 0x015C -#define REG_TC4_CTRL_8723B 0x0160 -#define REG_TCUNIT_BASE_8723B 0x0164 -#define REG_RSVD3_8723B 0x0168 -#define REG_C2HEVT_MSG_NORMAL_8723B 0x01A0 #define REG_C2HEVT_CMD_SEQ_88XX 0x01A1 -#define REG_C2HEVT_CMD_CONTENT_88XX 0x01A2 #define REG_C2HEVT_CMD_LEN_88XX 0x01AE -#define REG_C2HEVT_CLEAR_8723B 0x01AF -#define REG_MCUTST_1_8723B 0x01C0 -#define REG_MCUTST_WOWLAN_8723B 0x01C7 -#define REG_FMETHR_8723B 0x01C8 -#define REG_HMETFR_8723B 0x01CC -#define REG_HMEBOX_0_8723B 0x01D0 -#define REG_HMEBOX_1_8723B 0x01D4 -#define REG_HMEBOX_2_8723B 0x01D8 -#define REG_HMEBOX_3_8723B 0x01DC -#define REG_LLT_INIT_8723B 0x01E0 -#define REG_HMEBOX_EXT0_8723B 0x01F0 -#define REG_HMEBOX_EXT1_8723B 0x01F4 -#define REG_HMEBOX_EXT2_8723B 0x01F8 -#define REG_HMEBOX_EXT3_8723B 0x01FC /* */ /* */ /* 0x0200h ~ 0x027Fh TXDMA Configuration */ /* */ /* */ -#define REG_RQPN_8723B 0x0200 -#define REG_FIFOPAGE_8723B 0x0204 -#define REG_DWBCN0_CTRL_8723B REG_TDECTRL -#define REG_TXDMA_OFFSET_CHK_8723B 0x020C -#define REG_TXDMA_STATUS_8723B 0x0210 -#define REG_RQPN_NPQ_8723B 0x0214 #define REG_DWBCN1_CTRL_8723B 0x0228 -/* */ -/* */ -/* 0x0280h ~ 0x02FFh RXDMA Configuration */ -/* */ -/* */ -#define REG_RXDMA_AGG_PG_TH_8723B 0x0280 -#define REG_FW_UPD_RDPTR_8723B 0x0284 /* FW shall update this register before FW write RXPKT_RELEASE_POLL to 1 */ -#define REG_RXDMA_CONTROL_8723B 0x0286 /* Control the RX DMA. */ -#define REG_RXPKT_NUM_8723B 0x0287 /* The number of packets in RXPKTBUF. */ -#define REG_RXDMA_STATUS_8723B 0x0288 -#define REG_RXDMA_PRO_8723B 0x0290 -#define REG_EARLY_MODE_CONTROL_8723B 0x02BC -#define REG_RSVD5_8723B 0x02F0 -#define REG_RSVD6_8723B 0x02F4 - -/* */ -/* */ -/* 0x0300h ~ 0x03FFh PCIe */ -/* */ -/* */ -#define REG_PCIE_CTRL_REG_8723B 0x0300 -#define REG_INT_MIG_8723B 0x0304 /* Interrupt Migration */ -#define REG_BCNQ_DESA_8723B 0x0308 /* TX Beacon Descriptor Address */ -#define REG_HQ_DESA_8723B 0x0310 /* TX High Queue Descriptor Address */ -#define REG_MGQ_DESA_8723B 0x0318 /* TX Manage Queue Descriptor Address */ -#define REG_VOQ_DESA_8723B 0x0320 /* TX VO Queue Descriptor Address */ -#define REG_VIQ_DESA_8723B 0x0328 /* TX VI Queue Descriptor Address */ -#define REG_BEQ_DESA_8723B 0x0330 /* TX BE Queue Descriptor Address */ -#define REG_BKQ_DESA_8723B 0x0338 /* TX BK Queue Descriptor Address */ -#define REG_RX_DESA_8723B 0x0340 /* RX Queue Descriptor Address */ -#define REG_DBI_WDATA_8723B 0x0348 /* DBI Write Data */ -#define REG_DBI_RDATA_8723B 0x034C /* DBI Read Data */ -#define REG_DBI_ADDR_8723B 0x0350 /* DBI Address */ -#define REG_DBI_FLAG_8723B 0x0352 /* DBI Read/Write Flag */ -#define REG_MDIO_WDATA_8723B 0x0354 /* MDIO for Write PCIE PHY */ -#define REG_MDIO_RDATA_8723B 0x0356 /* MDIO for Reads PCIE PHY */ -#define REG_MDIO_CTL_8723B 0x0358 /* MDIO for Control */ -#define REG_DBG_SEL_8723B 0x0360 /* Debug Selection Register */ -#define REG_PCIE_HRPWM_8723B 0x0361 /* PCIe RPWM */ -#define REG_PCIE_HCPWM_8723B 0x0363 /* PCIe CPWM */ -#define REG_PCIE_MULTIFET_CTRL_8723B 0x036A /* PCIE Multi-Fethc Control */ - /* spec version 11 */ /* */ /* */ /* 0x0400h ~ 0x047Fh Protocol Configuration */ /* */ /* */ -#define REG_VOQ_INFORMATION_8723B 0x0400 -#define REG_VIQ_INFORMATION_8723B 0x0404 -#define REG_BEQ_INFORMATION_8723B 0x0408 -#define REG_BKQ_INFORMATION_8723B 0x040C -#define REG_MGQ_INFORMATION_8723B 0x0410 -#define REG_HGQ_INFORMATION_8723B 0x0414 -#define REG_BCNQ_INFORMATION_8723B 0x0418 -#define REG_TXPKT_EMPTY_8723B 0x041A - #define REG_FWHW_TXQ_CTRL_8723B 0x0420 -#define REG_HWSEQ_CTRL_8723B 0x0423 -#define REG_TXPKTBUF_BCNQ_BDNY_8723B 0x0424 -#define REG_TXPKTBUF_MGQ_BDNY_8723B 0x0425 -#define REG_LIFECTRL_CTRL_8723B 0x0426 -#define REG_MULTI_BCNQ_OFFSET_8723B 0x0427 -#define REG_SPEC_SIFS_8723B 0x0428 -#define REG_RL_8723B 0x042A -#define REG_TXBF_CTRL_8723B 0x042C -#define REG_DARFRC_8723B 0x0430 -#define REG_RARFRC_8723B 0x0438 -#define REG_RRSR_8723B 0x0440 #define REG_ARFR0_8723B 0x0444 #define REG_ARFR1_8723B 0x044C #define REG_CCK_CHECK_8723B 0x0454 #define REG_AMPDU_MAX_TIME_8723B 0x0456 -#define REG_TXPKTBUF_BCNQ_BDNY1_8723B 0x0457 #define REG_AMPDU_MAX_LENGTH_8723B 0x0458 -#define REG_TXPKTBUF_WMAC_LBK_BF_HD_8723B 0x045D -#define REG_NDPA_OPT_CTRL_8723B 0x045F -#define REG_FAST_EDCA_CTRL_8723B 0x0460 -#define REG_RD_RESP_PKT_TH_8723B 0x0463 #define REG_DATA_SC_8723B 0x0483 -#define REG_TXRPT_START_OFFSET 0x04AC -#define REG_POWER_STAGE1_8723B 0x04B4 -#define REG_POWER_STAGE2_8723B 0x04B8 -#define REG_AMPDU_BURST_MODE_8723B 0x04BC -#define REG_PKT_VO_VI_LIFE_TIME_8723B 0x04C0 -#define REG_PKT_BE_BK_LIFE_TIME_8723B 0x04C2 -#define REG_STBC_SETTING_8723B 0x04C4 -#define REG_HT_SINGLE_AMPDU_8723B 0x04C7 -#define REG_PROT_MODE_CTRL_8723B 0x04C8 #define REG_MAX_AGGR_NUM_8723B 0x04CA -#define REG_RTS_MAX_AGGR_NUM_8723B 0x04CB -#define REG_BAR_MODE_CTRL_8723B 0x04CC -#define REG_RA_TRY_RATE_AGG_LMT_8723B 0x04CF -#define REG_MACID_PKT_DROP0_8723B 0x04D0 -#define REG_MACID_PKT_SLEEP_8723B 0x04D4 /* */ /* */ /* 0x0500h ~ 0x05FFh EDCA Configuration */ /* */ /* */ -#define REG_EDCA_VO_PARAM_8723B 0x0500 -#define REG_EDCA_VI_PARAM_8723B 0x0504 -#define REG_EDCA_BE_PARAM_8723B 0x0508 -#define REG_EDCA_BK_PARAM_8723B 0x050C -#define REG_BCNTCFG_8723B 0x0510 #define REG_PIFS_8723B 0x0512 -#define REG_RDG_PIFS_8723B 0x0513 -#define REG_SIFS_CTX_8723B 0x0514 -#define REG_SIFS_TRX_8723B 0x0516 -#define REG_AGGR_BREAK_TIME_8723B 0x051A -#define REG_SLOT_8723B 0x051B -#define REG_TX_PTCL_CTRL_8723B 0x0520 -#define REG_TXPAUSE_8723B 0x0522 -#define REG_DIS_TXREQ_CLR_8723B 0x0523 -#define REG_RD_CTRL_8723B 0x0524 -/* */ -/* Format for offset 540h-542h: */ -/* [3:0]: TBTT prohibit setup in unit of 32us. The time for HW getting beacon content before TBTT. */ -/* [7:4]: Reserved. */ -/* [19:8]: TBTT prohibit hold in unit of 32us. The time for HW holding to send the beacon packet. */ -/* [23:20]: Reserved */ -/* Description: */ -/* | */ -/* |<--Setup--|--Hold------------>| */ -/* --------------|---------------------- */ -/* | */ -/* TBTT */ -/* Note: We cannot update beacon content to HW or send any AC packets during the time between Setup and Hold. */ -/* Described by Designer Tim and Bruce, 2011-01-14. */ -/* */ -#define REG_TBTT_PROHIBIT_8723B 0x0540 -#define REG_RD_NAV_NXT_8723B 0x0544 -#define REG_NAV_PROT_LEN_8723B 0x0546 -#define REG_BCN_CTRL_8723B 0x0550 -#define REG_BCN_CTRL_1_8723B 0x0551 -#define REG_MBID_NUM_8723B 0x0552 -#define REG_DUAL_TSF_RST_8723B 0x0553 -#define REG_BCN_INTERVAL_8723B 0x0554 -#define REG_DRVERLYINT_8723B 0x0558 -#define REG_BCNDMATIM_8723B 0x0559 -#define REG_ATIMWND_8723B 0x055A -#define REG_USTIME_TSF_8723B 0x055C -#define REG_BCN_MAX_ERR_8723B 0x055D -#define REG_RXTSF_OFFSET_CCK_8723B 0x055E -#define REG_RXTSF_OFFSET_OFDM_8723B 0x055F -#define REG_TSFTR_8723B 0x0560 -#define REG_CTWND_8723B 0x0572 -#define REG_SECONDARY_CCA_CTRL_8723B 0x0577 -#define REG_PSTIMER_8723B 0x0580 -#define REG_TIMER0_8723B 0x0584 -#define REG_TIMER1_8723B 0x0588 -#define REG_ACMHWCTRL_8723B 0x05C0 -#define REG_SCH_TXCMD_8723B 0x05F8 /* 0x0600h ~ 0x07FFh WMAC Configuration */ -#define REG_MAC_CR_8723B 0x0600 -#define REG_TCR_8723B 0x0604 -#define REG_RCR_8723B 0x0608 #define REG_RX_PKT_LIMIT_8723B 0x060C -#define REG_RX_DLK_TIME_8723B 0x060D -#define REG_RX_DRVINFO_SZ_8723B 0x060F - -#define REG_MACID_8723B 0x0610 -#define REG_BSSID_8723B 0x0618 -#define REG_MAR_8723B 0x0620 -#define REG_MBIDCAMCFG_8723B 0x0628 -#define REG_USTIME_EDCA_8723B 0x0638 -#define REG_MAC_SPEC_SIFS_8723B 0x063A -#define REG_RESP_SIFP_CCK_8723B 0x063C -#define REG_RESP_SIFS_OFDM_8723B 0x063E -#define REG_ACKTO_8723B 0x0640 -#define REG_CTS2TO_8723B 0x0641 -#define REG_EIFS_8723B 0x0642 - -#define REG_NAV_UPPER_8723B 0x0652 /* unit of 128 */ #define REG_TRXPTCL_CTL_8723B 0x0668 -/* Security */ -#define REG_CAMCMD_8723B 0x0670 -#define REG_CAMWRITE_8723B 0x0674 -#define REG_CAMREAD_8723B 0x0678 -#define REG_CAMDBG_8723B 0x067C -#define REG_SECCFG_8723B 0x0680 - -/* Power */ -#define REG_WOW_CTRL_8723B 0x0690 -#define REG_PS_RX_INFO_8723B 0x0692 -#define REG_UAPSD_TID_8723B 0x0693 -#define REG_WKFMCAM_CMD_8723B 0x0698 -#define REG_WKFMCAM_NUM_8723B 0x0698 -#define REG_WKFMCAM_RWD_8723B 0x069C -#define REG_RXFLTMAP0_8723B 0x06A0 -#define REG_RXFLTMAP1_8723B 0x06A2 -#define REG_RXFLTMAP2_8723B 0x06A4 -#define REG_BCN_PSR_RPT_8723B 0x06A8 -#define REG_BT_COEX_TABLE_8723B 0x06C0 -#define REG_BFMER0_INFO_8723B 0x06E4 -#define REG_BFMER1_INFO_8723B 0x06EC -#define REG_CSI_RPT_PARAM_BW20_8723B 0x06F4 -#define REG_CSI_RPT_PARAM_BW40_8723B 0x06F8 -#define REG_CSI_RPT_PARAM_BW80_8723B 0x06FC - -/* Hardware Port 2 */ -#define REG_MACID1_8723B 0x0700 -#define REG_BSSID1_8723B 0x0708 -#define REG_BFMEE_SEL_8723B 0x0714 -#define REG_SND_PTCL_CTRL_8723B 0x0718 - -/* Redifine 8192C register definition for compatibility */ - -/* TODO: use these definition when using REG_xxx naming rule. */ -/* NOTE: DO NOT Remove these definition. Use later. */ -#define EFUSE_CTRL_8723B REG_EFUSE_CTRL_8723B /* E-Fuse Control. */ -#define EFUSE_TEST_8723B REG_EFUSE_TEST_8723B /* E-Fuse Test. */ -#define MSR_8723B (REG_CR_8723B + 2) /* Media Status register */ -#define ISR_8723B REG_HISR0_8723B -#define TSFR_8723B REG_TSFTR_8723B /* Timing Sync Function Timer Register. */ - -#define PBP_8723B REG_PBP_8723B - -/* Redifine MACID register, to compatible prior ICs. */ -#define IDR0_8723B REG_MACID_8723B /* MAC ID Register, Offset 0x0050-0x0053 */ -#define IDR4_8723B (REG_MACID_8723B + 4) /* MAC ID Register, Offset 0x0054-0x0055 */ - -/* 9. Security Control Registers (Offset:) */ -#define RWCAM_8723B REG_CAMCMD_8723B /* IN 8190 Data Sheet is called CAMcmd */ -#define WCAMI_8723B REG_CAMWRITE_8723B /* Software write CAM input content */ -#define RCAMO_8723B REG_CAMREAD_8723B /* Software read/write CAM config */ -#define CAMDBG_8723B REG_CAMDBG_8723B -#define SECR_8723B REG_SECCFG_8723B /* Security Configuration Register */ - -/* 8195 IMR/ISR bits (offset 0xB0, 8bits) */ -#define IMR_DISABLED_8723B 0 -/* IMR DW0(0x00B0-00B3) Bit 0-31 */ -#define IMR_TIMER2_8723B BIT31 /* Timeout interrupt 2 */ -#define IMR_TIMER1_8723B BIT30 /* Timeout interrupt 1 */ -#define IMR_PSTIMEOUT_8723B BIT29 /* Power Save Time Out Interrupt */ -#define IMR_GTINT4_8723B BIT28 /* When GTIMER4 expires, this bit is set to 1 */ -#define IMR_GTINT3_8723B BIT27 /* When GTIMER3 expires, this bit is set to 1 */ -#define IMR_TXBCN0ERR_8723B BIT26 /* Transmit Beacon0 Error */ -#define IMR_TXBCN0OK_8723B BIT25 /* Transmit Beacon0 OK */ -#define IMR_TSF_BIT32_TOGGLE_8723B BIT24 /* TSF Timer BIT32 toggle indication interrupt */ -#define IMR_BCNDMAINT0_8723B BIT20 /* Beacon DMA Interrupt 0 */ -#define IMR_BCNDERR0_8723B BIT16 /* Beacon Queue DMA OK0 */ -#define IMR_HSISR_IND_ON_INT_8723B BIT15 /* HSISR Indicator (HSIMR & HSISR is true, this bit is set to 1) */ -#define IMR_BCNDMAINT_E_8723B BIT14 /* Beacon DMA Interrupt Extension for Win7 */ -#define IMR_ATIMEND_8723B BIT12 /* CTWidnow End or ATIM Window End */ -#define IMR_C2HCMD_8723B BIT10 /* CPU to Host Command INT Status, Write 1 clear */ -#define IMR_CPWM2_8723B BIT9 /* CPU power Mode exchange INT Status, Write 1 clear */ -#define IMR_CPWM_8723B BIT8 /* CPU power Mode exchange INT Status, Write 1 clear */ -#define IMR_HIGHDOK_8723B BIT7 /* High Queue DMA OK */ -#define IMR_MGNTDOK_8723B BIT6 /* Management Queue DMA OK */ -#define IMR_BKDOK_8723B BIT5 /* AC_BK DMA OK */ -#define IMR_BEDOK_8723B BIT4 /* AC_BE DMA OK */ -#define IMR_VIDOK_8723B BIT3 /* AC_VI DMA OK */ -#define IMR_VODOK_8723B BIT2 /* AC_VO DMA OK */ -#define IMR_RDU_8723B BIT1 /* Rx Descriptor Unavailable */ -#define IMR_ROK_8723B BIT0 /* Receive DMA OK */ - -/* IMR DW1(0x00B4-00B7) Bit 0-31 */ -#define IMR_BCNDMAINT7_8723B BIT27 /* Beacon DMA Interrupt 7 */ -#define IMR_BCNDMAINT6_8723B BIT26 /* Beacon DMA Interrupt 6 */ -#define IMR_BCNDMAINT5_8723B BIT25 /* Beacon DMA Interrupt 5 */ -#define IMR_BCNDMAINT4_8723B BIT24 /* Beacon DMA Interrupt 4 */ -#define IMR_BCNDMAINT3_8723B BIT23 /* Beacon DMA Interrupt 3 */ -#define IMR_BCNDMAINT2_8723B BIT22 /* Beacon DMA Interrupt 2 */ -#define IMR_BCNDMAINT1_8723B BIT21 /* Beacon DMA Interrupt 1 */ -#define IMR_BCNDOK7_8723B BIT20 /* Beacon Queue DMA OK Interrupt 7 */ -#define IMR_BCNDOK6_8723B BIT19 /* Beacon Queue DMA OK Interrupt 6 */ -#define IMR_BCNDOK5_8723B BIT18 /* Beacon Queue DMA OK Interrupt 5 */ -#define IMR_BCNDOK4_8723B BIT17 /* Beacon Queue DMA OK Interrupt 4 */ -#define IMR_BCNDOK3_8723B BIT16 /* Beacon Queue DMA OK Interrupt 3 */ -#define IMR_BCNDOK2_8723B BIT15 /* Beacon Queue DMA OK Interrupt 2 */ -#define IMR_BCNDOK1_8723B BIT14 /* Beacon Queue DMA OK Interrupt 1 */ -#define IMR_ATIMEND_E_8723B BIT13 /* ATIM Window End Extension for Win7 */ -#define IMR_TXERR_8723B BIT11 /* Tx Error Flag Interrupt Status, write 1 clear. */ -#define IMR_RXERR_8723B BIT10 /* Rx Error Flag INT Status, Write 1 clear */ -#define IMR_TXFOVW_8723B BIT9 /* Transmit FIFO Overflow */ -#define IMR_RXFOVW_8723B BIT8 /* Receive FIFO Overflow */ - -/* 2 ACMHWCTRL 0x05C0 */ -#define ACMHW_HWEN_8723B BIT(0) -#define ACMHW_VOQEN_8723B BIT(1) -#define ACMHW_VIQEN_8723B BIT(2) -#define ACMHW_BEQEN_8723B BIT(3) -#define ACMHW_VOQSTATUS_8723B BIT(5) -#define ACMHW_VIQSTATUS_8723B BIT(6) -#define ACMHW_BEQSTATUS_8723B BIT(7) - -/* 8195 (RCR) Receive Configuration Register (Offset 0x608, 32 bits) */ -#define RCR_TCPOFLD_EN BIT25 /* Enable TCP checksum offload */ - #endif /* #ifndef __INC_HAL8723BREG_H */ diff --git a/drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c b/drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c index dd0f74b0cf0d..4da2487f6750 100644 --- a/drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c +++ b/drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c @@ -70,13 +70,6 @@ static bool CheckPositive( return false; } -static bool CheckNegative( - struct dm_odm_t *pDM_Odm, const u32 Condition1, const u32 Condition2 -) -{ - return true; -} - /****************************************************************************** * AGC_TAB.TXT ******************************************************************************/ @@ -244,10 +237,7 @@ void ODM_ReadAndConfig_MP_8723B_AGC_TAB(struct dm_odm_t *pDM_Odm) READ_NEXT_PAIR(v1, v2, i); } else { READ_NEXT_PAIR(v1, v2, i); - if (!CheckNegative(pDM_Odm, v1, v2)) - bMatched = false; - else - bMatched = true; + bMatched = true; READ_NEXT_PAIR(v1, v2, i); } @@ -506,10 +496,7 @@ void ODM_ReadAndConfig_MP_8723B_PHY_REG(struct dm_odm_t *pDM_Odm) READ_NEXT_PAIR(v1, v2, i); } else { READ_NEXT_PAIR(v1, v2, i); - if (!CheckNegative(pDM_Odm, v1, v2)) - bMatched = false; - else - bMatched = true; + bMatched = true; READ_NEXT_PAIR(v1, v2, i); } diff --git a/drivers/staging/rtl8723bs/hal/HalHWImg8723B_MAC.c b/drivers/staging/rtl8723bs/hal/HalHWImg8723B_MAC.c index 47e66f4ad9d1..1f0cc8d58df3 100644 --- a/drivers/staging/rtl8723bs/hal/HalHWImg8723B_MAC.c +++ b/drivers/staging/rtl8723bs/hal/HalHWImg8723B_MAC.c @@ -68,13 +68,6 @@ static bool CheckPositive( return false; } -static bool CheckNegative( - struct dm_odm_t *pDM_Odm, const u32 Condition1, const u32 Condition2 -) -{ - return true; -} - /****************************************************************************** * MAC_REG.TXT ******************************************************************************/ @@ -214,10 +207,7 @@ void ODM_ReadAndConfig_MP_8723B_MAC_REG(struct dm_odm_t *pDM_Odm) READ_NEXT_PAIR(v1, v2, i); } else { READ_NEXT_PAIR(v1, v2, i); - if (!CheckNegative(pDM_Odm, v1, v2)) - bMatched = false; - else - bMatched = true; + bMatched = true; READ_NEXT_PAIR(v1, v2, i); } diff --git a/drivers/staging/rtl8723bs/hal/HalHWImg8723B_RF.c b/drivers/staging/rtl8723bs/hal/HalHWImg8723B_RF.c index efc68c17b126..155ec311a52e 100644 --- a/drivers/staging/rtl8723bs/hal/HalHWImg8723B_RF.c +++ b/drivers/staging/rtl8723bs/hal/HalHWImg8723B_RF.c @@ -78,13 +78,6 @@ static bool CheckPositive( return false; } -static bool CheckNegative( - struct dm_odm_t *pDM_Odm, const u32 Condition1, const u32 Condition2 -) -{ - return true; -} - /****************************************************************************** * RadioA.TXT ******************************************************************************/ @@ -245,10 +238,7 @@ void ODM_ReadAndConfig_MP_8723B_RadioA(struct dm_odm_t *pDM_Odm) READ_NEXT_PAIR(v1, v2, i); } else { READ_NEXT_PAIR(v1, v2, i); - if (!CheckNegative(pDM_Odm, v1, v2)) - bMatched = false; - else - bMatched = true; + bMatched = true; READ_NEXT_PAIR(v1, v2, i); } diff --git a/drivers/staging/rtl8723bs/hal/odm.h b/drivers/staging/rtl8723bs/hal/odm.h index f5c804a1b9d5..010274ba8079 100644 --- a/drivers/staging/rtl8723bs/hal/odm.h +++ b/drivers/staging/rtl8723bs/hal/odm.h @@ -76,7 +76,7 @@ /* Remove DIG by Yuchen */ -/* Remoce BB power saving by Yuchn */ +/* Remove BB power saving by Yuchn */ /* Remove DIG by yuchen */ @@ -878,7 +878,7 @@ struct dm_odm_t { /* DM_Out_Source_Dynamic_Mechanism_Structure */ struct odm_mac_status_info *pMacInfo; /* MAC_INFO_88E MacInfo; */ - /* Different Team independt structure?? */ + /* Different Team independent structure?? */ /* */ /* TX_RTP_CMN TX_retrpo; */ diff --git a/drivers/staging/rtl8723bs/hal/rtl8723b_cmd.c b/drivers/staging/rtl8723bs/hal/rtl8723b_cmd.c index a59ae622f05e..d1ac2f44939c 100644 --- a/drivers/staging/rtl8723bs/hal/rtl8723b_cmd.c +++ b/drivers/staging/rtl8723bs/hal/rtl8723b_cmd.c @@ -700,7 +700,7 @@ void rtl8723b_download_rsvd_page(struct adapter *padapter, u8 mstatus) rtw_write8(padapter, REG_BCN_CTRL, val8); /* To make sure that if there exists an adapter which would like to send beacon. */ - /* If exists, the origianl value of 0x422[6] will be 1, we should check this to */ + /* If exists, the original value of 0x422[6] will be 1, we should check this to */ /* prevent from setting 0x422[6] to 0 after download reserved page, or it will cause */ /* the beacon cannot be sent by HW. */ /* 2010.06.23. Added by tynli. */ @@ -964,7 +964,7 @@ void rtl8723b_download_BTCoex_AP_mode_rsvd_page(struct adapter *padapter) rtw_write8(padapter, REG_BCN_CTRL, val8); /* To make sure that if there exists an adapter which would like to send beacon. */ - /* If exists, the origianl value of 0x422[6] will be 1, we should check this to */ + /* If exists, the original value of 0x422[6] will be 1, we should check this to */ /* prevent from setting 0x422[6] to 0 after download reserved page, or it will cause */ /* the beacon cannot be sent by HW. */ /* 2010.06.23. Added by tynli. */ diff --git a/drivers/staging/rtl8723bs/include/Hal8192CPhyReg.h b/drivers/staging/rtl8723bs/include/Hal8192CPhyReg.h index 586a3dabc5ca..f8cf2aee5157 100644 --- a/drivers/staging/rtl8723bs/include/Hal8192CPhyReg.h +++ b/drivers/staging/rtl8723bs/include/Hal8192CPhyReg.h @@ -46,59 +46,11 @@ /* 5. Other definition for BB/RF R/W */ /* */ - -/* */ -/* 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF */ -/* 1. Page1(0x100) */ -/* */ -#define rPMAC_Reset 0x100 -#define rPMAC_TxStart 0x104 -#define rPMAC_TxLegacySIG 0x108 -#define rPMAC_TxHTSIG1 0x10c -#define rPMAC_TxHTSIG2 0x110 -#define rPMAC_PHYDebug 0x114 -#define rPMAC_TxPacketNum 0x118 -#define rPMAC_TxIdle 0x11c -#define rPMAC_TxMACHeader0 0x120 -#define rPMAC_TxMACHeader1 0x124 -#define rPMAC_TxMACHeader2 0x128 -#define rPMAC_TxMACHeader3 0x12c -#define rPMAC_TxMACHeader4 0x130 -#define rPMAC_TxMACHeader5 0x134 -#define rPMAC_TxDataType 0x138 -#define rPMAC_TxRandomSeed 0x13c -#define rPMAC_CCKPLCPPreamble 0x140 -#define rPMAC_CCKPLCPHeader 0x144 -#define rPMAC_CCKCRC16 0x148 -#define rPMAC_OFDMRxCRC32OK 0x170 -#define rPMAC_OFDMRxCRC32Er 0x174 -#define rPMAC_OFDMRxParityEr 0x178 -#define rPMAC_OFDMRxCRC8Er 0x17c -#define rPMAC_CCKCRxRC16Er 0x180 -#define rPMAC_CCKCRxRC32Er 0x184 -#define rPMAC_CCKCRxRC32OK 0x188 -#define rPMAC_TxStatus 0x18c - -/* */ -/* 2. Page2(0x200) */ -/* */ -/* The following two definition are only used for USB interface. */ -#define RF_BB_CMD_ADDR 0x02c0 /* RF/BB read/write command address. */ -#define RF_BB_CMD_DATA 0x02c4 /* RF/BB read/write command data. */ - /* */ /* 3. Page8(0x800) */ /* */ #define rFPGA0_RFMOD 0x800 /* RF mode & CCK TxSC RF BW Setting?? */ -#define rFPGA0_TxInfo 0x804 /* Status report?? */ -#define rFPGA0_PSDFunction 0x808 - -#define rFPGA0_TxGainStage 0x80c /* Set TX PWR init gain? */ - -#define rFPGA0_RFTiming1 0x810 /* Useless now */ -#define rFPGA0_RFTiming2 0x814 - #define rFPGA0_XA_HSSIParameter1 0x820 /* RF 3 wire register */ #define rFPGA0_XA_HSSIParameter2 0x824 #define rFPGA0_XB_HSSIParameter1 0x828 @@ -113,10 +65,6 @@ #define rFPGA0_XA_LSSIParameter 0x840 #define rFPGA0_XB_LSSIParameter 0x844 -#define rFPGA0_RFWakeUpParameter 0x850 /* Useless now */ -#define rFPGA0_RFSleepUpParameter 0x854 - -#define rFPGA0_XAB_SwitchControl 0x858 /* RF Channel switch */ #define rFPGA0_XCD_SwitchControl 0x85c #define rFPGA0_XA_RFInterfaceOE 0x860 /* RF Channel switch */ @@ -127,33 +75,17 @@ #define rFPGA0_XAB_RFInterfaceSW 0x870 /* RF Interface Software Control */ #define rFPGA0_XCD_RFInterfaceSW 0x874 -#define rFPGA0_XAB_RFParameter 0x878 /* RF Parameter */ -#define rFPGA0_XCD_RFParameter 0x87c - -#define rFPGA0_AnalogParameter1 0x880 /* Crystal cap setting RF-R/W protection for parameter4?? */ -#define rFPGA0_AnalogParameter2 0x884 -#define rFPGA0_AnalogParameter3 0x888 /* Useless now */ -#define rFPGA0_AnalogParameter4 0x88c - #define rFPGA0_XA_LSSIReadBack 0x8a0 /* Transceiver LSSI Readback */ #define rFPGA0_XB_LSSIReadBack 0x8a4 -#define rFPGA0_XC_LSSIReadBack 0x8a8 -#define rFPGA0_XD_LSSIReadBack 0x8ac -#define rFPGA0_PSDReport 0x8b4 /* Useless now */ #define TransceiverA_HSPI_Readback 0x8b8 /* Transceiver A HSPI Readback */ #define TransceiverB_HSPI_Readback 0x8bc /* Transceiver B HSPI Readback */ -#define rFPGA0_XAB_RFInterfaceRB 0x8e0 /* Useless now RF Interface Readback Value */ -#define rFPGA0_XCD_RFInterfaceRB 0x8e4 /* Useless now */ /* */ /* 4. Page9(0x900) */ /* */ #define rFPGA1_RFMOD 0x900 /* RF mode & OFDM TxSC RF BW Setting?? */ -#define rFPGA1_TxBlock 0x904 /* Useless now */ -#define rFPGA1_DebugSelect 0x908 /* Useless now */ -#define rFPGA1_TxInfo 0x90c /* Useless now Status report?? */ #define rS0S1_PathSwitch 0x948 /* */ @@ -163,135 +95,39 @@ #define rCCK0_System 0xa00 #define rCCK0_AFESetting 0xa04 /* Disable init gain now Select RX path by RSSI */ -#define rCCK0_CCA 0xa08 /* Disable init gain now Init gain */ - -#define rCCK0_RxAGC1 0xa0c /* AGC default value, saturation level Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series */ -#define rCCK0_RxAGC2 0xa10 /* AGC & DAGC */ - -#define rCCK0_RxHP 0xa14 -#define rCCK0_DSPParameter1 0xa18 /* Timing recovery & Channel estimation threshold */ -#define rCCK0_DSPParameter2 0xa1c /* SQ threshold */ - -#define rCCK0_TxFilter1 0xa20 -#define rCCK0_TxFilter2 0xa24 -#define rCCK0_DebugPort 0xa28 /* debug port and Tx filter3 */ -#define rCCK0_FalseAlarmReport 0xa2c /* 0xa2d useless now 0xa30-a4f channel report */ -#define rCCK0_TRSSIReport 0xa50 -#define rCCK0_RxReport 0xa54 /* 0xa57 */ -#define rCCK0_FACounterLower 0xa5c /* 0xa5b */ -#define rCCK0_FACounterUpper 0xa58 /* 0xa5c */ /* */ /* PageB(0xB00) */ /* */ -#define rPdp_AntA 0xb00 -#define rPdp_AntA_4 0xb04 -#define rConfig_Pmpd_AntA 0xb28 #define rConfig_AntA 0xb68 #define rConfig_AntB 0xb6c -#define rPdp_AntB 0xb70 -#define rPdp_AntB_4 0xb74 -#define rConfig_Pmpd_AntB 0xb98 -#define rAPK 0xbd8 /* */ /* 6. PageC(0xC00) */ /* */ -#define rOFDM0_LSTF 0xc00 - #define rOFDM0_TRxPathEnable 0xc04 #define rOFDM0_TRMuxPar 0xc08 -#define rOFDM0_TRSWIsolation 0xc0c -#define rOFDM0_XARxAFE 0xc10 /* RxIQ DC offset, Rx digital filter, DC notch filter */ #define rOFDM0_XARxIQImbalance 0xc14 /* RxIQ imbalance matrix */ -#define rOFDM0_XBRxAFE 0xc18 #define rOFDM0_XBRxIQImbalance 0xc1c -#define rOFDM0_XCRxAFE 0xc20 -#define rOFDM0_XCRxIQImbalance 0xc24 -#define rOFDM0_XDRxAFE 0xc28 -#define rOFDM0_XDRxIQImbalance 0xc2c - -#define rOFDM0_RxDetector1 0xc30 /* PD, BW & SBD DM tune init gain */ -#define rOFDM0_RxDetector2 0xc34 /* SBD & Fame Sync. */ -#define rOFDM0_RxDetector3 0xc38 /* Frame Sync. */ -#define rOFDM0_RxDetector4 0xc3c /* PD, SBD, Frame Sync & Short-GI */ #define rOFDM0_RxDSP 0xc40 /* Rx Sync Path */ -#define rOFDM0_CFOandDAGC 0xc44 /* CFO & DAGC */ -#define rOFDM0_CCADropThreshold 0xc48 /* CCA Drop threshold */ #define rOFDM0_ECCAThreshold 0xc4c /* energy CCA */ -#define rOFDM0_XAAGCCore1 0xc50 /* DIG */ -#define rOFDM0_XAAGCCore2 0xc54 -#define rOFDM0_XBAGCCore1 0xc58 -#define rOFDM0_XBAGCCore2 0xc5c -#define rOFDM0_XCAGCCore1 0xc60 -#define rOFDM0_XCAGCCore2 0xc64 -#define rOFDM0_XDAGCCore1 0xc68 -#define rOFDM0_XDAGCCore2 0xc6c - -#define rOFDM0_AGCParameter1 0xc70 -#define rOFDM0_AGCParameter2 0xc74 #define rOFDM0_AGCRSSITable 0xc78 -#define rOFDM0_HTSTFAGC 0xc7c #define rOFDM0_XATxIQImbalance 0xc80 /* TX PWR TRACK and DIG */ -#define rOFDM0_XATxAFE 0xc84 #define rOFDM0_XBTxIQImbalance 0xc88 -#define rOFDM0_XBTxAFE 0xc8c -#define rOFDM0_XCTxIQImbalance 0xc90 #define rOFDM0_XCTxAFE 0xc94 -#define rOFDM0_XDTxIQImbalance 0xc98 #define rOFDM0_XDTxAFE 0xc9c #define rOFDM0_RxIQExtAnta 0xca0 -#define rOFDM0_TxCoeff1 0xca4 -#define rOFDM0_TxCoeff2 0xca8 -#define rOFDM0_TxCoeff3 0xcac -#define rOFDM0_TxCoeff4 0xcb0 -#define rOFDM0_TxCoeff5 0xcb4 -#define rOFDM0_TxCoeff6 0xcb8 -#define rOFDM0_RxHPParameter 0xce0 #define rOFDM0_TxPseudoNoiseWgt 0xce4 -#define rOFDM0_FrameSync 0xcf0 -#define rOFDM0_DFSReport 0xcf4 /* */ /* 7. PageD(0xD00) */ /* */ #define rOFDM1_LSTF 0xd00 -#define rOFDM1_TRxPathEnable 0xd04 - -#define rOFDM1_CFO 0xd08 /* No setting now */ -#define rOFDM1_CSI1 0xd10 -#define rOFDM1_SBD 0xd14 -#define rOFDM1_CSI2 0xd18 -#define rOFDM1_CFOTracking 0xd2c -#define rOFDM1_TRxMesaure1 0xd34 -#define rOFDM1_IntfDet 0xd3c -#define rOFDM1_PseudoNoiseStateAB 0xd50 -#define rOFDM1_PseudoNoiseStateCD 0xd54 -#define rOFDM1_RxPseudoNoiseWgt 0xd58 - -#define rOFDM_PHYCounter1 0xda0 /* cca, parity fail */ -#define rOFDM_PHYCounter2 0xda4 /* rate illegal, crc8 fail */ -#define rOFDM_PHYCounter3 0xda8 /* MCS not support */ - -#define rOFDM_ShortCFOAB 0xdac /* No setting now */ -#define rOFDM_ShortCFOCD 0xdb0 -#define rOFDM_LongCFOAB 0xdb4 -#define rOFDM_LongCFOCD 0xdb8 -#define rOFDM_TailCFOAB 0xdbc -#define rOFDM_TailCFOCD 0xdc0 -#define rOFDM_PWMeasure1 0xdc4 -#define rOFDM_PWMeasure2 0xdc8 -#define rOFDM_BWReport 0xdcc -#define rOFDM_AGCReport 0xdd0 -#define rOFDM_RxSNR 0xdd4 -#define rOFDM_RxEVMCSI 0xdd8 -#define rOFDM_SIGReport 0xddc - /* */ /* 8. PageE(0xE00) */ @@ -316,7 +152,6 @@ #define rRx_IQK_Tone_B 0xe54 #define rTx_IQK_PI_B 0xe58 #define rRx_IQK_PI_B 0xe5c -#define rIQK_AGC_Cont 0xe60 #define rBlue_Tooth 0xe6c #define rRx_Wait_CCA 0xe70 @@ -331,19 +166,9 @@ #define rTx_Power_Before_IQK_A 0xe94 #define rTx_Power_After_IQK_A 0xe9c -#define rRx_Power_Before_IQK_A 0xea0 #define rRx_Power_Before_IQK_A_2 0xea4 -#define rRx_Power_After_IQK_A 0xea8 #define rRx_Power_After_IQK_A_2 0xeac -#define rTx_Power_Before_IQK_B 0xeb4 -#define rTx_Power_After_IQK_B 0xebc - -#define rRx_Power_Before_IQK_B 0xec0 -#define rRx_Power_Before_IQK_B_2 0xec4 -#define rRx_Power_After_IQK_B 0xec8 -#define rRx_Power_After_IQK_B_2 0xecc - #define rRx_OFDM 0xed0 #define rRx_Wait_RIFS 0xed4 #define rRx_TO_Rx 0xed8 @@ -352,708 +177,42 @@ #define rPMPD_ANAEN 0xeec /* */ -/* 7. RF Register 0x00-0x2E (RF 8256) */ -/* RF-0222D 0x00-3F */ -/* */ -/* Zebra1 */ -#define rZebra1_HSSIEnable 0x0 /* Useless now */ -#define rZebra1_TRxEnable1 0x1 -#define rZebra1_TRxEnable2 0x2 -#define rZebra1_AGC 0x4 -#define rZebra1_ChargePump 0x5 -#define rZebra1_Channel 0x7 /* RF channel switch */ - -/* endif */ -#define rZebra1_TxGain 0x8 /* Useless now */ -#define rZebra1_TxLPF 0x9 -#define rZebra1_RxLPF 0xb -#define rZebra1_RxHPFCorner 0xc - -/* Zebra4 */ -#define rGlobalCtrl 0 /* Useless now */ -#define rRTL8256_TxLPF 19 -#define rRTL8256_RxLPF 11 - -/* RTL8258 */ -#define rRTL8258_TxLPF 0x11 /* Useless now */ -#define rRTL8258_RxLPF 0x13 -#define rRTL8258_RSSILPF 0xa - -/* */ /* RL6052 Register definition */ /* */ #define RF_AC 0x00 /* */ -#define RF_IQADJ_G1 0x01 /* */ -#define RF_IQADJ_G2 0x02 /* */ -#define RF_BS_PA_APSET_G1_G4 0x03 -#define RF_BS_PA_APSET_G5_G8 0x04 -#define RF_POW_TRSW 0x05 /* */ - -#define RF_GAIN_RX 0x06 /* */ -#define RF_GAIN_TX 0x07 /* */ - #define RF_TXM_IDAC 0x08 /* */ -#define RF_IPA_G 0x09 /* */ -#define RF_TXBIAS_G 0x0A -#define RF_TXPA_AG 0x0B -#define RF_IPA_A 0x0C /* */ -#define RF_TXBIAS_A 0x0D -#define RF_BS_PA_APSET_G9_G11 0x0E -#define RF_BS_IQGEN 0x0F /* */ -#define RF_MODE1 0x10 /* */ -#define RF_MODE2 0x11 /* */ - -#define RF_RX_AGC_HP 0x12 /* */ -#define RF_TX_AGC 0x13 /* */ -#define RF_BIAS 0x14 /* */ -#define RF_IPA 0x15 /* */ -#define RF_TXBIAS 0x16 /* */ -#define RF_POW_ABILITY 0x17 /* */ -#define RF_MODE_AG 0x18 /* */ -#define rRfChannel 0x18 /* RF channel and BW switch */ #define RF_CHNLBW 0x18 /* RF channel and BW switch */ -#define RF_TOP 0x19 /* */ - -#define RF_RX_G1 0x1A /* */ -#define RF_RX_G2 0x1B /* */ - -#define RF_RX_BB2 0x1C /* */ -#define RF_RX_BB1 0x1D /* */ - -#define RF_RCK1 0x1E /* */ -#define RF_RCK2 0x1F /* */ - -#define RF_TX_G1 0x20 /* */ -#define RF_TX_G2 0x21 /* */ -#define RF_TX_G3 0x22 /* */ - -#define RF_TX_BB1 0x23 /* */ - -#define RF_T_METER 0x24 /* */ - -#define RF_SYN_G1 0x25 /* RF TX Power control */ -#define RF_SYN_G2 0x26 /* RF TX Power control */ -#define RF_SYN_G3 0x27 /* RF TX Power control */ -#define RF_SYN_G4 0x28 /* RF TX Power control */ -#define RF_SYN_G5 0x29 /* RF TX Power control */ -#define RF_SYN_G6 0x2A /* RF TX Power control */ -#define RF_SYN_G7 0x2B /* RF TX Power control */ -#define RF_SYN_G8 0x2C /* RF TX Power control */ #define RF_RCK_OS 0x30 /* RF TX PA control */ #define RF_TXPA_G1 0x31 /* RF TX PA control */ #define RF_TXPA_G2 0x32 /* RF TX PA control */ -#define RF_TXPA_G3 0x33 /* RF TX PA control */ -#define RF_TX_BIAS_A 0x35 -#define RF_TX_BIAS_D 0x36 -#define RF_LOBF_9 0x38 -#define RF_RXRF_A3 0x3C /* */ -#define RF_TRSW 0x3F -#define RF_TXRF_A2 0x41 -#define RF_TXPA_G4 0x46 -#define RF_TXPA_A4 0x4B -#define RF_0x52 0x52 #define RF_WE_LUT 0xEF -#define RF_S0S1 0xB0 - -/* */ -/* Bit Mask */ -/* */ -/* 1. Page1(0x100) */ -#define bBBResetB 0x100 /* Useless now? */ -#define bGlobalResetB 0x200 -#define bOFDMTxStart 0x4 -#define bCCKTxStart 0x8 -#define bCRC32Debug 0x100 -#define bPMACLoopback 0x10 -#define bTxLSIG 0xffffff -#define bOFDMTxRate 0xf -#define bOFDMTxReserved 0x10 -#define bOFDMTxLength 0x1ffe0 -#define bOFDMTxParity 0x20000 -#define bTxHTSIG1 0xffffff -#define bTxHTMCSRate 0x7f -#define bTxHTBW 0x80 -#define bTxHTLength 0xffff00 -#define bTxHTSIG2 0xffffff -#define bTxHTSmoothing 0x1 -#define bTxHTSounding 0x2 -#define bTxHTReserved 0x4 -#define bTxHTAggreation 0x8 -#define bTxHTSTBC 0x30 -#define bTxHTAdvanceCoding 0x40 -#define bTxHTShortGI 0x80 -#define bTxHTNumberHT_LTF 0x300 -#define bTxHTCRC8 0x3fc00 -#define bCounterReset 0x10000 -#define bNumOfOFDMTx 0xffff -#define bNumOfCCKTx 0xffff0000 -#define bTxIdleInterval 0xffff -#define bOFDMService 0xffff0000 -#define bTxMACHeader 0xffffffff -#define bTxDataInit 0xff -#define bTxHTMode 0x100 -#define bTxDataType 0x30000 -#define bTxRandomSeed 0xffffffff -#define bCCKTxPreamble 0x1 -#define bCCKTxSFD 0xffff0000 -#define bCCKTxSIG 0xff -#define bCCKTxService 0xff00 -#define bCCKLengthExt 0x8000 -#define bCCKTxLength 0xffff0000 -#define bCCKTxCRC16 0xffff -#define bCCKTxStatus 0x1 -#define bOFDMTxStatus 0x2 - -#define IS_BB_REG_OFFSET_92S(_Offset) ((_Offset >= 0x800) && (_Offset <= 0xfff)) /* 2. Page8(0x800) */ #define bRFMOD 0x1 /* Reg 0x800 rFPGA0_RFMOD */ -#define bJapanMode 0x2 -#define bCCKTxSC 0x30 -#define bCCKEn 0x1000000 -#define bOFDMEn 0x2000000 - -#define bOFDMRxADCPhase 0x10000 /* Useless now */ -#define bOFDMTxDACPhase 0x40000 -#define bXATxAGC 0x3f - -#define bAntennaSelect 0x0300 - -#define bXBTxAGC 0xf00 /* Reg 80c rFPGA0_TxGainStage */ -#define bXCTxAGC 0xf000 -#define bXDTxAGC 0xf0000 - -#define bPAStart 0xf0000000 /* Useless now */ -#define bTRStart 0x00f00000 -#define bRFStart 0x0000f000 -#define bBBStart 0x000000f0 -#define bBBCCKStart 0x0000000f -#define bPAEnd 0xf /* Reg0x814 */ -#define bTREnd 0x0f000000 -#define bRFEnd 0x000f0000 -#define bCCAMask 0x000000f0 /* T2R */ -#define bR2RCCAMask 0x00000f00 -#define bHSSI_R2TDelay 0xf8000000 -#define bHSSI_T2RDelay 0xf80000 -#define bContTxHSSI 0x400 /* chane gain at continue Tx */ -#define bIGFromCCK 0x200 -#define bAGCAddress 0x3f -#define bRxHPTx 0x7000 -#define bRxHPT2R 0x38000 -#define bRxHPCCKIni 0xc0000 -#define bAGCTxCode 0xc00000 -#define bAGCRxCode 0x300000 #define b3WireDataLength 0x800 /* Reg 0x820~84f rFPGA0_XA_HSSIParameter1 */ #define b3WireAddressLength 0x400 -#define b3WireRFPowerDown 0x1 /* Useless now */ -/* define bHWSISelect 0x8 */ -#define b2GPAPEPolarity 0x80000000 -#define bRFSW_TxDefaultAnt 0x3 -#define bRFSW_TxOptionAnt 0x30 -#define bRFSW_RxDefaultAnt 0x300 -#define bRFSW_RxOptionAnt 0x3000 -#define bRFSI_3WireData 0x1 -#define bRFSI_3WireClock 0x2 -#define bRFSI_3WireLoad 0x4 -#define bRFSI_3WireRW 0x8 -#define bRFSI_3Wire 0xf - #define bRFSI_RFENV 0x10 /* Reg 0x870 rFPGA0_XAB_RFInterfaceSW */ -#define bRFSI_TRSW 0x20 /* Useless now */ -#define bRFSI_TRSWB 0x40 -#define bRFSI_ANTSW 0x100 -#define bRFSI_ANTSWB 0x200 -#define bRFSI_PAPE 0x400 -#define bBandSelect 0x1 -#define bHTSIG2_GI 0x80 -#define bHTSIG2_Smoothing 0x01 -#define bHTSIG2_Sounding 0x02 -#define bHTSIG2_Aggreaton 0x08 -#define bHTSIG2_STBC 0x30 -#define bHTSIG2_AdvCoding 0x40 -#define bHTSIG2_NumOfHTLTF 0x300 -#define bHTSIG2_CRC8 0x3fc -#define bHTSIG1_MCS 0x7f -#define bHTSIG1_BandWidth 0x80 -#define bHTSIG1_HTLength 0xffff -#define bLSIG_Rate 0xf -#define bLSIG_Reserved 0x10 -#define bLSIG_Length 0x1fffe -#define bLSIG_Parity 0x20 -#define bCCKRxPhase 0x4 - #define bLSSIReadAddress 0x7f800000 /* T65 RF */ #define bLSSIReadEdge 0x80000000 /* LSSI "Read" edge signal */ #define bLSSIReadBackData 0xfffff /* T65 RF */ -#define bLSSIReadOKFlag 0x1000 /* Useless now */ -#define bCCKSampleRate 0x8 /* 0: 44MHz, 1:88MHz */ -#define bRegulator0Standby 0x1 -#define bRegulatorPLLStandby 0x2 -#define bRegulator1Standby 0x4 -#define bPLLPowerUp 0x8 -#define bDPLLPowerUp 0x10 -#define bDA10PowerUp 0x20 -#define bAD7PowerUp 0x200 -#define bDA6PowerUp 0x2000 -#define bXtalPowerUp 0x4000 -#define b40MDClkPowerUP 0x8000 -#define bDA6DebugMode 0x20000 -#define bDA6Swing 0x380000 - -#define bADClkPhase 0x4000000 /* Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ */ - -#define b80MClkDelay 0x18000000 /* Useless */ -#define bAFEWatchDogEnable 0x20000000 - -#define bXtalCap01 0xc0000000 /* Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap */ -#define bXtalCap23 0x3 -#define bXtalCap92x 0x0f000000 -#define bXtalCap 0x0f000000 - -#define bIntDifClkEnable 0x400 /* Useless */ -#define bExtSigClkEnable 0x800 -#define bBandgapMbiasPowerUp 0x10000 -#define bAD11SHGain 0xc0000 -#define bAD11InputRange 0x700000 -#define bAD11OPCurrent 0x3800000 -#define bIPathLoopback 0x4000000 -#define bQPathLoopback 0x8000000 -#define bAFELoopback 0x10000000 -#define bDA10Swing 0x7e0 -#define bDA10Reverse 0x800 -#define bDAClkSource 0x1000 -#define bAD7InputRange 0x6000 -#define bAD7Gain 0x38000 -#define bAD7OutputCMMode 0x40000 -#define bAD7InputCMMode 0x380000 -#define bAD7Current 0xc00000 -#define bRegulatorAdjust 0x7000000 -#define bAD11PowerUpAtTx 0x1 -#define bDA10PSAtTx 0x10 -#define bAD11PowerUpAtRx 0x100 -#define bDA10PSAtRx 0x1000 -#define bCCKRxAGCFormat 0x200 -#define bPSDFFTSamplepPoint 0xc000 -#define bPSDAverageNum 0x3000 -#define bIQPathControl 0xc00 -#define bPSDFreq 0x3ff -#define bPSDAntennaPath 0x30 -#define bPSDIQSwitch 0x40 -#define bPSDRxTrigger 0x400000 -#define bPSDTxTrigger 0x80000000 -#define bPSDSineToneScale 0x7f000000 -#define bPSDReport 0xffff - -/* 3. Page9(0x900) */ -#define bOFDMTxSC 0x30000000 /* Useless */ -#define bCCKTxOn 0x1 -#define bOFDMTxOn 0x2 -#define bDebugPage 0xfff /* reset debug page and also HWord, LWord */ -#define bDebugItem 0xff /* reset debug page and LWord */ -#define bAntL 0x10 -#define bAntNonHT 0x100 -#define bAntHT1 0x1000 -#define bAntHT2 0x10000 -#define bAntHT1S1 0x100000 -#define bAntNonHTS1 0x1000000 - /* 4. PageA(0xA00) */ -#define bCCKBBMode 0x3 /* Useless */ -#define bCCKTxPowerSaving 0x80 -#define bCCKRxPowerSaving 0x40 - #define bCCKSideBand 0x10 /* Reg 0xa00 rCCK0_System 20/40 switch */ -#define bCCKScramble 0x8 /* Useless */ -#define bCCKAntDiversity 0x8000 -#define bCCKCarrierRecovery 0x4000 -#define bCCKTxRate 0x3000 -#define bCCKDCCancel 0x0800 -#define bCCKISICancel 0x0400 -#define bCCKMatchFilter 0x0200 -#define bCCKEqualizer 0x0100 -#define bCCKPreambleDetect 0x800000 -#define bCCKFastFalseCCA 0x400000 -#define bCCKChEstStart 0x300000 -#define bCCKCCACount 0x080000 -#define bCCKcs_lim 0x070000 -#define bCCKBistMode 0x80000000 -#define bCCKCCAMask 0x40000000 -#define bCCKTxDACPhase 0x4 -#define bCCKRxADCPhase 0x20000000 /* r_rx_clk */ -#define bCCKr_cp_mode0 0x0100 -#define bCCKTxDCOffset 0xf0 -#define bCCKRxDCOffset 0xf -#define bCCKCCAMode 0xc000 -#define bCCKFalseCS_lim 0x3f00 -#define bCCKCS_ratio 0xc00000 -#define bCCKCorgBit_sel 0x300000 -#define bCCKPD_lim 0x0f0000 -#define bCCKNewCCA 0x80000000 -#define bCCKRxHPofIG 0x8000 -#define bCCKRxIG 0x7f00 -#define bCCKLNAPolarity 0x800000 -#define bCCKRx1stGain 0x7f0000 -#define bCCKRFExtend 0x20000000 /* CCK Rx Iinital gain polarity */ -#define bCCKRxAGCSatLevel 0x1f000000 -#define bCCKRxAGCSatCount 0xe0 -#define bCCKRxRFSettle 0x1f /* AGCsamp_dly */ -#define bCCKFixedRxAGC 0x8000 -#define bCCKAntennaPolarity 0x2000 -#define bCCKTxFilterType 0x0c00 -#define bCCKRxAGCReportType 0x0300 -#define bCCKRxDAGCEn 0x80000000 -#define bCCKRxDAGCPeriod 0x20000000 -#define bCCKRxDAGCSatLevel 0x1f000000 -#define bCCKTimingRecovery 0x800000 -#define bCCKTxC0 0x3f0000 -#define bCCKTxC1 0x3f000000 -#define bCCKTxC2 0x3f -#define bCCKTxC3 0x3f00 -#define bCCKTxC4 0x3f0000 -#define bCCKTxC5 0x3f000000 -#define bCCKTxC6 0x3f -#define bCCKTxC7 0x3f00 -#define bCCKDebugPort 0xff0000 -#define bCCKDACDebug 0x0f000000 -#define bCCKFalseAlarmEnable 0x8000 -#define bCCKFalseAlarmRead 0x4000 -#define bCCKTRSSI 0x7f -#define bCCKRxAGCReport 0xfe -#define bCCKRxReport_AntSel 0x80000000 -#define bCCKRxReport_MFOff 0x40000000 -#define bCCKRxRxReport_SQLoss 0x20000000 -#define bCCKRxReport_Pktloss 0x10000000 -#define bCCKRxReport_Lockedbit 0x08000000 -#define bCCKRxReport_RateError 0x04000000 -#define bCCKRxReport_RxRate 0x03000000 -#define bCCKRxFACounterLower 0xff -#define bCCKRxFACounterUpper 0xff000000 -#define bCCKRxHPAGCStart 0xe000 -#define bCCKRxHPAGCFinal 0x1c00 -#define bCCKRxFalseAlarmEnable 0x8000 -#define bCCKFACounterFreeze 0x4000 -#define bCCKTxPathSel 0x10000000 -#define bCCKDefaultRxPath 0xc000000 -#define bCCKOptionRxPath 0x3000000 - -/* 5. PageC(0xC00) */ -#define bNumOfSTF 0x3 /* Useless */ -#define bShift_L 0xc0 -#define bGI_TH 0xc -#define bRxPathA 0x1 -#define bRxPathB 0x2 -#define bRxPathC 0x4 -#define bRxPathD 0x8 -#define bTxPathA 0x1 -#define bTxPathB 0x2 -#define bTxPathC 0x4 -#define bTxPathD 0x8 -#define bTRSSIFreq 0x200 -#define bADCBackoff 0x3000 -#define bDFIRBackoff 0xc000 -#define bTRSSILatchPhase 0x10000 -#define bRxIDCOffset 0xff -#define bRxQDCOffset 0xff00 -#define bRxDFIRMode 0x1800000 -#define bRxDCNFType 0xe000000 -#define bRXIQImb_A 0x3ff -#define bRXIQImb_B 0xfc00 -#define bRXIQImb_C 0x3f0000 -#define bRXIQImb_D 0xffc00000 -#define bDC_dc_Notch 0x60000 -#define bRxNBINotch 0x1f000000 -#define bPD_TH 0xf -#define bPD_TH_Opt2 0xc000 -#define bPWED_TH 0x700 -#define bIfMF_Win_L 0x800 -#define bPD_Option 0x1000 -#define bMF_Win_L 0xe000 -#define bBW_Search_L 0x30000 -#define bwin_enh_L 0xc0000 -#define bBW_TH 0x700000 -#define bED_TH2 0x3800000 -#define bBW_option 0x4000000 -#define bRatio_TH 0x18000000 -#define bWindow_L 0xe0000000 -#define bSBD_Option 0x1 -#define bFrame_TH 0x1c -#define bFS_Option 0x60 -#define bDC_Slope_check 0x80 -#define bFGuard_Counter_DC_L 0xe00 -#define bFrame_Weight_Short 0x7000 -#define bSub_Tune 0xe00000 -#define bFrame_DC_Length 0xe000000 -#define bSBD_start_offset 0x30000000 -#define bFrame_TH_2 0x7 -#define bFrame_GI2_TH 0x38 -#define bGI2_Sync_en 0x40 -#define bSarch_Short_Early 0x300 -#define bSarch_Short_Late 0xc00 -#define bSarch_GI2_Late 0x70000 -#define bCFOAntSum 0x1 -#define bCFOAcc 0x2 -#define bCFOStartOffset 0xc -#define bCFOLookBack 0x70 -#define bCFOSumWeight 0x80 -#define bDAGCEnable 0x10000 -#define bTXIQImb_A 0x3ff -#define bTXIQImb_B 0xfc00 -#define bTXIQImb_C 0x3f0000 -#define bTXIQImb_D 0xffc00000 -#define bTxIDCOffset 0xff -#define bTxQDCOffset 0xff00 -#define bTxDFIRMode 0x10000 -#define bTxPesudoNoiseOn 0x4000000 -#define bTxPesudoNoise_A 0xff -#define bTxPesudoNoise_B 0xff00 -#define bTxPesudoNoise_C 0xff0000 -#define bTxPesudoNoise_D 0xff000000 -#define bCCADropOption 0x20000 -#define bCCADropThres 0xfff00000 -#define bEDCCA_H 0xf -#define bEDCCA_L 0xf0 -#define bLambda_ED 0x300 -#define bRxInitialGain 0x7f -#define bRxAntDivEn 0x80 -#define bRxAGCAddressForLNA 0x7f00 -#define bRxHighPowerFlow 0x8000 -#define bRxAGCFreezeThres 0xc0000 -#define bRxFreezeStep_AGC1 0x300000 -#define bRxFreezeStep_AGC2 0xc00000 -#define bRxFreezeStep_AGC3 0x3000000 -#define bRxFreezeStep_AGC0 0xc000000 -#define bRxRssi_Cmp_En 0x10000000 -#define bRxQuickAGCEn 0x20000000 -#define bRxAGCFreezeThresMode 0x40000000 -#define bRxOverFlowCheckType 0x80000000 -#define bRxAGCShift 0x7f -#define bTRSW_Tri_Only 0x80 -#define bPowerThres 0x300 -#define bRxAGCEn 0x1 -#define bRxAGCTogetherEn 0x2 -#define bRxAGCMin 0x4 -#define bRxHP_Ini 0x7 -#define bRxHP_TRLNA 0x70 -#define bRxHP_RSSI 0x700 -#define bRxHP_BBP1 0x7000 -#define bRxHP_BBP2 0x70000 -#define bRxHP_BBP3 0x700000 -#define bRSSI_H 0x7f0000 /* the threshold for high power */ -#define bRSSI_Gen 0x7f000000 /* the threshold for ant diversity */ -#define bRxSettle_TRSW 0x7 -#define bRxSettle_LNA 0x38 -#define bRxSettle_RSSI 0x1c0 -#define bRxSettle_BBP 0xe00 -#define bRxSettle_RxHP 0x7000 -#define bRxSettle_AntSW_RSSI 0x38000 -#define bRxSettle_AntSW 0xc0000 -#define bRxProcessTime_DAGC 0x300000 -#define bRxSettle_HSSI 0x400000 -#define bRxProcessTime_BBPPW 0x800000 -#define bRxAntennaPowerShift 0x3000000 -#define bRSSITableSelect 0xc000000 -#define bRxHP_Final 0x7000000 -#define bRxHTSettle_BBP 0x7 -#define bRxHTSettle_HSSI 0x8 -#define bRxHTSettle_RxHP 0x70 -#define bRxHTSettle_BBPPW 0x80 -#define bRxHTSettle_Idle 0x300 -#define bRxHTSettle_Reserved 0x1c00 -#define bRxHTRxHPEn 0x8000 -#define bRxHTAGCFreezeThres 0x30000 -#define bRxHTAGCTogetherEn 0x40000 -#define bRxHTAGCMin 0x80000 -#define bRxHTAGCEn 0x100000 -#define bRxHTDAGCEn 0x200000 -#define bRxHTRxHP_BBP 0x1c00000 -#define bRxHTRxHP_Final 0xe0000000 -#define bRxPWRatioTH 0x3 -#define bRxPWRatioEn 0x4 -#define bRxMFHold 0x3800 -#define bRxPD_Delay_TH1 0x38 -#define bRxPD_Delay_TH2 0x1c0 -#define bRxPD_DC_COUNT_MAX 0x600 -/* define bRxMF_Hold 0x3800 */ -#define bRxPD_Delay_TH 0x8000 -#define bRxProcess_Delay 0xf0000 -#define bRxSearchrange_GI2_Early 0x700000 -#define bRxFrame_Guard_Counter_L 0x3800000 -#define bRxSGI_Guard_L 0xc000000 -#define bRxSGI_Search_L 0x30000000 -#define bRxSGI_TH 0xc0000000 -#define bDFSCnt0 0xff -#define bDFSCnt1 0xff00 -#define bDFSFlag 0xf0000 -#define bMFWeightSum 0x300000 -#define bMinIdxTH 0x7f000000 -#define bDAFormat 0x40000 -#define bTxChEmuEnable 0x01000000 -#define bTRSWIsolation_A 0x7f -#define bTRSWIsolation_B 0x7f00 -#define bTRSWIsolation_C 0x7f0000 -#define bTRSWIsolation_D 0x7f000000 -#define bExtLNAGain 0x7c00 - -/* 6. PageE(0xE00) */ -#define bSTBCEn 0x4 /* Useless */ -#define bAntennaMapping 0x10 -#define bNss 0x20 -#define bCFOAntSumD 0x200 -#define bPHYCounterReset 0x8000000 -#define bCFOReportGet 0x4000000 -#define bOFDMContinueTx 0x10000000 -#define bOFDMSingleCarrier 0x20000000 -#define bOFDMSingleTone 0x40000000 -/* define bRxPath1 0x01 */ -/* define bRxPath2 0x02 */ -/* define bRxPath3 0x04 */ -/* define bRxPath4 0x08 */ -/* define bTxPath1 0x10 */ -/* define bTxPath2 0x20 */ -#define bHTDetect 0x100 -#define bCFOEn 0x10000 -#define bCFOValue 0xfff00000 -#define bSigTone_Re 0x3f -#define bSigTone_Im 0x7f00 -#define bCounter_CCA 0xffff -#define bCounter_ParityFail 0xffff0000 -#define bCounter_RateIllegal 0xffff -#define bCounter_CRC8Fail 0xffff0000 -#define bCounter_MCSNoSupport 0xffff -#define bCounter_FastSync 0xffff -#define bShortCFO 0xfff -#define bShortCFOTLength 12 /* total */ -#define bShortCFOFLength 11 /* fraction */ -#define bLongCFO 0x7ff -#define bLongCFOTLength 11 -#define bLongCFOFLength 11 -#define bTailCFO 0x1fff -#define bTailCFOTLength 13 -#define bTailCFOFLength 12 -#define bmax_en_pwdB 0xffff -#define bCC_power_dB 0xffff0000 -#define bnoise_pwdB 0xffff -#define bPowerMeasTLength 10 -#define bPowerMeasFLength 3 -#define bRx_HT_BW 0x1 -#define bRxSC 0x6 -#define bRx_HT 0x8 -#define bNB_intf_det_on 0x1 -#define bIntf_win_len_cfg 0x30 -#define bNB_Intf_TH_cfg 0x1c0 -#define bRFGain 0x3f -#define bTableSel 0x40 -#define bTRSW 0x80 -#define bRxSNR_A 0xff -#define bRxSNR_B 0xff00 -#define bRxSNR_C 0xff0000 -#define bRxSNR_D 0xff000000 -#define bSNREVMTLength 8 -#define bSNREVMFLength 1 -#define bCSI1st 0xff -#define bCSI2nd 0xff00 -#define bRxEVM1st 0xff0000 -#define bRxEVM2nd 0xff000000 -#define bSIGEVM 0xff -#define bPWDB 0xff00 -#define bSGIEN 0x10000 - -#define bSFactorQAM1 0xf /* Useless */ -#define bSFactorQAM2 0xf0 -#define bSFactorQAM3 0xf00 -#define bSFactorQAM4 0xf000 -#define bSFactorQAM5 0xf0000 -#define bSFactorQAM6 0xf0000 -#define bSFactorQAM7 0xf00000 -#define bSFactorQAM8 0xf000000 -#define bSFactorQAM9 0xf0000000 -#define bCSIScheme 0x100000 - -#define bNoiseLvlTopSet 0x3 /* Useless */ -#define bChSmooth 0x4 -#define bChSmoothCfg1 0x38 -#define bChSmoothCfg2 0x1c0 -#define bChSmoothCfg3 0xe00 -#define bChSmoothCfg4 0x7000 -#define bMRCMode 0x800000 -#define bTHEVMCfg 0x7000000 - -#define bLoopFitType 0x1 /* Useless */ -#define bUpdCFO 0x40 -#define bUpdCFOOffData 0x80 -#define bAdvUpdCFO 0x100 -#define bAdvTimeCtrl 0x800 -#define bUpdClko 0x1000 -#define bFC 0x6000 -#define bTrackingMode 0x8000 -#define bPhCmpEnable 0x10000 -#define bUpdClkoLTF 0x20000 -#define bComChCFO 0x40000 -#define bCSIEstiMode 0x80000 -#define bAdvUpdEqz 0x100000 -#define bUChCfg 0x7000000 -#define bUpdEqz 0x8000000 - -/* Rx Pseduo noise */ -#define bRxPesudoNoiseOn 0x20000000 /* Useless */ -#define bRxPesudoNoise_A 0xff -#define bRxPesudoNoise_B 0xff00 -#define bRxPesudoNoise_C 0xff0000 -#define bRxPesudoNoise_D 0xff000000 -#define bPesudoNoiseState_A 0xffff -#define bPesudoNoiseState_B 0xffff0000 -#define bPesudoNoiseState_C 0xffff -#define bPesudoNoiseState_D 0xffff0000 - -/* 7. RF Register */ -/* Zebra1 */ -#define bZebra1_HSSIEnable 0x8 /* Useless */ -#define bZebra1_TRxControl 0xc00 -#define bZebra1_TRxGainSetting 0x07f -#define bZebra1_RxCorner 0xc00 -#define bZebra1_TxChargePump 0x38 -#define bZebra1_RxChargePump 0x7 -#define bZebra1_ChannelNum 0xf80 -#define bZebra1_TxLPFBW 0x400 -#define bZebra1_RxLPFBW 0x600 - -/* Zebra4 */ -#define bRTL8256RegModeCtrl1 0x100 /* Useless */ -#define bRTL8256RegModeCtrl0 0x40 -#define bRTL8256_TxLPFBW 0x18 -#define bRTL8256_RxLPFBW 0x600 - -/* RTL8258 */ -#define bRTL8258_TxLPFBW 0xc /* Useless */ -#define bRTL8258_RxLPFBW 0xc00 -#define bRTL8258_RSSILPFBW 0xc0 - - /* */ /* Other Definition */ /* */ -/* byte endable for sb_write */ -#define bByte0 0x1 /* Useless */ -#define bByte1 0x2 -#define bByte2 0x4 -#define bByte3 0x8 -#define bWord0 0x3 -#define bWord1 0xc -#define bDWord 0xf - /* for PutRegsetting & GetRegSetting BitMask */ #define bMaskByte0 0xff /* Reg 0xc50 rOFDM0_XAAGCCore~0xC6f */ #define bMaskByte1 0xff00 @@ -1065,48 +224,9 @@ #define bMaskH3Bytes 0xffffff00 #define bMask12Bits 0xfff #define bMaskH4Bits 0xf0000000 -#define bMaskOFDM_D 0xffc00000 -#define bMaskCCK 0x3f3f3f3f - #define bEnable 0x1 /* Useless */ -#define bDisable 0x0 - -#define LeftAntenna 0x0 /* Useless */ -#define RightAntenna 0x1 - -#define tCheckTxStatus 500 /* 500ms Useless */ -#define tUpdateRxCounter 100 /* 100ms */ - -#define rateCCK 0 /* Useless */ -#define rateOFDM 1 -#define rateHT 2 - -/* define Register-End */ -#define bPMAC_End 0x1ff /* Useless */ -#define bFPGAPHY0_End 0x8ff -#define bFPGAPHY1_End 0x9ff -#define bCCKPHY0_End 0xaff -#define bOFDMPHY0_End 0xcff -#define bOFDMPHY1_End 0xdff - -/* define max debug item in each debug page */ -/* define bMaxItem_FPGA_PHY0 0x9 */ -/* define bMaxItem_FPGA_PHY1 0x3 */ -/* define bMaxItem_PHY_11B 0x16 */ -/* define bMaxItem_OFDM_PHY0 0x29 */ -/* define bMaxItem_OFDM_PHY1 0x0 */ - -#define bPMACControl 0x0 /* Useless */ -#define bWMACControl 0x1 -#define bWNICControl 0x2 - -#define PathA 0x0 /* Useless */ -#define PathB 0x1 -#define PathC 0x2 -#define PathD 0x3 - -/*--------------------------Define Parameters-------------------------------*/ +#define rDPDT_control 0x92c #endif /* __INC_HAL8192SPHYREG_H */ diff --git a/drivers/staging/rtl8723bs/include/HalPwrSeqCmd.h b/drivers/staging/rtl8723bs/include/HalPwrSeqCmd.h index e30071935d27..b81252d374ef 100644 --- a/drivers/staging/rtl8723bs/include/HalPwrSeqCmd.h +++ b/drivers/staging/rtl8723bs/include/HalPwrSeqCmd.h @@ -49,8 +49,6 @@ /*---------------------------------------------*/ /* define the base address of each block */ #define PWR_BASEADDR_MAC 0x00 -#define PWR_BASEADDR_USB 0x01 -#define PWR_BASEADDR_PCIE 0x02 #define PWR_BASEADDR_SDIO 0x03 /*---------------------------------------------*/ @@ -64,21 +62,12 @@ /*---------------------------------------------*/ /* 3 The value of fab_msk: 4 bits */ /*---------------------------------------------*/ -#define PWR_FAB_TSMC_MSK BIT(0) -#define PWR_FAB_UMC_MSK BIT(1) #define PWR_FAB_ALL_MSK (BIT(0)|BIT(1)|BIT(2)|BIT(3)) /*---------------------------------------------*/ /* 3 The value of cut_msk: 8 bits */ /*---------------------------------------------*/ #define PWR_CUT_TESTCHIP_MSK BIT(0) -#define PWR_CUT_A_MSK BIT(1) -#define PWR_CUT_B_MSK BIT(2) -#define PWR_CUT_C_MSK BIT(3) -#define PWR_CUT_D_MSK BIT(4) -#define PWR_CUT_E_MSK BIT(5) -#define PWR_CUT_F_MSK BIT(6) -#define PWR_CUT_G_MSK BIT(7) #define PWR_CUT_ALL_MSK 0xFF diff --git a/drivers/staging/rtl8723bs/include/drv_types.h b/drivers/staging/rtl8723bs/include/drv_types.h index ea6bb44c5e1d..9e6ca1dec525 100644 --- a/drivers/staging/rtl8723bs/include/drv_types.h +++ b/drivers/staging/rtl8723bs/include/drv_types.h @@ -490,7 +490,6 @@ static inline u8 *myid(struct eeprom_priv *peepriv) } /* HCI Related header file */ -#include <sdio_osintf.h> #include <sdio_ops.h> #include <sdio_hal.h> diff --git a/drivers/staging/rtl8723bs/include/hal_com_h2c.h b/drivers/staging/rtl8723bs/include/hal_com_h2c.h index 24cd9415fa95..a59d13090565 100644 --- a/drivers/staging/rtl8723bs/include/hal_com_h2c.h +++ b/drivers/staging/rtl8723bs/include/hal_com_h2c.h @@ -9,86 +9,10 @@ #define H2C_RSVDPAGE_LOC_LEN 5 #define H2C_MEDIA_STATUS_RPT_LEN 3 -#define H2C_KEEP_ALIVE_CTRL_LEN 2 -#define H2C_DISCON_DECISION_LEN 3 -#define H2C_AP_OFFLOAD_LEN 3 -#define H2C_AP_WOW_GPIO_CTRL_LEN 4 -#define H2C_AP_PS_LEN 2 #define H2C_PWRMODE_LEN 7 #define H2C_PSTUNEPARAM_LEN 4 #define H2C_MACID_CFG_LEN 7 -#define H2C_BTMP_OPER_LEN 4 -#define H2C_WOWLAN_LEN 4 -#define H2C_REMOTE_WAKE_CTRL_LEN 3 -#define H2C_AOAC_GLOBAL_INFO_LEN 2 -#define H2C_AOAC_RSVDPAGE_LOC_LEN 7 -#define H2C_SCAN_OFFLOAD_CTRL_LEN 4 -#define H2C_BT_FW_PATCH_LEN 6 #define H2C_RSSI_SETTING_LEN 4 -#define H2C_AP_REQ_TXRPT_LEN 2 -#define H2C_FORCE_BT_TXPWR_LEN 3 -#define H2C_BCN_RSVDPAGE_LEN 5 -#define H2C_PROBERSP_RSVDPAGE_LEN 5 - -/* _RSVDPAGE_LOC_CMD_0x00 */ -#define SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd, 0, 8, __Value) -#define SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+1, 0, 8, __Value) -#define SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+2, 0, 8, __Value) -#define SET_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+3, 0, 8, __Value) -#define SET_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(__pH2CCmd, __Value)SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+4, 0, 8, __Value) - -/* _MEDIA_STATUS_RPT_PARM_CMD_0x01 */ -#define SET_H2CCMD_MSRRPT_PARM_OPMODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) -#define SET_H2CCMD_MSRRPT_PARM_MACID_IND(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) -#define SET_H2CCMD_MSRRPT_PARM_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd+1, 0, 8, __Value) -#define SET_H2CCMD_MSRRPT_PARM_MACID_END(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd+2, 0, 8, __Value) - -/* _KEEP_ALIVE_CMD_0x03 */ -#define SET_H2CCMD_KEEPALIVE_PARM_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) -#define SET_H2CCMD_KEEPALIVE_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) -#define SET_H2CCMD_KEEPALIVE_PARM_PKT_TYPE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) -#define SET_H2CCMD_KEEPALIVE_PARM_CHECK_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd+1, 0, 8, __Value) - -/* _DISCONNECT_DECISION_CMD_0x04 */ -#define SET_H2CCMD_DISCONDECISION_PARM_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) -#define SET_H2CCMD_DISCONDECISION_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) -#define SET_H2CCMD_DISCONDECISION_PARM_CHECK_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd+1, 0, 8, __Value) -#define SET_H2CCMD_DISCONDECISION_PARM_TRY_PKT_NUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd+2, 0, 8, __Value) - -/* _WoWLAN PARAM_CMD_0x80 */ -#define SET_H2CCMD_WOWLAN_FUNC_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) -#define SET_H2CCMD_WOWLAN_PATTERN_MATCH_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) -#define SET_H2CCMD_WOWLAN_MAGIC_PKT_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) -#define SET_H2CCMD_WOWLAN_UNICAST_PKT_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value) -#define SET_H2CCMD_WOWLAN_ALL_PKT_DROP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 1, __Value) -#define SET_H2CCMD_WOWLAN_GPIO_ACTIVE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 5, 1, __Value) -#define SET_H2CCMD_WOWLAN_REKEY_WAKE_UP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 6, 1, __Value) -#define SET_H2CCMD_WOWLAN_DISCONNECT_WAKE_UP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 7, 1, __Value) -#define SET_H2CCMD_WOWLAN_GPIONUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 7, __Value) -#define SET_H2CCMD_WOWLAN_DATAPIN_WAKE_UP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 7, 1, __Value) -#define SET_H2CCMD_WOWLAN_GPIO_DURATION(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+2, 0, 8, __Value) -/* define SET_H2CCMD_WOWLAN_GPIO_PULSE_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 1, __Value) */ -#define SET_H2CCMD_WOWLAN_GPIO_PULSE_COUNT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+3, 0, 8, __Value) - -/* _REMOTE_WAKEUP_CMD_0x81 */ -#define SET_H2CCMD_REMOTE_WAKECTRL_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) -#define SET_H2CCMD_REMOTE_WAKE_CTRL_ARP_OFFLOAD_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) -#define SET_H2CCMD_REMOTE_WAKE_CTRL_NDP_OFFLOAD_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) -#define SET_H2CCMD_REMOTE_WAKE_CTRL_GTK_OFFLOAD_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value) -#define SET_H2CCMD_REMOTE_WAKE_CTRL_NLO_OFFLOAD_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 1, __Value) -#define SET_H2CCMD_REMOTE_WAKE_CTRL_FW_UNICAST_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 7, 1, __Value) -#define SET_H2CCMD_REMOTE_WAKE_CTRL_ARP_ACTION(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 1, __Value) - -/* AOAC_GLOBAL_INFO_0x82 */ -#define SET_H2CCMD_AOAC_GLOBAL_INFO_PAIRWISE_ENC_ALG(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd, 0, 8, __Value) -#define SET_H2CCMD_AOAC_GLOBAL_INFO_GROUP_ENC_ALG(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+1, 0, 8, __Value) - -/* AOAC_RSVDPAGE_LOC_0x83 */ -#define SET_H2CCMD_AOAC_RSVDPAGE_LOC_REMOTE_WAKE_CTRL_INFO(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd), 0, 8, __Value) -#define SET_H2CCMD_AOAC_RSVDPAGE_LOC_ARP_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+1, 0, 8, __Value) -#define SET_H2CCMD_AOAC_RSVDPAGE_LOC_NEIGHBOR_ADV(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+2, 0, 8, __Value) -#define SET_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+3, 0, 8, __Value) -#define SET_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_INFO(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+4, 0, 8, __Value) /* */ /* Structure -------------------------------------------------- */ diff --git a/drivers/staging/rtl8723bs/include/hal_com_reg.h b/drivers/staging/rtl8723bs/include/hal_com_reg.h index d8d03752dc2e..9a02ae69d7a4 100644 --- a/drivers/staging/rtl8723bs/include/hal_com_reg.h +++ b/drivers/staging/rtl8723bs/include/hal_com_reg.h @@ -7,91 +7,34 @@ #ifndef __HAL_COMMON_REG_H__ #define __HAL_COMMON_REG_H__ - -#define MAC_ADDR_LEN 6 - -#define HAL_NAV_UPPER_UNIT 128 /* micro-second */ - -/* 8188E PKT_BUFF_ACCESS_CTRL value */ -#define TXPKT_BUF_SELECT 0x69 -#define RXPKT_BUF_SELECT 0xA5 -#define DISABLE_TRXPKT_BUF_ACCESS 0x0 - -/* */ -/* */ -/* */ - /* */ /* */ /* 0x0000h ~ 0x00FFh System Configuration */ /* */ /* */ -#define REG_SYS_ISO_CTRL 0x0000 #define REG_SYS_FUNC_EN 0x0002 #define REG_APS_FSMCO 0x0004 #define REG_SYS_CLKR 0x0008 #define REG_9346CR 0x000A #define REG_SYS_EEPROM_CTRL 0x000A -#define REG_EE_VPD 0x000C -#define REG_AFE_MISC 0x0010 -#define REG_SPS0_CTRL 0x0011 -#define REG_SPS0_CTRL_6 0x0016 -#define REG_POWER_OFF_IN_PROCESS 0x0017 -#define REG_SPS_OCP_CFG 0x0018 #define REG_RSV_CTRL 0x001C #define REG_RF_CTRL 0x001F -#define REG_LDOA15_CTRL 0x0020 -#define REG_LDOV12D_CTRL 0x0021 -#define REG_LDOHCI12_CTRL 0x0022 -#define REG_LPLDO_CTRL 0x0023 #define REG_AFE_XTAL_CTRL 0x0024 -#define REG_AFE_LDO_CTRL 0x0027 /* 1.5v for 8188EE test chip, 1.4v for MP chip */ -#define REG_AFE_PLL_CTRL 0x0028 #define REG_MAC_PHY_CTRL 0x002c /* for 92d, DMDP, SMSP, DMSP contrl */ -#define REG_APE_PLL_CTRL_EXT 0x002c #define REG_EFUSE_CTRL 0x0030 #define REG_EFUSE_TEST 0x0034 #define REG_PWR_DATA 0x0038 -#define REG_CAL_TIMER 0x003C -#define REG_ACLK_MON 0x003E #define REG_GPIO_MUXCFG 0x0040 -#define REG_GPIO_IO_SEL 0x0042 -#define REG_MAC_PINMUX_CFG 0x0043 -#define REG_GPIO_PIN_CTRL 0x0044 #define REG_GPIO_INTM 0x0048 #define REG_LEDCFG0 0x004C -#define REG_LEDCFG1 0x004D #define REG_LEDCFG2 0x004E -#define REG_LEDCFG3 0x004F -#define REG_FSIMR 0x0050 -#define REG_FSISR 0x0054 #define REG_HSIMR 0x0058 -#define REG_HSISR 0x005c -#define REG_GPIO_PIN_CTRL_2 0x0060 /* RTL8723 WIFI/BT/GPS Multi-Function GPIO Pin Control. */ #define REG_GPIO_IO_SEL_2 0x0062 /* RTL8723 WIFI/BT/GPS Multi-Function GPIO Select. */ #define REG_MULTI_FUNC_CTRL 0x0068 /* RTL8723 WIFI/BT/GPS Multi-Function control source. */ -#define REG_GSSR 0x006c -#define REG_AFE_XTAL_CTRL_EXT 0x0078 /* RTL8188E */ #define REG_MCUFWDL 0x0080 -#define REG_MCUTSTCFG 0x0084 -#define REG_FDHM0 0x0088 #define REG_EFUSE_ACCESS 0x00CF /* Efuse access protection for RTL8723 */ -#define REG_BIST_SCAN 0x00D0 -#define REG_BIST_RPT 0x00D4 -#define REG_BIST_ROM_RPT 0x00D8 -#define REG_USB_SIE_INTF 0x00E0 -#define REG_PCIE_MIO_INTF 0x00E4 -#define REG_PCIE_MIO_INTD 0x00E8 -#define REG_HPON_FSM 0x00EC #define REG_SYS_CFG 0x00F0 #define REG_GPIO_OUTSTS 0x00F4 /* For RTL8723 only. */ -#define REG_TYPE_ID 0x00FC - -/* */ -/* 2010/12/29 MH Add for 92D */ -/* */ -#define REG_MAC_PHY_CTRL_NORMAL 0x00f8 - /* */ /* */ @@ -100,44 +43,15 @@ /* */ #define REG_CR 0x0100 #define REG_PBP 0x0104 -#define REG_PKT_BUFF_ACCESS_CTRL 0x0106 #define REG_TRXDMA_CTRL 0x010C #define REG_TRXFF_BNDY 0x0114 -#define REG_TRXFF_STATUS 0x0118 -#define REG_RXFF_PTR 0x011C #define REG_HIMR 0x0120 #define REG_HISR 0x0124 -#define REG_HIMRE 0x0128 -#define REG_HISRE 0x012C -#define REG_CPWM 0x012F -#define REG_FWIMR 0x0130 -#define REG_FWISR 0x0134 -#define REG_FTIMR 0x0138 -#define REG_PKTBUF_DBG_CTRL 0x0140 -#define REG_RXPKTBUF_CTRL (REG_PKTBUF_DBG_CTRL+2) -#define REG_PKTBUF_DBG_DATA_L 0x0144 -#define REG_PKTBUF_DBG_DATA_H 0x0148 - -#define REG_TC0_CTRL 0x0150 -#define REG_TC1_CTRL 0x0154 -#define REG_TC2_CTRL 0x0158 -#define REG_TC3_CTRL 0x015C -#define REG_TC4_CTRL 0x0160 -#define REG_TCUNIT_BASE 0x0164 -#define REG_MBIST_START 0x0174 -#define REG_MBIST_DONE 0x0178 -#define REG_MBIST_FAIL 0x017C + #define REG_C2HEVT_MSG_NORMAL 0x01A0 #define REG_C2HEVT_CLEAR 0x01AF -#define REG_MCUTST_1 0x01c0 -#define REG_FMETHR 0x01C8 #define REG_HMETFR 0x01CC #define REG_HMEBOX_0 0x01D0 -#define REG_HMEBOX_1 0x01D4 -#define REG_HMEBOX_2 0x01D8 -#define REG_HMEBOX_3 0x01DC -#define REG_LLT_INIT 0x01E0 - /* */ /* */ @@ -145,9 +59,7 @@ /* */ /* */ #define REG_RQPN 0x0200 -#define REG_FIFOPAGE 0x0204 #define REG_TDECTRL 0x0208 -#define REG_TXDMA_OFFSET_CHK 0x020C #define REG_TXDMA_STATUS 0x0210 #define REG_RQPN_NPQ 0x0214 #define REG_AUTO_LLT 0x0224 @@ -160,109 +72,25 @@ /* */ #define REG_RXDMA_AGG_PG_TH 0x0280 #define REG_RXPKT_NUM 0x0284 -#define REG_RXDMA_STATUS 0x0288 - -/* */ -/* */ -/* 0x0300h ~ 0x03FFh PCIe */ -/* */ -/* */ -#define REG_PCIE_CTRL_REG 0x0300 -#define REG_INT_MIG 0x0304 /* Interrupt Migration */ -#define REG_BCNQ_DESA 0x0308 /* TX Beacon Descriptor Address */ -#define REG_HQ_DESA 0x0310 /* TX High Queue Descriptor Address */ -#define REG_MGQ_DESA 0x0318 /* TX Manage Queue Descriptor Address */ -#define REG_VOQ_DESA 0x0320 /* TX VO Queue Descriptor Address */ -#define REG_VIQ_DESA 0x0328 /* TX VI Queue Descriptor Address */ -#define REG_BEQ_DESA 0x0330 /* TX BE Queue Descriptor Address */ -#define REG_BKQ_DESA 0x0338 /* TX BK Queue Descriptor Address */ -#define REG_RX_DESA 0x0340 /* RX Queue Descriptor Address */ -/* sherry added for DBI Read/Write 20091126 */ -#define REG_DBI_WDATA 0x0348 /* Backdoor REG for Access Configuration */ -#define REG_DBI_RDATA 0x034C /* Backdoor REG for Access Configuration */ -#define REG_DBI_CTRL 0x0350 /* Backdoor REG for Access Configuration */ -#define REG_DBI_FLAG 0x0352 /* Backdoor REG for Access Configuration */ -#define REG_MDIO 0x0354 /* MDIO for Access PCIE PHY */ -#define REG_DBG_SEL 0x0360 /* Debug Selection Register */ -#define REG_PCIE_HRPWM 0x0361 /* PCIe RPWM */ -#define REG_PCIE_HCPWM 0x0363 /* PCIe CPWM */ -#define REG_WATCH_DOG 0x0368 - -/* RTL8723 series ------------------------------- */ -#define REG_PCIE_HISR_EN 0x0394 /* PCIE Local Interrupt Enable Register */ -#define REG_PCIE_HISR 0x03A0 -#define REG_PCIE_HISRE 0x03A4 -#define REG_PCIE_HIMR 0x03A8 -#define REG_PCIE_HIMRE 0x03AC - -#define REG_USB_HIMR 0xFE38 -#define REG_USB_HIMRE 0xFE3C -#define REG_USB_HISR 0xFE78 -#define REG_USB_HISRE 0xFE7C - /* */ /* */ /* 0x0400h ~ 0x047Fh Protocol Configuration */ /* */ /* */ -#define REG_VOQ_INFORMATION 0x0400 -#define REG_VIQ_INFORMATION 0x0404 -#define REG_BEQ_INFORMATION 0x0408 -#define REG_BKQ_INFORMATION 0x040C -#define REG_MGQ_INFORMATION 0x0410 -#define REG_HGQ_INFORMATION 0x0414 -#define REG_BCNQ_INFORMATION 0x0418 #define REG_TXPKT_EMPTY 0x041A -#define REG_CPU_MGQ_INFORMATION 0x041C #define REG_FWHW_TXQ_CTRL 0x0420 #define REG_HWSEQ_CTRL 0x0423 -#define REG_BCNQ_BDNY 0x0424 -#define REG_MGQ_BDNY 0x0425 -#define REG_LIFETIME_CTRL 0x0426 -#define REG_MULTI_BCNQ_OFFSET 0x0427 #define REG_SPEC_SIFS 0x0428 #define REG_RL 0x042A -#define REG_DARFRC 0x0430 -#define REG_RARFRC 0x0438 #define REG_RRSR 0x0440 -#define REG_ARFR0 0x0444 -#define REG_ARFR1 0x0448 -#define REG_ARFR2 0x044C -#define REG_ARFR3 0x0450 -#define REG_BCNQ1_BDNY 0x0457 - -#define REG_AGGLEN_LMT 0x0458 -#define REG_AMPDU_MIN_SPACE 0x045C -#define REG_WMAC_LBK_BF_HD 0x045D -#define REG_FAST_EDCA_CTRL 0x0460 -#define REG_RD_RESP_PKT_TH 0x0463 - -#define REG_INIRTS_RATE_SEL 0x0480 -#define REG_INIDATA_RATE_SEL 0x0484 - -#define REG_POWER_STAGE1 0x04B4 -#define REG_POWER_STAGE2 0x04B8 + #define REG_PKT_VO_VI_LIFE_TIME 0x04C0 #define REG_PKT_BE_BK_LIFE_TIME 0x04C2 -#define REG_STBC_SETTING 0x04C4 -#define REG_QUEUE_CTRL 0x04C6 -#define REG_SINGLE_AMPDU_CTRL 0x04c7 -#define REG_PROT_MODE_CTRL 0x04C8 -#define REG_MAX_AGGR_NUM 0x04CA -#define REG_RTS_MAX_AGGR_NUM 0x04CB #define REG_BAR_MODE_CTRL 0x04CC -#define REG_RA_TRY_RATE_AGG_LMT 0x04CF #define REG_EARLY_MODE_CONTROL 0x04D0 #define REG_MACID_SLEEP 0x04D4 #define REG_NQOS_SEQ 0x04DC -#define REG_QOS_SEQ 0x04DE -#define REG_NEED_CPU_HANDLE 0x04E0 -#define REG_PKT_LOSE_RPT 0x04E1 -#define REG_PTCL_ERR_STATUS 0x04E2 -#define REG_TX_RPT_CTRL 0x04EC -#define REG_TX_RPT_TIME 0x04F0 /* 2 byte */ -#define REG_DUMMY 0x04FC /* */ /* */ @@ -274,16 +102,11 @@ #define REG_EDCA_BE_PARAM 0x0508 #define REG_EDCA_BK_PARAM 0x050C #define REG_BCNTCFG 0x0510 -#define REG_PIFS 0x0512 -#define REG_RDG_PIFS 0x0513 #define REG_SIFS_CTX 0x0514 #define REG_SIFS_TRX 0x0516 #define REG_TSFTR_SYN_OFFSET 0x0518 -#define REG_AGGR_BREAK_TIME 0x051A #define REG_SLOT 0x051B -#define REG_TX_PTCL_CTRL 0x0520 #define REG_TXPAUSE 0x0522 -#define REG_DIS_TXREQ_CLR 0x0523 #define REG_RD_CTRL 0x0524 /* */ /* Format for offset 540h-542h: */ @@ -301,90 +124,39 @@ /* Described by Designer Tim and Bruce, 2011-01-14. */ /* */ #define REG_TBTT_PROHIBIT 0x0540 -#define REG_RD_NAV_NXT 0x0544 -#define REG_NAV_PROT_LEN 0x0546 #define REG_BCN_CTRL 0x0550 #define REG_BCN_CTRL_1 0x0551 -#define REG_MBID_NUM 0x0552 #define REG_DUAL_TSF_RST 0x0553 #define REG_BCN_INTERVAL 0x0554 /* The same as REG_MBSSID_BCN_SPACE */ #define REG_DRVERLYINT 0x0558 #define REG_BCNDMATIM 0x0559 #define REG_ATIMWND 0x055A -#define REG_USTIME_TSF 0x055C #define REG_BCN_MAX_ERR 0x055D #define REG_RXTSF_OFFSET_CCK 0x055E #define REG_RXTSF_OFFSET_OFDM 0x055F #define REG_TSFTR 0x0560 -#define REG_TSFTR1 0x0568 /* HW Port 1 TSF Register */ -#define REG_ATIMWND_1 0x0570 -#define REG_P2P_CTWIN 0x0572 /* 1 Byte long (in unit of TU) */ -#define REG_PSTIMER 0x0580 -#define REG_TIMER0 0x0584 -#define REG_TIMER1 0x0588 #define REG_ACMHWCTRL 0x05C0 -#define REG_NOA_DESC_SEL 0x05CF -#define REG_NOA_DESC_DURATION 0x05E0 -#define REG_NOA_DESC_INTERVAL 0x05E4 -#define REG_NOA_DESC_START 0x05E8 -#define REG_NOA_DESC_COUNT 0x05EC - -#define REG_DMC 0x05F0 /* Dual MAC Co-Existence Register */ -#define REG_SCH_TX_CMD 0x05F8 - -#define REG_FW_RESET_TSF_CNT_1 0x05FC -#define REG_FW_RESET_TSF_CNT_0 0x05FD -#define REG_FW_BCN_DIS_CNT 0x05FE /* */ /* */ /* 0x0600h ~ 0x07FFh WMAC Configuration */ /* */ /* */ -#define REG_APSD_CTRL 0x0600 #define REG_BWOPMODE 0x0603 #define REG_TCR 0x0604 #define REG_RCR 0x0608 -#define REG_RX_PKT_LIMIT 0x060C -#define REG_RX_DLK_TIME 0x060D #define REG_RX_DRVINFO_SZ 0x060F #define REG_MACID 0x0610 #define REG_BSSID 0x0618 #define REG_MAR 0x0620 -#define REG_MBIDCAMCFG 0x0628 -#define REG_PNO_STATUS 0x0631 -#define REG_USTIME_EDCA 0x0638 #define REG_MAC_SPEC_SIFS 0x063A /* 20100719 Joseph: Hardware register definition change. (HW datasheet v54) */ #define REG_RESP_SIFS_CCK 0x063C /* [15:8]SIFS_R2T_OFDM, [7:0]SIFS_R2T_CCK */ #define REG_RESP_SIFS_OFDM 0x063E /* [15:8]SIFS_T2T_OFDM, [7:0]SIFS_T2T_CCK */ #define REG_ACKTO 0x0640 -#define REG_CTS2TO 0x0641 -#define REG_EIFS 0x0642 - - -/* RXERR_RPT */ -#define RXERR_TYPE_OFDM_PPDU 0 -#define RXERR_TYPE_OFDMfalse_ALARM 1 -#define RXERR_TYPE_OFDM_MPDU_OK 2 -#define RXERR_TYPE_OFDM_MPDU_FAIL 3 -#define RXERR_TYPE_CCK_PPDU 4 -#define RXERR_TYPE_CCKfalse_ALARM 5 -#define RXERR_TYPE_CCK_MPDU_OK 6 -#define RXERR_TYPE_CCK_MPDU_FAIL 7 -#define RXERR_TYPE_HT_PPDU 8 -#define RXERR_TYPE_HTfalse_ALARM 9 -#define RXERR_TYPE_HT_MPDU_TOTAL 10 -#define RXERR_TYPE_HT_MPDU_OK 11 -#define RXERR_TYPE_HT_MPDU_FAIL 12 -#define RXERR_TYPE_RX_FULL_DROP 15 - -#define RXERR_COUNTER_MASK 0xFFFFF -#define RXERR_RPT_RST BIT(27) -#define _RXERR_RPT_SEL(type) ((type) << 28) /* */ /* Note: */ @@ -398,81 +170,19 @@ #define REG_NAV_UPPER 0x0652 /* unit of 128 */ /* WMA, BA, CCX */ -#define REG_NAV_CTRL 0x0650 -#define REG_BACAMCMD 0x0654 -#define REG_BACAMCONTENT 0x0658 -#define REG_LBDLY 0x0660 -#define REG_FWDLY 0x0661 #define REG_RXERR_RPT 0x0664 -#define REG_WMAC_TRXPTCL_CTL 0x0668 /* Security */ #define REG_CAMCMD 0x0670 #define REG_CAMWRITE 0x0674 #define REG_CAMREAD 0x0678 -#define REG_CAMDBG 0x067C #define REG_SECCFG 0x0680 /* Power */ -#define REG_WOW_CTRL 0x0690 -#define REG_PS_RX_INFO 0x0692 -#define REG_UAPSD_TID 0x0693 -#define REG_WKFMCAM_CMD 0x0698 -#define REG_WKFMCAM_NUM REG_WKFMCAM_CMD -#define REG_WKFMCAM_RWD 0x069C #define REG_RXFLTMAP0 0x06A0 #define REG_RXFLTMAP1 0x06A2 #define REG_RXFLTMAP2 0x06A4 #define REG_BCN_PSR_RPT 0x06A8 -#define REG_BT_COEX_TABLE 0x06C0 - -/* Hardware Port 2 */ -#define REG_MACID1 0x0700 -#define REG_BSSID1 0x0708 - - -/* */ -/* */ -/* 0xFE00h ~ 0xFE55h USB Configuration */ -/* */ -/* */ -#define REG_USB_INFO 0xFE17 -#define REG_USB_SPECIAL_OPTION 0xFE55 -#define REG_USB_DMA_AGG_TO 0xFE5B -#define REG_USB_AGG_TO 0xFE5C -#define REG_USB_AGG_TH 0xFE5D - -#define REG_USB_HRPWM 0xFE58 -#define REG_USB_HCPWM 0xFE57 - -/* for 92DU high_Queue low_Queue Normal_Queue select */ -#define REG_USB_High_NORMAL_Queue_Select_MAC0 0xFE44 -/* define REG_USB_LOW_Queue_Select_MAC0 0xFE45 */ -#define REG_USB_High_NORMAL_Queue_Select_MAC1 0xFE47 -/* define REG_USB_LOW_Queue_Select_MAC1 0xFE48 */ - -/* For test chip */ -#define REG_TEST_USB_TXQS 0xFE48 -#define REG_TEST_SIE_VID 0xFE60 /* 0xFE60~0xFE61 */ -#define REG_TEST_SIE_PID 0xFE62 /* 0xFE62~0xFE63 */ -#define REG_TEST_SIE_OPTIONAL 0xFE64 -#define REG_TEST_SIE_CHIRP_K 0xFE65 -#define REG_TEST_SIE_PHY 0xFE66 /* 0xFE66~0xFE6B */ -#define REG_TEST_SIE_MAC_ADDR 0xFE70 /* 0xFE70~0xFE75 */ -#define REG_TEST_SIE_STRING 0xFE80 /* 0xFE80~0xFEB9 */ - - -/* For normal chip */ -#define REG_NORMAL_SIE_VID 0xFE60 /* 0xFE60~0xFE61 */ -#define REG_NORMAL_SIE_PID 0xFE62 /* 0xFE62~0xFE63 */ -#define REG_NORMAL_SIE_OPTIONAL 0xFE64 -#define REG_NORMAL_SIE_EP 0xFE65 /* 0xFE65~0xFE67 */ -#define REG_NORMAL_SIE_PHY 0xFE68 /* 0xFE68~0xFE6B */ -#define REG_NORMAL_SIE_OPTIONAL2 0xFE6C -#define REG_NORMAL_SIE_GPS_EP 0xFE6D /* 0xFE6D, for RTL8723 only. */ -#define REG_NORMAL_SIE_MAC_ADDR 0xFE70 /* 0xFE70~0xFE75 */ -#define REG_NORMAL_SIE_STRING 0xFE80 /* 0xFE80~0xFEDF */ - /* */ /* */ @@ -486,37 +196,14 @@ #define EFUSE_CTRL REG_EFUSE_CTRL /* E-Fuse Control. */ #define EFUSE_TEST REG_EFUSE_TEST /* E-Fuse Test. */ #define MSR (REG_CR + 2) /* Media Status register */ -/* define ISR REG_HISR */ - -#define TSFR REG_TSFTR /* Timing Sync Function Timer Register. */ -#define TSFR1 REG_TSFTR1 /* HW Port 1 TSF Register */ #define PBP REG_PBP -/* Redifine MACID register, to compatible prior ICs. */ -#define IDR0 REG_MACID /* MAC ID Register, Offset 0x0050-0x0053 */ -#define IDR4 (REG_MACID + 4) /* MAC ID Register, Offset 0x0054-0x0055 */ - - /* */ /* 9. Security Control Registers (Offset:) */ /* */ #define RWCAM REG_CAMCMD /* IN 8190 Data Sheet is called CAMcmd */ #define WCAMI REG_CAMWRITE /* Software write CAM input content */ -#define RCAMO REG_CAMREAD /* Software read/write CAM config */ -#define CAMDBG REG_CAMDBG -#define SECR REG_SECCFG /* Security Configuration Register */ - -/* Unused register */ -#define UnusedRegister 0x1BF -#define DCAM UnusedRegister -#define PSR UnusedRegister -#define BBAddr UnusedRegister -#define PhyDataR UnusedRegister - -/* Min Spacing related settings. */ -#define MAX_MSS_DENSITY_2T 0x13 -#define MAX_MSS_DENSITY_1T 0x0A /* */ /* 8723/8188E Host System Interrupt Status Register (offset 0x5C, 32 byte) */ @@ -528,20 +215,6 @@ #define HSISR_GPIO9_INT BIT25 /* */ -/* USB INTR CONTENT */ -/* */ -#define USB_C2H_CMDID_OFFSET 0 -#define USB_C2H_SEQ_OFFSET 1 -#define USB_C2H_EVENT_OFFSET 2 -#define USB_INTR_CPWM_OFFSET 16 -#define USB_INTR_CONTENT_C2H_OFFSET 0 -#define USB_INTR_CONTENT_CPWM1_OFFSET 16 -#define USB_INTR_CONTENT_CPWM2_OFFSET 20 -#define USB_INTR_CONTENT_HISR_OFFSET 48 -#define USB_INTR_CONTENT_HISRE_OFFSET 52 -#define USB_INTR_CONTENT_LENGTH 56 - -/* */ /* Response Rate Set Register (offset 0x440, 24bits) */ /* */ #define RRSR_1M BIT0 @@ -549,60 +222,15 @@ #define RRSR_5_5M BIT2 #define RRSR_11M BIT3 #define RRSR_6M BIT4 -#define RRSR_9M BIT5 #define RRSR_12M BIT6 -#define RRSR_18M BIT7 #define RRSR_24M BIT8 -#define RRSR_36M BIT9 -#define RRSR_48M BIT10 -#define RRSR_54M BIT11 -#define RRSR_MCS0 BIT12 -#define RRSR_MCS1 BIT13 -#define RRSR_MCS2 BIT14 -#define RRSR_MCS3 BIT15 -#define RRSR_MCS4 BIT16 -#define RRSR_MCS5 BIT17 -#define RRSR_MCS6 BIT18 -#define RRSR_MCS7 BIT19 #define RRSR_CCK_RATES (RRSR_11M|RRSR_5_5M|RRSR_2M|RRSR_1M) -#define RRSR_OFDM_RATES (RRSR_54M|RRSR_48M|RRSR_36M|RRSR_24M|RRSR_18M|RRSR_12M|RRSR_9M|RRSR_6M) - -/* WOL bit information */ -#define HAL92C_WOL_PTK_UPDATE_EVENT BIT0 -#define HAL92C_WOL_GTK_UPDATE_EVENT BIT1 -#define HAL92C_WOL_DISASSOC_EVENT BIT2 -#define HAL92C_WOL_DEAUTH_EVENT BIT3 -#define HAL92C_WOL_FW_DISCONNECT_EVENT BIT4 /* */ /* Rate Definition */ /* */ /* CCK */ -#define RATR_1M 0x00000001 -#define RATR_2M 0x00000002 -#define RATR_55M 0x00000004 -#define RATR_11M 0x00000008 -/* OFDM */ -#define RATR_6M 0x00000010 -#define RATR_9M 0x00000020 -#define RATR_12M 0x00000040 -#define RATR_18M 0x00000080 -#define RATR_24M 0x00000100 -#define RATR_36M 0x00000200 -#define RATR_48M 0x00000400 -#define RATR_54M 0x00000800 -/* MCS 1 Spatial Stream */ -#define RATR_MCS0 0x00001000 -#define RATR_MCS1 0x00002000 -#define RATR_MCS2 0x00004000 -#define RATR_MCS3 0x00008000 -#define RATR_MCS4 0x00010000 -#define RATR_MCS5 0x00020000 -#define RATR_MCS6 0x00040000 -#define RATR_MCS7 0x00080000 - -/* CCK */ #define RATE_1M BIT(0) #define RATE_2M BIT(1) #define RATE_5_5M BIT(2) @@ -616,22 +244,12 @@ #define RATE_36M BIT(9) #define RATE_48M BIT(10) #define RATE_54M BIT(11) -/* MCS 1 Spatial Stream */ -#define RATE_MCS0 BIT(12) -#define RATE_MCS1 BIT(13) -#define RATE_MCS2 BIT(14) -#define RATE_MCS3 BIT(15) -#define RATE_MCS4 BIT(16) -#define RATE_MCS5 BIT(17) -#define RATE_MCS6 BIT(18) -#define RATE_MCS7 BIT(19) /* ALL CCK Rate */ #define RATE_BITMAP_ALL 0xFFFFF /* Only use CCK 1M rate for ACK */ #define RATE_RRSR_CCK_ONLY_1M 0xFFFF1 -#define RATE_RRSR_WITHOUT_CCK 0xFFFF0 /* */ /* BW_OPMODE bits (Offset 0x603, 8bit) */ @@ -642,88 +260,19 @@ /* CAM Config Setting (offset 0x680, 1 byte) */ /* */ #define CAM_VALID BIT15 -#define CAM_NOTVALID 0x0000 -#define CAM_USEDK BIT5 #define CAM_CONTENT_COUNT 8 -#define CAM_NONE 0x0 -#define CAM_WEP40 0x01 -#define CAM_TKIP 0x02 #define CAM_AES 0x04 -#define CAM_WEP104 0x05 -#define CAM_SMS4 0x6 #define TOTAL_CAM_ENTRY 32 -#define HALF_CAM_ENTRY 16 - -#define CAM_CONFIG_USEDK true -#define CAM_CONFIG_NO_USEDK false #define CAM_WRITE BIT16 -#define CAM_READ 0x00000000 #define CAM_POLLINIG BIT31 /* */ -/* 10. Power Save Control Registers */ -/* */ -#define WOW_PMEN BIT0 /* Power management Enable. */ -#define WOW_WOMEN BIT1 /* WoW function on or off. */ -#define WOW_MAGIC BIT2 /* Magic packet */ -#define WOW_UWF BIT3 /* Unicast Wakeup frame. */ - -/* */ /* 12. Host Interrupt Status Registers */ /* */ -/* */ -/* 8190 IMR/ISR bits */ -/* */ -#define IMR8190_DISABLED 0x0 -#define IMR_DISABLED 0x0 -/* IMR DW0 Bit 0-31 */ -#define IMR_BCNDMAINT6 BIT31 /* Beacon DMA Interrupt 6 */ -#define IMR_BCNDMAINT5 BIT30 /* Beacon DMA Interrupt 5 */ -#define IMR_BCNDMAINT4 BIT29 /* Beacon DMA Interrupt 4 */ -#define IMR_BCNDMAINT3 BIT28 /* Beacon DMA Interrupt 3 */ -#define IMR_BCNDMAINT2 BIT27 /* Beacon DMA Interrupt 2 */ -#define IMR_BCNDMAINT1 BIT26 /* Beacon DMA Interrupt 1 */ -#define IMR_BCNDOK8 BIT25 /* Beacon Queue DMA OK Interrupt 8 */ -#define IMR_BCNDOK7 BIT24 /* Beacon Queue DMA OK Interrupt 7 */ -#define IMR_BCNDOK6 BIT23 /* Beacon Queue DMA OK Interrupt 6 */ -#define IMR_BCNDOK5 BIT22 /* Beacon Queue DMA OK Interrupt 5 */ -#define IMR_BCNDOK4 BIT21 /* Beacon Queue DMA OK Interrupt 4 */ -#define IMR_BCNDOK3 BIT20 /* Beacon Queue DMA OK Interrupt 3 */ -#define IMR_BCNDOK2 BIT19 /* Beacon Queue DMA OK Interrupt 2 */ -#define IMR_BCNDOK1 BIT18 /* Beacon Queue DMA OK Interrupt 1 */ -#define IMR_TIMEOUT2 BIT17 /* Timeout interrupt 2 */ -#define IMR_TIMEOUT1 BIT16 /* Timeout interrupt 1 */ -#define IMR_TXFOVW BIT15 /* Transmit FIFO Overflow */ -#define IMR_PSTIMEOUT BIT14 /* Power save time out interrupt */ -#define IMR_BcnInt BIT13 /* Beacon DMA Interrupt 0 */ -#define IMR_RXFOVW BIT12 /* Receive FIFO Overflow */ -#define IMR_RDU BIT11 /* Receive Descriptor Unavailable */ -#define IMR_ATIMEND BIT10 /* For 92C, ATIM Window End Interrupt. For 8723 and later ICs, it also means P2P CTWin End interrupt. */ -#define IMR_BDOK BIT9 /* Beacon Queue DMA OK Interrupt */ -#define IMR_HIGHDOK BIT8 /* High Queue DMA OK Interrupt */ -#define IMR_TBDOK BIT7 /* Transmit Beacon OK interrupt */ -#define IMR_MGNTDOK BIT6 /* Management Queue DMA OK Interrupt */ -#define IMR_TBDER BIT5 /* For 92C, Transmit Beacon Error Interrupt */ -#define IMR_BKDOK BIT4 /* AC_BK DMA OK Interrupt */ -#define IMR_BEDOK BIT3 /* AC_BE DMA OK Interrupt */ -#define IMR_VIDOK BIT2 /* AC_VI DMA OK Interrupt */ -#define IMR_VODOK BIT1 /* AC_VO DMA Interrupt */ -#define IMR_ROK BIT0 /* Receive DMA OK Interrupt */ - -/* 13. Host Interrupt Status Extension Register (Offset: 0x012C-012Eh) */ -#define IMR_TSF_BIT32_TOGGLE BIT15 -#define IMR_BcnInt_E BIT12 -#define IMR_TXERR BIT11 -#define IMR_RXERR BIT10 -#define IMR_C2HCMD BIT9 -#define IMR_CPWM BIT8 -/* RSVD [2-7] */ -#define IMR_OCPINT BIT1 -#define IMR_WLANOFF BIT0 /* */ /* 8192C (RCR) Receive Configuration Register (Offset 0x608, 32 bits) */ @@ -733,34 +282,15 @@ #define RCR_APP_ICV BIT29 /* MACRX will retain the ICV at the bottom of the packet. */ #define RCR_APP_PHYST_RXFF BIT28 /* PHY Status is appended before RX packet in RXFF */ #define RCR_APP_BA_SSN BIT27 /* SSN of previous TXBA is appended as after original RXDESC as the 4-th DW of RXDESC. */ -#define RCR_NONQOS_VHT BIT26 /* Reserved */ -#define RCR_RSVD_BIT25 BIT25 /* Reserved */ -#define RCR_ENMBID BIT24 /* Enable Multiple BssId. Only response ACK to the packets whose DID(A1) matching to the addresses in the MBSSID CAM Entries. */ -#define RCR_LSIGEN BIT23 /* Enable LSIG TXOP Protection function. Search KEYCAM for each rx packet to check if LSIGEN bit is set. */ -#define RCR_MFBEN BIT22 /* Enable immediate MCS Feedback function. When Rx packet with MRQ = 1'b1, then search KEYCAM to find sender's MCS Feedback function and send response. */ -#define RCR_RSVD_BIT21 BIT21 /* Reserved */ -#define RCR_RSVD_BIT20 BIT20 /* Reserved */ -#define RCR_RSVD_BIT19 BIT19 /* Reserved */ -#define RCR_TIM_PARSER_EN BIT18 /* RX Beacon TIM Parser. */ -#define RCR_BM_DATA_EN BIT17 /* Broadcast data packet interrupt enable. */ -#define RCR_UC_DATA_EN BIT16 /* Unicast data packet interrupt enable. */ -#define RCR_RSVD_BIT15 BIT15 /* Reserved */ #define RCR_HTC_LOC_CTRL BIT14 /* MFC<--HTC = 1 MFC-->HTC = 0 */ #define RCR_AMF BIT13 /* Accept management type frame */ -#define RCR_ACF BIT12 /* Accept control type frame. Control frames BA, BAR, and PS-Poll (when in AP mode) are not controlled by this bit. They are controlled by ADF. */ #define RCR_ADF BIT11 /* Accept data type frame. This bit also regulates BA, BAR, and PS-Poll (AP mode only). */ -#define RCR_RSVD_BIT10 BIT10 /* Reserved */ -#define RCR_AICV BIT9 /* Accept ICV error packet */ #define RCR_ACRC32 BIT8 /* Accept CRC32 error packet */ #define RCR_CBSSID_BCN BIT7 /* Accept BSSID match packet (Rx beacon, probe rsp) */ #define RCR_CBSSID_DATA BIT6 /* Accept BSSID match packet (Data) */ -#define RCR_CBSSID RCR_CBSSID_DATA /* Accept BSSID match packet */ -#define RCR_APWRMGT BIT5 /* Accept power management packet */ -#define RCR_ADD3 BIT4 /* Accept address 3 match packet */ #define RCR_AB BIT3 /* Accept broadcast packet */ #define RCR_AM BIT2 /* Accept multicast packet */ #define RCR_APM BIT1 /* Accept physical match packet */ -#define RCR_AAP BIT0 /* Accept all unicast packet */ /* */ @@ -769,76 +299,25 @@ /* */ /* */ -/* 2 SYS_ISO_CTRL */ -#define ISO_MD2PP BIT(0) -#define ISO_UA2USB BIT(1) -#define ISO_UD2CORE BIT(2) -#define ISO_PA2PCIE BIT(3) -#define ISO_PD2CORE BIT(4) -#define ISO_IP2MAC BIT(5) -#define ISO_DIOP BIT(6) -#define ISO_DIOE BIT(7) -#define ISO_EB2CORE BIT(8) -#define ISO_DIOR BIT(9) -#define PWC_EV12V BIT(15) - - /* 2 SYS_FUNC_EN */ #define FEN_BBRSTB BIT(0) #define FEN_BB_GLB_RSTn BIT(1) -#define FEN_USBA BIT(2) -#define FEN_UPLL BIT(3) -#define FEN_USBD BIT(4) #define FEN_DIO_PCIE BIT(5) #define FEN_PCIEA BIT(6) #define FEN_PPLL BIT(7) -#define FEN_PCIED BIT(8) -#define FEN_DIOE BIT(9) #define FEN_CPUEN BIT(10) -#define FEN_DCORE BIT(11) #define FEN_ELDR BIT(12) -#define FEN_EN_25_1 BIT(13) -#define FEN_HWPDN BIT(14) -#define FEN_MREGEN BIT(15) /* 2 APS_FSMCO */ -#define PFM_LDALL BIT(0) -#define PFM_ALDN BIT(1) -#define PFM_LDKP BIT(2) -#define PFM_WOWL BIT(3) #define EnPDN BIT(4) -#define PDN_PL BIT(5) -#define APFM_ONMAC BIT(8) -#define APFM_OFF BIT(9) -#define APFM_RSM BIT(10) -#define AFSM_HSUS BIT(11) -#define AFSM_PCIE BIT(12) -#define APDM_MAC BIT(13) -#define APDM_HOST BIT(14) -#define APDM_HPDN BIT(15) -#define RDY_MACON BIT(16) -#define SUS_HOST BIT(17) -#define ROP_ALD BIT(20) -#define ROP_PWR BIT(21) -#define ROP_SPS BIT(22) -#define SOP_MRST BIT(25) -#define SOP_FUSE BIT(26) -#define SOP_ABG BIT(27) -#define SOP_AMB BIT(28) -#define SOP_RCK BIT(29) -#define SOP_A8M BIT(30) -#define XOP_BTCK BIT(31) /* 2 SYS_CLKR */ -#define ANAD16V_EN BIT(0) #define ANA8M BIT(1) -#define MACSLP BIT(4) #define LOADER_CLK_EN BIT(5) /* 2 9346CR /REG_SYS_EEPROM_CTRL */ #define BOOT_FROM_EEPROM BIT(4) -#define EEPROMSEL BIT(4) #define EEPROM_EN BIT(5) @@ -847,20 +326,7 @@ #define RF_RSTB BIT(1) #define RF_SDMRSTB BIT(2) - -/* 2 LDOV12D_CTRL */ -#define LDV12_EN BIT(0) -#define LDV12_SDBY BIT(1) -#define LPLDO_HSM BIT(2) -#define LPLDO_LSM_DIS BIT(3) -#define _LDV12_VADJ(x) (((x) & 0xF) << 4) - - - /* 2 EFUSE_TEST (For RTL8723 partially) */ -#define EF_TRPT BIT(7) -#define EF_CELL_SEL (BIT(8)|BIT(9)) /* 00: Wifi Efuse, 01: BT Efuse0, 10: BT Efuse1, 11: BT Efuse2 */ -#define LDOE25_EN BIT(31) #define EFUSE_SEL(x) (((x) & 0x3) << 8) #define EFUSE_SEL_MASK 0x300 #define EFUSE_WIFI_SEL_0 0x0 @@ -871,41 +337,13 @@ /* 2 8051FWDL */ /* 2 MCUFWDL */ -#define MCUFWDL_EN BIT(0) #define MCUFWDL_RDY BIT(1) #define FWDL_ChkSum_rpt BIT(2) -#define MACINI_RDY BIT(3) -#define BBINI_RDY BIT(4) -#define RFINI_RDY BIT(5) #define WINTINI_RDY BIT(6) #define RAM_DL_SEL BIT(7) -#define ROM_DLEN BIT(19) -#define CPRST BIT(23) - /* 2 REG_SYS_CFG */ -#define XCLK_VLD BIT(0) -#define ACLK_VLD BIT(1) -#define UCLK_VLD BIT(2) -#define PCLK_VLD BIT(3) -#define PCIRSTB BIT(4) -#define V15_VLD BIT(5) -#define SW_OFFLOAD_EN BIT(7) -#define SIC_IDLE BIT(8) -#define BD_MAC2 BIT(9) -#define BD_MAC1 BIT(10) -#define IC_MACPHY_MODE BIT(11) -#define CHIP_VER (BIT(12)|BIT(13)|BIT(14)|BIT(15)) -#define BT_FUNC BIT(16) #define VENDOR_ID BIT(19) -#define EXT_VENDOR_ID (BIT(18)|BIT(19)) /* Currently only for RTL8723B */ -#define PAD_HWPD_IDN BIT(22) -#define TRP_VAUX_EN BIT(23) /* RTL ID */ -#define TRP_BT_EN BIT(24) -#define BD_PKG_SEL BIT(25) -#define BD_HCI_SEL BIT(26) -#define TYPE_ID BIT(27) -#define RF_TYPE_ID BIT(27) #define RTL_ID BIT(23) /* TestChip ID, 1:Test(RLE); 0:MP(RL) */ #define SPS_SEL BIT(24) /* 1:LDO regulator mode; 0:Switching regulator mode */ @@ -913,31 +351,10 @@ #define CHIP_VER_RTL_MASK 0xF000 /* Bit 12 ~ 15 */ #define CHIP_VER_RTL_SHIFT 12 -#define EXT_VENDOR_ID_SHIFT 18 /* 2 REG_GPIO_OUTSTS (For RTL8723 only) */ -#define EFS_HCI_SEL (BIT(0)|BIT(1)) -#define PAD_HCI_SEL (BIT(2)|BIT(3)) -#define HCI_SEL (BIT(4)|BIT(5)) -#define PKG_SEL_HCI BIT(6) -#define FEN_GPS BIT(7) -#define FEN_BT BIT(8) -#define FEN_WL BIT(9) -#define FEN_PCI BIT(10) -#define FEN_USB BIT(11) -#define BTRF_HWPDN_N BIT(12) -#define WLRF_HWPDN_N BIT(13) -#define PDN_BT_N BIT(14) -#define PDN_GPS_N BIT(15) -#define BT_CTL_HWPDN BIT(16) -#define GPS_CTL_HWPDN BIT(17) -#define PPHY_SUSB BIT(20) -#define UPHY_SUSB BIT(21) -#define PCI_SUSEN BIT(22) -#define USB_SUSEN BIT(23) #define RF_RL_ID (BIT(31)|BIT(30)|BIT(29)|BIT(28)) - /* */ /* */ /* 0x0100h ~ 0x01FFh MACTOP General Configuration */ @@ -961,46 +378,19 @@ /* Network type */ #define _NETTYPE(x) (((x) & 0x3) << 16) #define MASK_NETTYPE 0x30000 -#define NT_NO_LINK 0x0 #define NT_LINK_AD_HOC 0x1 #define NT_LINK_AP 0x2 -#define NT_AS_AP 0x3 /* 2 PBP - Page Size Register */ -#define GET_RX_PAGE_SIZE(value) ((value) & 0xF) -#define GET_TX_PAGE_SIZE(value) (((value) & 0xF0) >> 4) -#define _PSRX_MASK 0xF -#define _PSTX_MASK 0xF0 #define _PSRX(x) (x) #define _PSTX(x) ((x) << 4) -#define PBP_64 0x0 #define PBP_128 0x1 -#define PBP_256 0x2 -#define PBP_512 0x3 -#define PBP_1024 0x4 - /* 2 TX/RXDMA */ -#define RXDMA_ARBBW_EN BIT(0) -#define RXSHFT_EN BIT(1) #define RXDMA_AGG_EN BIT(2) -#define QS_VO_QUEUE BIT(8) -#define QS_VI_QUEUE BIT(9) -#define QS_BE_QUEUE BIT(10) -#define QS_BK_QUEUE BIT(11) -#define QS_MANAGER_QUEUE BIT(12) -#define QS_HIGH_QUEUE BIT(13) - -#define HQSEL_VOQ BIT(0) -#define HQSEL_VIQ BIT(1) -#define HQSEL_BEQ BIT(2) -#define HQSEL_BKQ BIT(3) -#define HQSEL_MGTQ BIT(4) -#define HQSEL_HIQ BIT(5) /* For normal driver, 0x10C */ -#define _TXDMA_CMQ_MAP(x) (((x)&0x3) << 16) #define _TXDMA_HIQ_MAP(x) (((x)&0x3) << 14) #define _TXDMA_MGQ_MAP(x) (((x)&0x3) << 12) #define _TXDMA_BKQ_MAP(x) (((x)&0x3) << 10) @@ -1008,26 +398,10 @@ #define _TXDMA_VIQ_MAP(x) (((x)&0x3) << 6) #define _TXDMA_VOQ_MAP(x) (((x)&0x3) << 4) -#define QUEUE_EXTRA 0 #define QUEUE_LOW 1 #define QUEUE_NORMAL 2 #define QUEUE_HIGH 3 - -/* 2 TRXFF_BNDY */ - - -/* 2 LLT_INIT */ -#define _LLT_NO_ACTIVE 0x0 -#define _LLT_WRITE_ACCESS 0x1 -#define _LLT_READ_ACCESS 0x2 - -#define _LLT_INIT_DATA(x) ((x) & 0xFF) -#define _LLT_INIT_ADDR(x) (((x) & 0xFF) << 8) -#define _LLT_OP(x) (((x) & 0x3) << 30) -#define _LLT_OP_VALUE(x) (((x) >> 30) & 0x3) - - /* */ /* */ /* 0x0200h ~ 0x027Fh TXDMA Configuration */ @@ -1038,35 +412,12 @@ #define _LPQ(x) (((x) & 0xFF) << 8) #define _PUBQ(x) (((x) & 0xFF) << 16) #define _NPQ(x) ((x) & 0xFF) /* NOTE: in RQPN_NPQ register */ -#define _EPQ(x) (((x) & 0xFF) << 16) /* NOTE: in RQPN_EPQ register */ - -#define HPQ_PUBLIC_DIS BIT(24) -#define LPQ_PUBLIC_DIS BIT(25) #define LD_RQPN BIT(31) - -/* 2 TDECTL */ -#define BLK_DESC_NUM_SHIFT 4 -#define BLK_DESC_NUM_MASK 0xF - - -/* 2 TXDMA_OFFSET_CHK */ -#define DROP_DATA_EN BIT(9) - /* 2 AUTO_LLT */ -#define BIT_SHIFT_TXPKTNUM 24 -#define BIT_MASK_TXPKTNUM 0xff -#define BIT_TXPKTNUM(x) (((x) & BIT_MASK_TXPKTNUM) << BIT_SHIFT_TXPKTNUM) - -#define BIT_TDE_DBG_SEL BIT(23) #define BIT_AUTO_INIT_LLT BIT(16) -#define BIT_SHIFT_Tx_OQT_free_space 8 -#define BIT_MASK_Tx_OQT_free_space 0xff -#define BIT_Tx_OQT_free_space(x) (((x) & BIT_MASK_Tx_OQT_free_space) << BIT_SHIFT_Tx_OQT_free_space) - - /* */ /* */ /* 0x0280h ~ 0x028Bh RX DMA Configuration */ @@ -1112,13 +463,6 @@ /* */ /* */ -/* 2 EDCA setting */ -#define AC_PARAM_TXOP_LIMIT_OFFSET 16 -#define AC_PARAM_ECW_MAX_OFFSET 12 -#define AC_PARAM_ECW_MIN_OFFSET 8 -#define AC_PARAM_AIFS_OFFSET 0 - - #define _LRL(x) ((x) & 0x3F) #define _SRL(x) (((x) & 0x3F) << 8) @@ -1126,33 +470,16 @@ /* 2 BCN_CTRL */ #define EN_TXBCN_RPT BIT(2) #define EN_BCN_FUNCTION BIT(3) -#define STOP_BCNQ BIT(6) -#define DIS_RX_BSSID_FIT BIT(6) #define DIS_ATIM BIT(0) #define DIS_BCNQ_SUB BIT(1) #define DIS_TSF_UDT BIT(4) -/* The same function but different bit field. */ -#define DIS_TSF_UDT0_NORMAL_CHIP BIT(4) -#define DIS_TSF_UDT0_TEST_CHIP BIT(5) - - /* 2 ACMHWCTRL */ #define AcmHw_HwEn BIT(0) #define AcmHw_BeqEn BIT(1) #define AcmHw_ViqEn BIT(2) #define AcmHw_VoqEn BIT(3) -#define AcmHw_BeqStatus BIT(4) -#define AcmHw_ViqStatus BIT(5) -#define AcmHw_VoqStatus BIT(6) - -/* 2 REG_DUAL_TSF_RST (0x553) */ -#define DUAL_TSF_RST_P2P BIT(4) - -/* 2 REG_NOA_DESC_SEL (0x5CF) */ -#define NOA_DESC_SEL_0 0 -#define NOA_DESC_SEL_1 BIT(4) /* */ /* */ @@ -1160,56 +487,17 @@ /* */ /* */ -/* 2 APSD_CTRL */ -#define APSDOFF BIT(6) - /* 2 TCR */ #define TSFRST BIT(0) -#define DIS_GCLK BIT(1) -#define PAD_SEL BIT(2) -#define PWR_ST BIT(6) -#define PWRBIT_OW_EN BIT(7) -#define ACRC BIT(8) -#define CFENDFORM BIT(9) -#define ICV BIT(10) - /* 2 RCR */ -#define AAP BIT(0) -#define APM BIT(1) -#define AM BIT(2) #define AB BIT(3) -#define ADD3 BIT(4) -#define APWRMGT BIT(5) -#define CBSSID BIT(6) -#define CBSSID_DATA BIT(6) -#define CBSSID_BCN BIT(7) -#define ACRC32 BIT(8) -#define AICV BIT(9) -#define ADF BIT(11) -#define ACF BIT(12) -#define AMF BIT(13) -#define HTC_LOC_CTRL BIT(14) -#define UC_DATA_EN BIT(16) -#define BM_DATA_EN BIT(17) -#define MFBEN BIT(22) -#define LSIGEN BIT(23) -#define EnMBID BIT(24) -#define FORCEACK BIT(26) -#define APP_BASSN BIT(27) -#define APP_PHYSTS BIT(28) -#define APP_ICV BIT(29) -#define APP_MIC BIT(30) -#define APP_FCS BIT(31) - /* 2 SECCFG */ #define SCR_TxUseDK BIT(0) /* Force Tx Use Default Key */ #define SCR_RxUseDK BIT(1) /* Force Rx Use Default Key */ #define SCR_TxEncEnable BIT(2) /* Enable Tx Encryption */ #define SCR_RxDecEnable BIT(3) /* Enable Rx Decryption */ -#define SCR_SKByA2 BIT(4) /* Search kEY BY A2 */ -#define SCR_NoSKMC BIT(5) /* No Key Search Multicast */ #define SCR_TXBCUSEDK BIT(6) /* Force Tx Broadcast packets Use Default Key */ #define SCR_RXBCUSEDK BIT(7) /* Force Rx Broadcast packets Use Default Key */ #define SCR_CHK_KEYID BIT(8) @@ -1222,13 +510,6 @@ /* I/O bus domain address mapping */ #define SDIO_LOCAL_BASE 0x10250000 -#define WLAN_IOREG_BASE 0x10260000 -#define FIRMWARE_FIFO_BASE 0x10270000 -#define TX_HIQ_BASE 0x10310000 -#define TX_MIQ_BASE 0x10320000 -#define TX_LOQ_BASE 0x10330000 -#define TX_EPQ_BASE 0x10350000 -#define RX_RX0FF_BASE 0x10340000 /* SDIO host local register space mapping. */ #define SDIO_LOCAL_MSK 0x0FFF @@ -1236,12 +517,10 @@ #define WLAN_FIFO_MSK 0x1FFF /* Aggregation Length[12:0] */ #define WLAN_RX0FF_MSK 0x0003 -#define SDIO_WITHOUT_REF_DEVICE_ID 0 /* Without reference to the SDIO Device ID */ #define SDIO_LOCAL_DEVICE_ID 0 /* 0b[16], 000b[15:13] */ #define WLAN_TX_HIQ_DEVICE_ID 4 /* 0b[16], 100b[15:13] */ #define WLAN_TX_MIQ_DEVICE_ID 5 /* 0b[16], 101b[15:13] */ #define WLAN_TX_LOQ_DEVICE_ID 6 /* 0b[16], 110b[15:13] */ -#define WLAN_TX_EXQ_DEVICE_ID 3 /* 0b[16], 011b[15:13] */ #define WLAN_RX0FF_DEVICE_ID 7 /* 0b[16], 111b[15:13] */ #define WLAN_IOREG_DEVICE_ID 8 /* 1b[16] */ @@ -1252,49 +531,21 @@ #define PUBLIC_QUEUE_IDX 3 #define SDIO_MAX_TX_QUEUE 3 /* HIQ, MIQ and LOQ */ -#define SDIO_MAX_RX_QUEUE 1 #define SDIO_REG_TX_CTRL 0x0000 /* SDIO Tx Control */ #define SDIO_REG_HIMR 0x0014 /* SDIO Host Interrupt Mask */ #define SDIO_REG_HISR 0x0018 /* SDIO Host Interrupt Service Routine */ -#define SDIO_REG_HCPWM 0x0019 /* HCI Current Power Mode */ #define SDIO_REG_RX0_REQ_LEN 0x001C /* RXDMA Request Length */ #define SDIO_REG_OQT_FREE_PG 0x001E /* OQT Free Page */ #define SDIO_REG_FREE_TXPG 0x0020 /* Free Tx Buffer Page */ -#define SDIO_REG_HCPWM1 0x0024 /* HCI Current Power Mode 1 */ -#define SDIO_REG_HCPWM2 0x0026 /* HCI Current Power Mode 2 */ -#define SDIO_REG_FREE_TXPG_SEQ 0x0028 /* Free Tx Page Sequence */ -#define SDIO_REG_HTSFR_INFO 0x0030 /* HTSF Informaion */ #define SDIO_REG_HRPWM1 0x0080 /* HCI Request Power Mode 1 */ -#define SDIO_REG_HRPWM2 0x0082 /* HCI Request Power Mode 2 */ -#define SDIO_REG_HPS_CLKR 0x0084 /* HCI Power Save Clock */ #define SDIO_REG_HSUS_CTRL 0x0086 /* SDIO HCI Suspend Control */ -#define SDIO_REG_HIMR_ON 0x0090 /* SDIO Host Extension Interrupt Mask Always */ -#define SDIO_REG_HISR_ON 0x0091 /* SDIO Host Extension Interrupt Status Always */ #define SDIO_HIMR_DISABLED 0 /* RTL8723/RTL8188E SDIO Host Interrupt Mask Register */ #define SDIO_HIMR_RX_REQUEST_MSK BIT0 #define SDIO_HIMR_AVAL_MSK BIT1 -#define SDIO_HIMR_TXERR_MSK BIT2 -#define SDIO_HIMR_RXERR_MSK BIT3 -#define SDIO_HIMR_TXFOVW_MSK BIT4 -#define SDIO_HIMR_RXFOVW_MSK BIT5 -#define SDIO_HIMR_TXBCNOK_MSK BIT6 -#define SDIO_HIMR_TXBCNERR_MSK BIT7 -#define SDIO_HIMR_BCNERLY_INT_MSK BIT16 -#define SDIO_HIMR_C2HCMD_MSK BIT17 -#define SDIO_HIMR_CPWM1_MSK BIT18 -#define SDIO_HIMR_CPWM2_MSK BIT19 -#define SDIO_HIMR_HSISR_IND_MSK BIT20 -#define SDIO_HIMR_GTINT3_IND_MSK BIT21 -#define SDIO_HIMR_GTINT4_IND_MSK BIT22 -#define SDIO_HIMR_PSTIMEOUT_MSK BIT23 -#define SDIO_HIMR_OCPINT_MSK BIT24 -#define SDIO_HIMR_ATIMEND_MSK BIT25 -#define SDIO_HIMR_ATIMEND_E_MSK BIT26 -#define SDIO_HIMR_CTWEND_MSK BIT27 /* SDIO Host Interrupt Service Routine */ #define SDIO_HISR_RX_REQUEST BIT0 @@ -1305,7 +556,6 @@ #define SDIO_HISR_RXFOVW BIT5 #define SDIO_HISR_TXBCNOK BIT6 #define SDIO_HISR_TXBCNERR BIT7 -#define SDIO_HISR_BCNERLY_INT BIT16 #define SDIO_HISR_C2HCMD BIT17 #define SDIO_HISR_CPWM1 BIT18 #define SDIO_HISR_CPWM2 BIT19 @@ -1314,9 +564,6 @@ #define SDIO_HISR_GTINT4_IND BIT22 #define SDIO_HISR_PSTIMEOUT BIT23 #define SDIO_HISR_OCPINT BIT24 -#define SDIO_HISR_ATIMEND BIT25 -#define SDIO_HISR_ATIMEND_E BIT26 -#define SDIO_HISR_CTWEND BIT27 #define MASK_SDIO_HISR_CLEAR (SDIO_HISR_TXERR |\ SDIO_HISR_RXERR |\ @@ -1333,15 +580,8 @@ SDIO_HISR_PSTIMEOUT |\ SDIO_HISR_OCPINT) -/* SDIO HCI Suspend Control Register */ -#define HCI_RESUME_PWR_RDY BIT1 -#define HCI_SUS_CTRL BIT0 - /* SDIO Tx FIFO related */ #define SDIO_TX_FREE_PG_QUEUE 4 /* The number of Tx FIFO free page */ -#define SDIO_TX_FIFO_PAGE_SZ 128 - -#define MAX_TX_AGG_PACKET_NUMBER 0x8 /* */ /* */ @@ -1349,46 +589,14 @@ /* */ /* */ -/* 2 USB Information (0xFE17) */ -#define USB_IS_HIGH_SPEED 0 -#define USB_IS_FULL_SPEED 1 -#define USB_SPEED_MASK BIT(5) - -#define USB_NORMAL_SIE_EP_MASK 0xF -#define USB_NORMAL_SIE_EP_SHIFT 4 - -/* 2 Special Option */ -#define USB_AGG_EN BIT(3) - -/* 0; Use interrupt endpoint to upload interrupt pkt */ -/* 1; Use bulk endpoint to upload interrupt pkt, */ -#define INT_BULK_SEL BIT(4) - /* 2REG_C2HEVT_CLEAR */ #define C2H_EVT_HOST_CLOSE 0x00 /* Set by driver and notify FW that the driver has read the C2H command message */ #define C2H_EVT_FW_CLOSE 0xFF /* Set by FW indicating that FW had set the C2H command message and it's not yet read by driver. */ - /* 2REG_MULTI_FUNC_CTRL(For RTL8723 Only) */ -#define WL_HWPDN_EN BIT0 /* Enable GPIO[9] as WiFi HW PDn source */ #define WL_HWPDN_SL BIT1 /* WiFi HW PDn polarity control */ #define WL_FUNC_EN BIT2 /* WiFi function enable */ -#define WL_HWROF_EN BIT3 /* Enable GPIO[9] as WiFi RF HW PDn source */ -#define BT_HWPDN_EN BIT16 /* Enable GPIO[11] as BT HW PDn source */ -#define BT_HWPDN_SL BIT17 /* BT HW PDn polarity control */ #define BT_FUNC_EN BIT18 /* BT function enable */ -#define BT_HWROF_EN BIT19 /* Enable GPIO[11] as BT/GPS RF HW PDn source */ -#define GPS_HWPDN_EN BIT20 /* Enable GPIO[10] as GPS HW PDn source */ -#define GPS_HWPDN_SL BIT21 /* GPS HW PDn polarity control */ #define GPS_FUNC_EN BIT22 /* GPS function enable */ -/* */ -/* General definitions */ -/* */ - -#define LAST_ENTRY_OF_TX_PKT_BUFFER_8723B 255 - -#define POLLING_LLT_THRESHOLD 20 -#define POLLING_READY_TIMEOUT_COUNT 1000 - #endif /* __HAL_COMMON_H__ */ diff --git a/drivers/staging/rtl8723bs/include/hal_phy_reg_8723b.h b/drivers/staging/rtl8723bs/include/hal_phy_reg_8723b.h deleted file mode 100644 index b0b1ac1090fc..000000000000 --- a/drivers/staging/rtl8723bs/include/hal_phy_reg_8723b.h +++ /dev/null @@ -1,69 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - ******************************************************************************/ -#ifndef __INC_HAL8723BPHYREG_H__ -#define __INC_HAL8723BPHYREG_H__ - -#include <Hal8192CPhyReg.h> - -/* BB Register Definition */ -/* */ -/* 4. Page9(0x900) */ -/* */ -#define rDPDT_control 0x92c -#define rfe_ctrl_anta_src 0x930 -#define rS0S1_PathSwitch 0x948 -#define AGC_table_select 0xb2c - -/* */ -/* PageB(0xB00) */ -/* */ -#define rPdp_AntA 0xb00 -#define rPdp_AntA_4 0xb04 -#define rPdp_AntA_8 0xb08 -#define rPdp_AntA_C 0xb0c -#define rPdp_AntA_10 0xb10 -#define rPdp_AntA_14 0xb14 -#define rPdp_AntA_18 0xb18 -#define rPdp_AntA_1C 0xb1c -#define rPdp_AntA_20 0xb20 -#define rPdp_AntA_24 0xb24 - -#define rConfig_Pmpd_AntA 0xb28 -#define rConfig_ram64x16 0xb2c - -#define rBndA 0xb30 -#define rHssiPar 0xb34 - -#define rConfig_AntA 0xb68 -#define rConfig_AntB 0xb6c - -#define rPdp_AntB 0xb70 -#define rPdp_AntB_4 0xb74 -#define rPdp_AntB_8 0xb78 -#define rPdp_AntB_C 0xb7c -#define rPdp_AntB_10 0xb80 -#define rPdp_AntB_14 0xb84 -#define rPdp_AntB_18 0xb88 -#define rPdp_AntB_1C 0xb8c -#define rPdp_AntB_20 0xb90 -#define rPdp_AntB_24 0xb94 - -#define rConfig_Pmpd_AntB 0xb98 - -#define rBndB 0xba0 - -#define rAPK 0xbd8 -#define rPm_Rx0_AntA 0xbdc -#define rPm_Rx1_AntA 0xbe0 -#define rPm_Rx2_AntA 0xbe4 -#define rPm_Rx3_AntA 0xbe8 -#define rPm_Rx0_AntB 0xbec -#define rPm_Rx1_AntB 0xbf0 -#define rPm_Rx2_AntB 0xbf4 -#define rPm_Rx3_AntB 0xbf8 - -#endif diff --git a/drivers/staging/rtl8723bs/include/hal_pwr_seq.h b/drivers/staging/rtl8723bs/include/hal_pwr_seq.h index 0a2e60770668..5e43cc89f535 100644 --- a/drivers/staging/rtl8723bs/include/hal_pwr_seq.h +++ b/drivers/staging/rtl8723bs/include/hal_pwr_seq.h @@ -28,9 +28,7 @@ #define RTL8723B_TRANS_CARDEMU_TO_ACT_STEPS 26 #define RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS 15 #define RTL8723B_TRANS_CARDEMU_TO_SUS_STEPS 15 -#define RTL8723B_TRANS_SUS_TO_CARDEMU_STEPS 15 #define RTL8723B_TRANS_CARDEMU_TO_PDN_STEPS 15 -#define RTL8723B_TRANS_PDN_TO_CARDEMU_STEPS 15 #define RTL8723B_TRANS_ACT_TO_LPS_STEPS 15 #define RTL8723B_TRANS_LPS_TO_ACT_STEPS 15 #define RTL8723B_TRANS_ACT_TO_SWLPS_STEPS 22 @@ -128,11 +126,6 @@ {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\ {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ -#define RTL8723B_TRANS_PDN_TO_CARDEMU \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, comments here*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ - #define RTL8723B_TRANS_ACT_TO_LPS \ /* format */ \ /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, comments here*/ \ diff --git a/drivers/staging/rtl8723bs/include/rtl8723b_hal.h b/drivers/staging/rtl8723bs/include/rtl8723b_hal.h index c1d7249e3e9d..f9ecd9047d52 100644 --- a/drivers/staging/rtl8723bs/include/rtl8723b_hal.h +++ b/drivers/staging/rtl8723bs/include/rtl8723b_hal.h @@ -17,7 +17,7 @@ #include "rtl8723b_cmd.h" #include "rtw_mp.h" #include "hal_pwr_seq.h" -#include "hal_phy_reg_8723b.h" +#include "Hal8192CPhyReg.h" #include "hal_phy_cfg.h" /* */ diff --git a/drivers/staging/rtl8723bs/include/rtw_efuse.h b/drivers/staging/rtl8723bs/include/rtw_efuse.h index 5938a6bfb573..0cb8c6f6d34d 100644 --- a/drivers/staging/rtl8723bs/include/rtw_efuse.h +++ b/drivers/staging/rtl8723bs/include/rtw_efuse.h @@ -7,19 +7,6 @@ #ifndef __RTW_EFUSE_H__ #define __RTW_EFUSE_H__ - -#define EFUSE_ERROE_HANDLE 1 - -#define PG_STATE_HEADER 0x01 -#define PG_STATE_WORD_0 0x02 -#define PG_STATE_WORD_1 0x04 -#define PG_STATE_WORD_2 0x08 -#define PG_STATE_WORD_3 0x10 -#define PG_STATE_DATA 0x20 - -#define PG_SWBYTE_H 0x01 -#define PG_SWBYTE_L 0x02 - #define PGPKT_DATA_SIZE 8 #define EFUSE_WIFI 0 diff --git a/drivers/staging/rtl8723bs/include/rtw_ht.h b/drivers/staging/rtl8723bs/include/rtw_ht.h index 1527d8be2d7a..54fadb92334c 100644 --- a/drivers/staging/rtl8723bs/include/rtw_ht.h +++ b/drivers/staging/rtl8723bs/include/rtw_ht.h @@ -63,43 +63,21 @@ enum { #define LDPC_HT_ENABLE_RX BIT0 #define LDPC_HT_ENABLE_TX BIT1 -#define LDPC_HT_TEST_TX_ENABLE BIT2 #define LDPC_HT_CAP_TX BIT3 #define STBC_HT_ENABLE_RX BIT0 #define STBC_HT_ENABLE_TX BIT1 -#define STBC_HT_TEST_TX_ENABLE BIT2 #define STBC_HT_CAP_TX BIT3 #define BEAMFORMING_HT_BEAMFORMER_ENABLE BIT0 /* Declare our NIC supports beamformer */ #define BEAMFORMING_HT_BEAMFORMEE_ENABLE BIT1 /* Declare our NIC supports beamformee */ -#define BEAMFORMING_HT_BEAMFORMER_TEST BIT2 /* Transmiting Beamforming no matter the target supports it or not */ - -/* */ -/* The HT Control field */ -/* */ -#define SET_HT_CTRL_CSI_STEERING(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+2, 6, 2, _val) -#define SET_HT_CTRL_NDP_ANNOUNCEMENT(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+3, 0, 1, _val) -#define GET_HT_CTRL_NDP_ANNOUNCEMENT(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+3, 0, 1) /* 20/40 BSS Coexist */ #define SET_EXT_CAPABILITY_ELE_BSS_COEXIST(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart), 0, 1, _val) -#define GET_EXT_CAPABILITY_ELE_BSS_COEXIST(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart), 0, 1) - #define GET_HT_CAPABILITY_ELE_LDPC_CAP(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 0, 1) #define GET_HT_CAPABILITY_ELE_TX_STBC(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 7, 1) #define GET_HT_CAPABILITY_ELE_RX_STBC(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+1, 0, 2) -/* TXBF Capabilities */ -#define SET_HT_CAP_TXBF_RECEIVE_NDP_CAP(_pEleStart, _val) SET_BITS_TO_LE_4BYTE(((u8 *)(_pEleStart))+21, 3, 1, ((u8)_val)) -#define SET_HT_CAP_TXBF_TRANSMIT_NDP_CAP(_pEleStart, _val) SET_BITS_TO_LE_4BYTE(((u8 *)(_pEleStart))+21, 4, 1, ((u8)_val)) -#define SET_HT_CAP_TXBF_EXPLICIT_COMP_STEERING_CAP(_pEleStart, _val) SET_BITS_TO_LE_4BYTE(((u8 *)(_pEleStart))+21, 10, 1, ((u8)_val)) -#define SET_HT_CAP_TXBF_EXPLICIT_COMP_FEEDBACK_CAP(_pEleStart, _val) SET_BITS_TO_LE_4BYTE(((u8 *)(_pEleStart))+21, 15, 2, ((u8)_val)) -#define SET_HT_CAP_TXBF_COMP_STEERING_NUM_ANTENNAS(_pEleStart, _val) SET_BITS_TO_LE_4BYTE(((u8 *)(_pEleStart))+21, 23, 2, ((u8)_val)) - -#define GET_HT_CAP_TXBF_EXPLICIT_COMP_STEERING_CAP(_pEleStart) LE_BITS_TO_4BYTE((_pEleStart)+21, 10, 1) -#define GET_HT_CAP_TXBF_EXPLICIT_COMP_FEEDBACK_CAP(_pEleStart) LE_BITS_TO_4BYTE((_pEleStart)+21, 15, 2) - #endif /* _RTL871X_HT_H_ */ diff --git a/drivers/staging/rtl8723bs/include/rtw_io.h b/drivers/staging/rtl8723bs/include/rtw_io.h index e98083a07a66..be9741a056e5 100644 --- a/drivers/staging/rtl8723bs/include/rtw_io.h +++ b/drivers/staging/rtl8723bs/include/rtw_io.h @@ -8,70 +8,13 @@ #ifndef _RTW_IO_H_ #define _RTW_IO_H_ -#define NUM_IOREQ 8 - -#define MAX_PROT_SZ (64-16) - -#define _IOREADY 0 -#define _IO_WAIT_COMPLETE 1 -#define _IO_WAIT_RSP 2 - -/* IO COMMAND TYPE */ -#define _IOSZ_MASK_ (0x7F) -#define _IO_WRITE_ BIT(7) -#define _IO_FIXED_ BIT(8) -#define _IO_BURST_ BIT(9) -#define _IO_BYTE_ BIT(10) -#define _IO_HW_ BIT(11) -#define _IO_WORD_ BIT(12) -#define _IO_SYNC_ BIT(13) -#define _IO_CMDMASK_ (0x1F80) - - /* For prompt mode accessing, caller shall free io_req Otherwise, io_handler will free io_req */ - - -/* IO STATUS TYPE */ -#define _IO_ERR_ BIT(2) -#define _IO_SUCCESS_ BIT(1) -#define _IO_DONE_ BIT(0) - - -#define IO_RD32 (_IO_SYNC_ | _IO_WORD_) -#define IO_RD16 (_IO_SYNC_ | _IO_HW_) -#define IO_RD8 (_IO_SYNC_ | _IO_BYTE_) - -#define IO_RD32_ASYNC (_IO_WORD_) -#define IO_RD16_ASYNC (_IO_HW_) -#define IO_RD8_ASYNC (_IO_BYTE_) - -#define IO_WR32 (_IO_WRITE_ | _IO_SYNC_ | _IO_WORD_) -#define IO_WR16 (_IO_WRITE_ | _IO_SYNC_ | _IO_HW_) -#define IO_WR8 (_IO_WRITE_ | _IO_SYNC_ | _IO_BYTE_) - -#define IO_WR32_ASYNC (_IO_WRITE_ | _IO_WORD_) -#define IO_WR16_ASYNC (_IO_WRITE_ | _IO_HW_) -#define IO_WR8_ASYNC (_IO_WRITE_ | _IO_BYTE_) - -/* - - Only Sync. burst accessing is provided. - -*/ - -#define IO_WR_BURST(x) (_IO_WRITE_ | _IO_SYNC_ | _IO_BURST_ | ((x) & _IOSZ_MASK_)) -#define IO_RD_BURST(x) (_IO_SYNC_ | _IO_BURST_ | ((x) & _IOSZ_MASK_)) - - - /* below is for the intf_option bit defition... */ -#define _INTF_ASYNC_ BIT(0) /* support async io */ - struct intf_priv; struct intf_hdl; struct io_queue; diff --git a/drivers/staging/rtl8723bs/include/rtw_mlme.h b/drivers/staging/rtl8723bs/include/rtw_mlme.h index fc0b43d38d9a..e103c4a15d1a 100644 --- a/drivers/staging/rtl8723bs/include/rtw_mlme.h +++ b/drivers/staging/rtl8723bs/include/rtw_mlme.h @@ -26,7 +26,6 @@ #define WIFI_NULL_STATE 0x00000000 #define WIFI_ASOC_STATE 0x00000001 /* Under Linked state... */ -#define WIFI_REASOC_STATE 0x00000002 #define WIFI_SLEEP_STATE 0x00000004 #define WIFI_STATION_STATE 0x00000008 #define WIFI_AP_STATE 0x00000010 @@ -35,34 +34,11 @@ #define WIFI_UNDER_LINKING 0x00000080 #define WIFI_UNDER_WPS 0x00000100 -/* define WIFI_UNDER_CMD 0x00000200 */ -/* define WIFI_UNDER_P2P 0x00000400 */ #define WIFI_STA_ALIVE_CHK_STATE 0x00000400 #define WIFI_SITE_MONITOR 0x00000800 /* to indicate the station is under site surveying */ -#ifdef WDS -#define WIFI_WDS 0x00001000 -#define WIFI_WDS_RX_BEACON 0x00002000 /* already rx WDS AP beacon */ -#endif -#ifdef AUTO_CONFIG -#define WIFI_AUTOCONF 0x00004000 -#define WIFI_AUTOCONF_IND 0x00008000 -#endif - -/** -* ========== P2P Section Start =============== -#define WIFI_P2P_LISTEN_STATE 0x00010000 -#define WIFI_P2P_GROUP_FORMATION_STATE 0x00020000 - ========== P2P Section End =============== -*/ /* ifdef UNDER_MPTEST */ #define WIFI_MP_STATE 0x00010000 -#define WIFI_MP_CTX_BACKGROUND 0x00020000 /* in continuous tx background */ -#define WIFI_MP_CTX_ST 0x00040000 /* in continuous tx with single-tone */ -#define WIFI_MP_CTX_BACKGROUND_PENDING 0x00080000 /* pending in continuous tx background due to out of skb */ -#define WIFI_MP_CTX_CCK_HW 0x00100000 /* in continuous tx */ -#define WIFI_MP_CTX_CCK_CS 0x00200000 /* in continuous tx with carrier suppression */ -#define WIFI_MP_LPBK_STATE 0x00400000 /* endif */ /* define _FW_UNDER_CMD WIFI_UNDER_CMD */ @@ -94,8 +70,6 @@ enum { GHZ_MAX, }; -#define rtw_band_valid(band) ((band) >= GHZ24_50 && (band) < GHZ_MAX) - /* there are several "locks" in mlme_priv, @@ -115,10 +89,6 @@ MUST always be first lock xmit_priv.lock and then call any queue functions which take __queue.lock. */ - -#define traffic_threshold 10 -#define traffic_scan_period 500 - struct sitesurvey_ctrl { u64 last_tx_pkts; uint last_rx_pkts; @@ -141,139 +111,6 @@ struct rt_link_detect_t { u32 LowPowerTransitionCount; }; -struct profile_info { - u8 ssidlen; - u8 ssid[WLAN_SSID_MAXLEN]; - u8 peermac[ETH_ALEN]; -}; - -struct tx_invite_req_info { - u8 token; - u8 benable; - u8 go_ssid[WLAN_SSID_MAXLEN]; - u8 ssidlen; - u8 go_bssid[ETH_ALEN]; - u8 peer_macaddr[ETH_ALEN]; - u8 operating_ch; /* This information will be set by using the p2p_set op_ch =x */ - u8 peer_ch; /* The listen channel for peer P2P device */ - -}; - -struct tx_invite_resp_info { - u8 token; /* Used to record the dialog token of p2p invitation request frame. */ -}; - -struct tx_provdisc_req_info { - u16 wps_config_method_request; /* Used when sending the provisioning request frame */ - u16 peer_channel_num[2]; /* The channel number which the receiver stands. */ - struct ndis_802_11_ssid ssid; - u8 peerDevAddr[ETH_ALEN]; /* Peer device address */ - u8 peerIFAddr[ETH_ALEN]; /* Peer interface address */ - u8 benable; /* This provision discovery request frame is trigger to send or not */ -}; - -struct rx_provdisc_req_info { /* When peer device issue prov_disc_req first, we should store the following information */ - u8 peerDevAddr[ETH_ALEN]; /* Peer device address */ - u8 strconfig_method_desc_of_prov_disc_req[4]; /* description for the config method located in the provisioning discovery request frame. */ - /* The UI must know this information to know which config method the remote p2p device is requiring. */ -}; - -struct tx_nego_req_info { - u16 peer_channel_num[2]; /* The channel number which the receiver stands. */ - u8 peerDevAddr[ETH_ALEN]; /* Peer device address */ - u8 benable; /* This negotiation request frame is trigger to send or not */ -}; - -struct group_id_info { - u8 go_device_addr[ETH_ALEN]; /* The GO's device address of this P2P group */ - u8 ssid[WLAN_SSID_MAXLEN]; /* The SSID of this P2P group */ -}; - -struct scan_limit_info { - u8 scan_op_ch_only; /* When this flag is set, the driver should just scan the operation channel */ - u8 operation_ch[2]; /* Store the operation channel of invitation request frame */ -}; - -struct wifidirect_info { - struct adapter *padapter; - struct timer_list find_phase_timer; - struct timer_list restore_p2p_state_timer; - - /* Used to do the scanning. After confirming the peer is availalble, the driver transmits the P2P frame to peer. */ - struct timer_list pre_tx_scan_timer; - struct timer_list reset_ch_sitesurvey; - struct timer_list reset_ch_sitesurvey2; /* Just for resetting the scan limit function by using p2p nego */ - struct tx_provdisc_req_info tx_prov_disc_info; - struct rx_provdisc_req_info rx_prov_disc_info; - struct tx_invite_req_info invitereq_info; - struct profile_info profileinfo[P2P_MAX_PERSISTENT_GROUP_NUM]; /* Store the profile information of persistent group */ - struct tx_invite_resp_info inviteresp_info; - struct tx_nego_req_info nego_req_info; - struct group_id_info groupid_info; /* Store the group id information when doing the group negotiation handshake. */ - struct scan_limit_info rx_invitereq_info; /* Used for get the limit scan channel from the Invitation procedure */ - struct scan_limit_info p2p_info; /* Used for get the limit scan channel from the P2P negotiation handshake */ - enum p2p_role role; - enum p2p_state pre_p2p_state; - enum p2p_state p2p_state; - u8 device_addr[ETH_ALEN]; /* The device address should be the mac address of this device. */ - u8 interface_addr[ETH_ALEN]; - u8 social_chan[4]; - u8 listen_channel; - u8 operating_channel; - u8 listen_dwell; /* This value should be between 1 and 3 */ - u8 support_rate[8]; - u8 p2p_wildcard_ssid[P2P_WILDCARD_SSID_LEN]; - u8 intent; /* should only include the intent value. */ - u8 p2p_peer_interface_addr[ETH_ALEN]; - u8 p2p_peer_device_addr[ETH_ALEN]; - u8 peer_intent; /* Included the intent value and tie breaker value. */ - u8 device_name[WPS_MAX_DEVICE_NAME_LEN]; /* Device name for displaying on searching device screen */ - u8 device_name_len; - u8 profileindex; /* Used to point to the index of profileinfo array */ - u8 peer_operating_ch; - u8 find_phase_state_exchange_cnt; - u16 device_password_id_for_nego; /* The device password ID for group negotiation */ - u8 negotiation_dialog_token; - u8 nego_ssid[WLAN_SSID_MAXLEN]; /* SSID information for group negotiation */ - u8 nego_ssidlen; - u8 p2p_group_ssid[WLAN_SSID_MAXLEN]; - u8 p2p_group_ssid_len; - u8 persistent_supported; /* Flag to know the persistent function should be supported or not. */ - /* In the Sigma test, the Sigma will provide this enable from the sta_set_p2p CAPI. */ - /* 0: disable */ - /* 1: enable */ - u8 session_available; /* Flag to set the WFD session available to enable or disable "by Sigma" */ - /* In the Sigma test, the Sigma will disable the session available by using the sta_preset CAPI. */ - /* 0: disable */ - /* 1: enable */ - - u8 wfd_tdls_enable; /* Flag to enable or disable the TDLS by WFD Sigma */ - /* 0: disable */ - /* 1: enable */ - u8 wfd_tdls_weaksec; /* Flag to enable or disable the weak security function for TDLS by WFD Sigma */ - /* 0: disable */ - /* In this case, the driver can't issue the tdsl setup request frame. */ - /* 1: enable */ - /* In this case, the driver can issue the tdls setup request frame */ - /* even the current security is weak security. */ - - enum p2p_wpsinfo ui_got_wps_info; /* This field will store the WPS value (PIN value or PBC) that UI had got from the user. */ - u16 supported_wps_cm; /* This field describes the WPS config method which this driver supported. */ - /* The value should be the combination of config method defined in page104 of WPS v2.0 spec. */ - u8 external_uuid; /* UUID flag */ - u8 uuid[16]; /* UUID */ - uint channel_list_attr_len; /* This field will contain the length of body of P2P Channel List attribute of group negotitation response frame. */ - u8 channel_list_attr[100]; /* This field will contain the body of P2P Channel List attribute of group negotitation response frame. */ - /* We will use the channel_cnt and channel_list fields when constructing the group negotitation confirm frame. */ - u8 driver_interface; /* Indicate DRIVER_WEXT or DRIVER_CFG80211 */ -}; - -struct tdls_ss_record { /* signal strength record */ - u8 macaddr[ETH_ALEN]; - u8 rx_pwd_ba11; - u8 is_tdls_sta; /* true: direct link sta, false: else */ -}; - /* used for mlme_priv.roam_flags */ enum { RTW_ROAM_ON_EXPIRED = BIT0, @@ -408,11 +245,6 @@ struct mlme_priv { unsigned long timeBcnInfoChkStart; }; -#define rtw_mlme_set_auto_scan_int(adapter, ms) \ - do { \ - adapter->mlmepriv.auto_scan_int_ms = ms; \ - while (0) - void rtw_mlme_reset_auto_scan_int(struct adapter *adapter); struct hostapd_priv { @@ -556,20 +388,6 @@ int is_same_network(struct wlan_bssid_ex *src, struct wlan_bssid_ex *dst, u8 fea #define rtw_roam_flags(adapter) ((adapter)->mlmepriv.roam_flags) #define rtw_chk_roam_flags(adapter, flags) ((adapter)->mlmepriv.roam_flags & flags) -#define rtw_clr_roam_flags(adapter, flags) \ - do { \ - ((adapter)->mlmepriv.roam_flags &= ~flags); \ - } while (0) - -#define rtw_set_roam_flags(adapter, flags) \ - do { \ - ((adapter)->mlmepriv.roam_flags |= flags); \ - } while (0) - -#define rtw_assign_roam_flags(adapter, flags) \ - do { \ - ((adapter)->mlmepriv.roam_flags = flags); \ - } while (0) void _rtw_roaming(struct adapter *adapter, struct wlan_network *tgt_network); void rtw_roaming(struct adapter *adapter, struct wlan_network *tgt_network); diff --git a/drivers/staging/rtl8723bs/include/rtw_mlme_ext.h b/drivers/staging/rtl8723bs/include/rtw_mlme_ext.h index 65e138a5238f..5b8574f5a251 100644 --- a/drivers/staging/rtl8723bs/include/rtw_mlme_ext.h +++ b/drivers/staging/rtl8723bs/include/rtw_mlme_ext.h @@ -20,50 +20,18 @@ /* define DISCONNECT_TO (3000) */ #define ADDBA_TO (2000) -#define LINKED_TO (1) /* unit:2 sec, 1x2 =2 sec */ - #define REAUTH_LIMIT (4) #define REASSOC_LIMIT (4) -#define READDBA_LIMIT (2) - -#define ROAMING_LIMIT 8 -/* define IOCMD_REG0 0x10250370 */ -/* define IOCMD_REG1 0x10250374 */ -/* define IOCMD_REG2 0x10250378 */ - -/* define FW_DYNAMIC_FUN_SWITCH 0x10250364 */ - -/* define WRITE_BB_CMD 0xF0000001 */ -/* define SET_CHANNEL_CMD 0xF3000000 */ -/* define UPDATE_RA_CMD 0xFD0000A2 */ #define DYNAMIC_FUNC_DISABLE (0x0) /* ====== ODM_ABILITY_E ======== */ /* BB ODM section BIT 0-15 */ #define DYNAMIC_BB_DIG BIT0 /* ODM_BB_DIG */ -#define DYNAMIC_BB_RA_MASK BIT1 /* ODM_BB_RA_MASK */ #define DYNAMIC_BB_DYNAMIC_TXPWR BIT2 /* ODM_BB_DYNAMIC_TXPWR */ -#define DYNAMIC_BB_BB_FA_CNT BIT3 /* ODM_BB_FA_CNT */ -#define DYNAMIC_BB_RSSI_MONITOR BIT4 /* ODM_BB_RSSI_MONITOR */ -#define DYNAMIC_BB_CCK_PD BIT5 /* ODM_BB_CCK_PD */ #define DYNAMIC_BB_ANT_DIV BIT6 /* ODM_BB_ANT_DIV */ -#define DYNAMIC_BB_PWR_SAVE BIT7 /* ODM_BB_PWR_SAVE */ -#define DYNAMIC_BB_PWR_TRAIN BIT8 /* ODM_BB_PWR_TRAIN */ -#define DYNAMIC_BB_RATE_ADAPTIVE BIT9 /* ODM_BB_RATE_ADAPTIVE */ -#define DYNAMIC_BB_PATH_DIV BIT10/* ODM_BB_PATH_DIV */ -#define DYNAMIC_BB_PSD BIT11/* ODM_BB_PSD */ -#define DYNAMIC_BB_RXHP BIT12/* ODM_BB_RXHP */ -#define DYNAMIC_BB_ADAPTIVITY BIT13/* ODM_BB_ADAPTIVITY */ -#define DYNAMIC_BB_DYNAMIC_ATC BIT14/* ODM_BB_DYNAMIC_ATC */ - -/* MAC DM section BIT 16-23 */ -#define DYNAMIC_MAC_EDCA_TURBO BIT16/* ODM_MAC_EDCA_TURBO */ -#define DYNAMIC_MAC_EARLY_MODE BIT17/* ODM_MAC_EARLY_MODE */ /* RF ODM section BIT 24-31 */ -#define DYNAMIC_RF_TX_PWR_TRACK BIT24/* ODM_RF_TX_PWR_TRACK */ -#define DYNAMIC_RF_RX_GAIN_TRACK BIT25/* ODM_RF_RX_GAIN_TRACK */ #define DYNAMIC_RF_CALIBRATION BIT26/* ODM_RF_CALIBRATION */ #define DYNAMIC_ALL_FUNC_ENABLE 0xFFFFFFF @@ -91,11 +59,6 @@ MCS rate definitions *********************************************************/ #define MCS_RATE_1R (0x000000ff) -#define MCS_RATE_2R (0x0000ffff) -#define MCS_RATE_3R (0x00ffffff) -#define MCS_RATE_4R (0xffffffff) -#define MCS_RATE_2R_13TO15_OFF (0x00001fff) - extern unsigned char RTW_WPA_OUI[]; extern unsigned char WMM_OUI[]; diff --git a/drivers/staging/rtl8723bs/include/rtw_mp.h b/drivers/staging/rtl8723bs/include/rtw_mp.h index ea3abee325ef..f94bb18479da 100644 --- a/drivers/staging/rtl8723bs/include/rtw_mp.h +++ b/drivers/staging/rtl8723bs/include/rtw_mp.h @@ -8,7 +8,6 @@ #define _RTW_MP_H_ #define MAX_MP_XMITBUF_SZ 2048 -#define NR_MP_XMITFRAME 8 struct mp_xmit_frame { struct list_head list; @@ -151,12 +150,6 @@ struct mpt_context { }; /* endif */ -/* E-Fuse */ -#define EFUSE_MAP_SIZE 512 - -#define EFUSE_MAX_SIZE 512 -/* end of E-Fuse */ - /* define RTPRIV_IOCTL_MP (SIOCIWFIRSTPRIV + 0x17) */ enum { WRITE_REG = 1, @@ -259,33 +252,11 @@ struct mp_priv { u8 *TXradomBuffer; }; -#define LOWER true -#define RAISE false - /* Hardware Registers */ -#define BB_REG_BASE_ADDR 0x800 - -#define MAX_RF_PATH_NUMS RF_PATH_MAX - extern u8 mpdatarate[NumRates]; #define MAX_TX_PWR_INDEX_N_MODE 64 /* 0x3F */ -#define RX_PKT_BROADCAST 1 -#define RX_PKT_DEST_ADDR 2 -#define RX_PKT_PHY_MATCH 3 - -#define Mac_OFDM_OK 0x00000000 -#define Mac_OFDM_Fail 0x10000000 -#define Mac_OFDM_FasleAlarm 0x20000000 -#define Mac_CCK_OK 0x30000000 -#define Mac_CCK_Fail 0x40000000 -#define Mac_CCK_FasleAlarm 0x50000000 -#define Mac_HT_OK 0x60000000 -#define Mac_HT_Fail 0x70000000 -#define Mac_HT_FasleAlarm 0x90000000 -#define Mac_DropPacket 0xA0000000 - #define REG_RF_BB_GAIN_OFFSET 0x7f #define RF_GAIN_OFFSET_MASK 0xfffff diff --git a/drivers/staging/rtl8723bs/include/rtw_pwrctrl.h b/drivers/staging/rtl8723bs/include/rtw_pwrctrl.h index 0767dbb84199..c27d07861b8c 100644 --- a/drivers/staging/rtl8723bs/include/rtw_pwrctrl.h +++ b/drivers/staging/rtl8723bs/include/rtw_pwrctrl.h @@ -9,25 +9,8 @@ #include <linux/mutex.h> -#define FW_PWR0 0 -#define FW_PWR1 1 -#define FW_PWR2 2 -#define FW_PWR3 3 - - -#define HW_PWR0 7 -#define HW_PWR1 6 -#define HW_PWR2 2 -#define HW_PWR3 0 -#define HW_PWR4 8 - -#define FW_PWRMSK 0x7 - - #define XMIT_ALIVE BIT(0) -#define RECV_ALIVE BIT(1) #define CMD_ALIVE BIT(2) -#define EVT_ALIVE BIT(3) #define BTCOEX_ALIVE BIT(4) @@ -58,31 +41,17 @@ enum { #define PS_ALL_ON BIT(2) #define PS_ST_ACTIVE BIT(3) -#define PS_ISR_ENABLE BIT(4) -#define PS_IMR_ENABLE BIT(5) #define PS_ACK BIT(6) #define PS_TOGGLE BIT(7) #define PS_STATE_MASK (0x0F) -#define PS_STATE_HW_MASK (0x07) -#define PS_SEQ_MASK (0xc0) #define PS_STATE(x) (PS_STATE_MASK & (x)) -#define PS_STATE_HW(x) (PS_STATE_HW_MASK & (x)) -#define PS_SEQ(x) (PS_SEQ_MASK & (x)) #define PS_STATE_S0 (PS_DPS) -#define PS_STATE_S1 (PS_LCLK) #define PS_STATE_S2 (PS_RF_OFF) -#define PS_STATE_S3 (PS_ALL_ON) #define PS_STATE_S4 ((PS_ST_ACTIVE) | (PS_ALL_ON)) - -#define PS_IS_RF_ON(x) ((x) & (PS_ALL_ON)) -#define PS_IS_ACTIVE(x) ((x) & (PS_ST_ACTIVE)) -#define CLR_PS_STATE(x) ((x) = ((x) & (0xF0))) - - struct reportpwrstate_parm { unsigned char mode; unsigned char state; /* the CPWM value */ @@ -91,10 +60,6 @@ struct reportpwrstate_parm { #define LPS_DELAY_TIME (1 * HZ) /* 1 sec */ -#define EXE_PWR_NONE 0x01 -#define EXE_PWR_IPS 0x02 -#define EXE_PWR_LPS 0x04 - /* RF state. */ enum rt_rf_power_state { rf_on, /* RF is on after RFSleep or RFOff */ @@ -247,9 +212,6 @@ struct pwrctrl_priv { _set_timer(&(pwrctl)->pwr_state_check_timer, (ms)); \ } while (0) -#define rtw_set_pwr_state_check_timer(pwrctl) \ - _rtw_set_pwr_state_check_timer((pwrctl), (pwrctl)->pwr_state_check_interval) - extern void rtw_init_pwrctrl_priv(struct adapter *adapter); extern void rtw_free_pwrctrl_priv(struct adapter *adapter); diff --git a/drivers/staging/rtl8723bs/include/rtw_recv.h b/drivers/staging/rtl8723bs/include/rtw_recv.h index fef2fd0e8c84..c93594f75436 100644 --- a/drivers/staging/rtl8723bs/include/rtw_recv.h +++ b/drivers/staging/rtl8723bs/include/rtw_recv.h @@ -9,8 +9,6 @@ #define NR_RECVBUFF (8) -#define NR_PREALLOC_RECV_SKB (8) - #define NR_RECVFRAME 256 #define RXFRAME_ALIGN 8 @@ -18,21 +16,11 @@ #define DRVINFO_SZ 4 /* unit is 8bytes */ -#define MAX_RXFRAME_CNT 512 #define MAX_RX_NUMBLKS (32) #define RECVFRAME_HDR_ALIGN 128 - -#define PHY_RSSI_SLID_WIN_MAX 100 -#define PHY_LINKQUALITY_SLID_WIN_MAX 20 - - #define SNAP_SIZE sizeof(struct ieee80211_snap_hdr) -#define RX_MPDU_QUEUE 0 -#define RX_CMD_QUEUE 1 -#define RX_MAX_QUEUE 2 - #define MAX_SUBFRAME_COUNT 64 #define LLC_HEADER_LENGTH 6 @@ -178,7 +166,6 @@ struct rx_pkt_attrib { #define RECVBUFF_ALIGN_SZ 8 #define RXDESC_SIZE 24 -#define RXDESC_OFFSET RXDESC_SIZE struct recv_stat { __le32 rxdw0; @@ -191,8 +178,6 @@ struct recv_stat { #endif /* if BUF_DESC_ARCH is defined, rx_buf_desc occupy 4 double words */ }; -#define EOR BIT(30) - /* accesser of recv_priv: rtw_recv_entry(dispatch / passive level); recv_thread(passive) ; returnpkt(dispatch) ; halt(passive) ; @@ -363,7 +348,6 @@ extern union recv_frame *_rtw_alloc_recvframe(struct __queue *pfree_recv_queue); extern union recv_frame *rtw_alloc_recvframe(struct __queue *pfree_recv_queue); /* get a free recv_frame from pfree_recv_queue */ extern int rtw_free_recvframe(union recv_frame *precvframe, struct __queue *pfree_recv_queue); -#define rtw_dequeue_recvframe(queue) rtw_alloc_recvframe(queue) extern int _rtw_enqueue_recvframe(union recv_frame *precvframe, struct __queue *queue); extern int rtw_enqueue_recvframe(union recv_frame *precvframe, struct __queue *queue); diff --git a/drivers/staging/rtl8723bs/include/rtw_security.h b/drivers/staging/rtl8723bs/include/rtw_security.h index 7587fa888527..98afbd3054a4 100644 --- a/drivers/staging/rtl8723bs/include/rtw_security.h +++ b/drivers/staging/rtl8723bs/include/rtw_security.h @@ -22,14 +22,9 @@ const char *security_type_str(u8 value); -#define SHA256_MAC_LEN 32 #define AES_BLOCK_SIZE 16 #define AES_PRIV_SIZE (4 * 44) -#define RTW_KEK_LEN 16 -#define RTW_KCK_LEN 16 -#define RTW_REPLAY_CTR_LEN 8 - enum { ENCRYP_PROTOCOL_OPENSYS, /* open system */ ENCRYP_PROTOCOL_WEP, /* WEP */ diff --git a/drivers/staging/rtl8723bs/include/rtw_xmit.h b/drivers/staging/rtl8723bs/include/rtw_xmit.h index 676ead0372fa..a3b4310caddf 100644 --- a/drivers/staging/rtl8723bs/include/rtw_xmit.h +++ b/drivers/staging/rtl8723bs/include/rtw_xmit.h @@ -35,7 +35,6 @@ #define BCN_QUEUE_INX 4 #define MGT_QUEUE_INX 5 #define HIGH_QUEUE_INX 6 -#define TXCMD_QUEUE_INX 7 #define HW_QUEUE_ENTRY 8 @@ -192,16 +191,7 @@ struct pkt_attrib { #define NULL_FRAMETAG (0x0) #define DATA_FRAMETAG 0x01 -#define L2_FRAMETAG 0x02 #define MGNT_FRAMETAG 0x03 -#define AMSDU_FRAMETAG 0x04 - -#define EII_FRAMETAG 0x05 -#define IEEE8023_FRAMETAG 0x06 - -#define MP_FRAMETAG 0x07 - -#define TXAGG_FRAMETAG 0x08 enum { XMITBUF_DATA = 0, diff --git a/drivers/staging/rtl8723bs/include/sdio_hal.h b/drivers/staging/rtl8723bs/include/sdio_hal.h index 6fae19dd0cbd..024acf9b530d 100644 --- a/drivers/staging/rtl8723bs/include/sdio_hal.h +++ b/drivers/staging/rtl8723bs/include/sdio_hal.h @@ -7,10 +7,6 @@ #ifndef __SDIO_HAL_H__ #define __SDIO_HAL_H__ - -extern u8 sd_hal_bus_init(struct adapter *padapter); -extern u8 sd_hal_bus_deinit(struct adapter *padapter); - u8 sd_int_isr(struct adapter *padapter); void sd_int_dpc(struct adapter *padapter); void rtw_set_hal_ops(struct adapter *padapter); diff --git a/drivers/staging/rtl8723bs/include/sdio_osintf.h b/drivers/staging/rtl8723bs/include/sdio_osintf.h deleted file mode 100644 index 146b44f95e29..000000000000 --- a/drivers/staging/rtl8723bs/include/sdio_osintf.h +++ /dev/null @@ -1,16 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/****************************************************************************** - * - * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. - * - ******************************************************************************/ -#ifndef __SDIO_OSINTF_H__ -#define __SDIO_OSINTF_H__ - - - -u8 sd_hal_bus_init(struct adapter *padapter); -u8 sd_hal_bus_deinit(struct adapter *padapter); -void sd_c2h_hdl(struct adapter *padapter); - -#endif diff --git a/drivers/staging/rtl8723bs/include/sta_info.h b/drivers/staging/rtl8723bs/include/sta_info.h index 1ea3fe22b99a..b3535fed3de7 100644 --- a/drivers/staging/rtl8723bs/include/sta_info.h +++ b/drivers/staging/rtl8723bs/include/sta_info.h @@ -222,53 +222,24 @@ struct sta_info { + sta->sta_stats.rx_ctrl_pkts \ + sta->sta_stats.rx_data_pkts) -#define sta_last_rx_pkts(sta) \ - (sta->sta_stats.last_rx_mgnt_pkts \ - + sta->sta_stats.last_rx_ctrl_pkts \ - + sta->sta_stats.last_rx_data_pkts) - #define sta_rx_data_pkts(sta) \ (sta->sta_stats.rx_data_pkts) #define sta_last_rx_data_pkts(sta) \ (sta->sta_stats.last_rx_data_pkts) -#define sta_rx_mgnt_pkts(sta) \ - (sta->sta_stats.rx_mgnt_pkts) - -#define sta_last_rx_mgnt_pkts(sta) \ - (sta->sta_stats.last_rx_mgnt_pkts) - #define sta_rx_beacon_pkts(sta) \ (sta->sta_stats.rx_beacon_pkts) #define sta_last_rx_beacon_pkts(sta) \ (sta->sta_stats.last_rx_beacon_pkts) -#define sta_rx_probereq_pkts(sta) \ - (sta->sta_stats.rx_probereq_pkts) - -#define sta_last_rx_probereq_pkts(sta) \ - (sta->sta_stats.last_rx_probereq_pkts) - #define sta_rx_probersp_pkts(sta) \ (sta->sta_stats.rx_probersp_pkts) #define sta_last_rx_probersp_pkts(sta) \ (sta->sta_stats.last_rx_probersp_pkts) -#define sta_rx_probersp_bm_pkts(sta) \ - (sta->sta_stats.rx_probersp_bm_pkts) - -#define sta_last_rx_probersp_bm_pkts(sta) \ - (sta->sta_stats.last_rx_probersp_bm_pkts) - -#define sta_rx_probersp_uo_pkts(sta) \ - (sta->sta_stats.rx_probersp_uo_pkts) - -#define sta_last_rx_probersp_uo_pkts(sta) \ - (sta->sta_stats.last_rx_probersp_uo_pkts) - #define sta_update_last_rx_pkts(sta) \ do { \ sta->sta_stats.last_rx_mgnt_pkts = sta->sta_stats.rx_mgnt_pkts; \ @@ -281,21 +252,6 @@ struct sta_info { sta->sta_stats.last_rx_data_pkts = sta->sta_stats.rx_data_pkts; \ } while (0) -#define STA_RX_PKTS_ARG(sta) \ - sta->sta_stats.rx_mgnt_pkts \ - , sta->sta_stats.rx_ctrl_pkts \ - , sta->sta_stats.rx_data_pkts - -#define STA_LAST_RX_PKTS_ARG(sta) \ - sta->sta_stats.last_rx_mgnt_pkts \ - , sta->sta_stats.last_rx_ctrl_pkts \ - , sta->sta_stats.last_rx_data_pkts - -#define STA_RX_PKTS_DIFF_ARG(sta) \ - sta->sta_stats.rx_mgnt_pkts - sta->sta_stats.last_rx_mgnt_pkts \ - , sta->sta_stats.rx_ctrl_pkts - sta->sta_stats.last_rx_ctrl_pkts \ - , sta->sta_stats.rx_data_pkts - sta->sta_stats.last_rx_data_pkts - #define STA_PKTS_FMT "(m:%llu, c:%llu, d:%llu)" struct sta_priv { diff --git a/drivers/staging/rtl8723bs/include/wifi.h b/drivers/staging/rtl8723bs/include/wifi.h index 53f9411fcc4c..230b2c4ffd3b 100644 --- a/drivers/staging/rtl8723bs/include/wifi.h +++ b/drivers/staging/rtl8723bs/include/wifi.h @@ -7,30 +7,11 @@ #ifndef _WIFI_H_ #define _WIFI_H_ -#define WLAN_ETHHDR_LEN 14 -#define WLAN_ETHADDR_LEN 6 -#define WLAN_IEEE_OUI_LEN 3 -#define WLAN_ADDR_LEN 6 -#define WLAN_CRC_LEN 4 -#define WLAN_BSSID_LEN 6 -#define WLAN_BSS_TS_LEN 8 #define WLAN_HDR_A3_LEN 24 -#define WLAN_HDR_A4_LEN 30 #define WLAN_HDR_A3_QOS_LEN 26 -#define WLAN_HDR_A4_QOS_LEN 32 -#define WLAN_SSID_MAXLEN 32 -#define WLAN_DATA_MAXLEN 2312 -#define WLAN_A3_PN_OFFSET 24 -#define WLAN_A4_PN_OFFSET 30 - -#define WLAN_MIN_ETHFRM_LEN 60 -#define WLAN_MAX_ETHFRM_LEN 1514 -#define WLAN_ETHHDR_LEN 14 #define WLAN_WMM_LEN 24 -#define P80211CAPTURE_VERSION 0x80211001 - /* This value is tested by WiFi 11n Test Plan 5.2.3. */ /* This test verifies the WLAN NIC can update the NAV through sending the CTS with large duration. */ #define WiFiNavUpperUs 30000 /* 30 ms */ @@ -164,9 +145,6 @@ enum { #define GetFragNum(pbuf) \ (le16_to_cpu(*(__le16 *)((size_t)(pbuf) + 22)) & 0x0f) -#define GetTupleCache(pbuf) \ - (cpu_to_le16(*(unsigned short *)((size_t)(pbuf) + 22))) - #define SetFragNum(pbuf, num) \ do { \ *(unsigned short *)((size_t)(pbuf) + 22) = \ @@ -305,27 +283,13 @@ static inline int IsFrameTypeCtrl(unsigned char *pframe) /*----------------------------------------------------------------------------- Below is for the security related definition ------------------------------------------------------------------------------*/ -#define _RESERVED_FRAME_TYPE_ 0 -#define _SKB_FRAME_TYPE_ 2 -#define _PRE_ALLOCMEM_ 1 -#define _PRE_ALLOCHDR_ 3 -#define _PRE_ALLOCLLCHDR_ 4 -#define _PRE_ALLOCICVHDR_ 5 -#define _PRE_ALLOCMICHDR_ 6 - -#define _ACKCTSLNG_ 14 /* 14 bytes long, including crclng */ -#define _CRCLNG_ 4 #define _ASOCREQ_IE_OFFSET_ 4 /* excluding wlan_hdr */ -#define _ASOCRSP_IE_OFFSET_ 6 #define _REASOCREQ_IE_OFFSET_ 10 -#define _REASOCRSP_IE_OFFSET_ 6 #define _PROBEREQ_IE_OFFSET_ 0 #define _PROBERSP_IE_OFFSET_ 12 #define _AUTH_IE_OFFSET_ 6 -#define _DEAUTH_IE_OFFSET_ 0 #define _BEACON_IE_OFFSET_ 12 -#define _PUBLIC_ACTION_IE_OFFSET_ 8 #define _FIXED_IE_LENGTH_ _BEACON_IE_OFFSET_ @@ -336,20 +300,11 @@ static inline int IsFrameTypeCtrl(unsigned char *pframe) #define _AUTH_SEQ_NUM_ 2 #define _BEACON_ITERVAL_ 2 #define _CAPABILITY_ 2 -#define _CURRENT_APADDR_ 6 -#define _LISTEN_INTERVAL_ 2 #define _RSON_CODE_ 2 #define _ASOC_ID_ 2 #define _STATUS_CODE_ 2 #define _TIMESTAMP_ 8 -#define AUTH_ODD_TO 0 -#define AUTH_EVEN_TO 1 - -#define WLAN_ETHCONV_ENCAP 1 -#define WLAN_ETHCONV_RFC1042 2 -#define WLAN_ETHCONV_8021h 3 - /*----------------------------------------------------------------------------- Below is the definition for 802.11i / 802.1x ------------------------------------------------------------------------------*/ @@ -361,18 +316,10 @@ static inline int IsFrameTypeCtrl(unsigned char *pframe) Below is the definition for WMM ------------------------------------------------------------------------------*/ #define _WMM_IE_Length_ 7 /* for WMM STA */ -#define _WMM_Para_Element_Length_ 24 - /*----------------------------------------------------------------------------- Below is the definition for 802.11n ------------------------------------------------------------------------------*/ - -#define SetOrderBit(pbuf) \ - do { \ - *(unsigned short *)(pbuf) |= cpu_to_le16(_ORDER_); \ - } while (0) - #define GetOrderBit(pbuf) (((*(unsigned short *)(pbuf)) & cpu_to_le16(_ORDER_)) != 0) #define ACT_CAT_VENDOR 0x7F/* 127 */ @@ -440,244 +387,20 @@ struct ADDBA_request { #define IEEE80211_HT_CAP_SGI_40 0x0040 #define IEEE80211_HT_CAP_TX_STBC 0x0080 #define IEEE80211_HT_CAP_RX_STBC_1R 0x0100 -#define IEEE80211_HT_CAP_RX_STBC_2R 0x0200 #define IEEE80211_HT_CAP_RX_STBC_3R 0x0300 -#define IEEE80211_HT_CAP_DELAY_BA 0x0400 #define IEEE80211_HT_CAP_MAX_AMSDU 0x0800 #define IEEE80211_HT_CAP_DSSSCCK40 0x1000 /* 802.11n HT capability AMPDU settings */ #define IEEE80211_HT_CAP_AMPDU_FACTOR 0x03 #define IEEE80211_HT_CAP_AMPDU_DENSITY 0x1C -/* 802.11n HT capability MSC set */ -#define IEEE80211_SUPP_MCS_SET_UEQM 4 -#define IEEE80211_HT_CAP_MAX_STREAMS 4 -#define IEEE80211_SUPP_MCS_SET_LEN 10 -/* maximum streams the spec allows */ -#define IEEE80211_HT_CAP_MCS_TX_DEFINED 0x01 -#define IEEE80211_HT_CAP_MCS_TX_RX_DIFF 0x02 -#define IEEE80211_HT_CAP_MCS_TX_STREAMS 0x0C -#define IEEE80211_HT_CAP_MCS_TX_UEQM 0x10 -/* 802.11n HT capability TXBF capability */ -#define IEEE80211_HT_CAP_TXBF_RX_NDP 0x00000008 -#define IEEE80211_HT_CAP_TXBF_TX_NDP 0x00000010 -#define IEEE80211_HT_CAP_TXBF_EXPLICIT_COMP_STEERING_CAP 0x00000400 /* endif */ /* ===============WPS Section =============== */ -/* For WPSv1.0 */ -#define WPSOUI 0x0050f204 /* WPS attribute ID */ -#define WPS_ATTR_VER1 0x104A -#define WPS_ATTR_SIMPLE_CONF_STATE 0x1044 -#define WPS_ATTR_RESP_TYPE 0x103B -#define WPS_ATTR_UUID_E 0x1047 -#define WPS_ATTR_MANUFACTURER 0x1021 -#define WPS_ATTR_MODEL_NAME 0x1023 -#define WPS_ATTR_MODEL_NUMBER 0x1024 -#define WPS_ATTR_SERIAL_NUMBER 0x1042 -#define WPS_ATTR_PRIMARY_DEV_TYPE 0x1054 -#define WPS_ATTR_SEC_DEV_TYPE_LIST 0x1055 -#define WPS_ATTR_DEVICE_NAME 0x1011 -#define WPS_ATTR_CONF_METHOD 0x1008 -#define WPS_ATTR_RF_BANDS 0x103C -#define WPS_ATTR_DEVICE_PWID 0x1012 -#define WPS_ATTR_REQUEST_TYPE 0x103A -#define WPS_ATTR_ASSOCIATION_STATE 0x1002 -#define WPS_ATTR_CONFIG_ERROR 0x1009 -#define WPS_ATTR_VENDOR_EXT 0x1049 #define WPS_ATTR_SELECTED_REGISTRAR 0x1041 -/* Value of WPS attribute "WPS_ATTR_DEVICE_NAME */ -#define WPS_MAX_DEVICE_NAME_LEN 32 - -/* Value of WPS Request Type Attribute */ -#define WPS_REQ_TYPE_ENROLLEE_INFO_ONLY 0x00 -#define WPS_REQ_TYPE_ENROLLEE_OPEN_8021X 0x01 -#define WPS_REQ_TYPE_REGISTRAR 0x02 -#define WPS_REQ_TYPE_WLAN_MANAGER_REGISTRAR 0x03 - -/* Value of WPS Response Type Attribute */ -#define WPS_RESPONSE_TYPE_INFO_ONLY 0x00 -#define WPS_RESPONSE_TYPE_8021X 0x01 -#define WPS_RESPONSE_TYPE_REGISTRAR 0x02 -#define WPS_RESPONSE_TYPE_AP 0x03 - -/* Value of WPS WiFi Simple Configuration State Attribute */ -#define WPS_WSC_STATE_NOT_CONFIG 0x01 -#define WPS_WSC_STATE_CONFIG 0x02 - -/* Value of WPS Version Attribute */ -#define WPS_VERSION_1 0x10 - -/* Value of WPS Configuration Method Attribute */ -#define WPS_CONFIG_METHOD_FLASH 0x0001 -#define WPS_CONFIG_METHOD_ETHERNET 0x0002 -#define WPS_CONFIG_METHOD_LABEL 0x0004 -#define WPS_CONFIG_METHOD_DISPLAY 0x0008 -#define WPS_CONFIG_METHOD_E_NFC 0x0010 -#define WPS_CONFIG_METHOD_I_NFC 0x0020 -#define WPS_CONFIG_METHOD_NFC 0x0040 -#define WPS_CONFIG_METHOD_PBC 0x0080 -#define WPS_CONFIG_METHOD_KEYPAD 0x0100 -#define WPS_CONFIG_METHOD_VPBC 0x0280 -#define WPS_CONFIG_METHOD_PPBC 0x0480 -#define WPS_CONFIG_METHOD_VDISPLAY 0x2008 -#define WPS_CONFIG_METHOD_PDISPLAY 0x4008 - -/* Value of Category ID of WPS Primary Device Type Attribute */ -#define WPS_PDT_CID_DISPLAYS 0x0007 -#define WPS_PDT_CID_MULIT_MEDIA 0x0008 -#define WPS_PDT_CID_RTK_WIDI WPS_PDT_CID_MULIT_MEDIA - -/* Value of Sub Category ID of WPS Primary Device Type Attribute */ -#define WPS_PDT_SCID_MEDIA_SERVER 0x0005 -#define WPS_PDT_SCID_RTK_DMP WPS_PDT_SCID_MEDIA_SERVER - -/* Value of Device Password ID */ -#define WPS_DPID_PIN 0x0000 -#define WPS_DPID_USER_SPEC 0x0001 -#define WPS_DPID_MACHINE_SPEC 0x0002 -#define WPS_DPID_REKEY 0x0003 -#define WPS_DPID_PBC 0x0004 -#define WPS_DPID_REGISTRAR_SPEC 0x0005 - -/* Value of WPS RF Bands Attribute */ -#define WPS_RF_BANDS_2_4_GHZ 0x01 -#define WPS_RF_BANDS_5_GHZ 0x02 - -/* Value of WPS Association State Attribute */ -#define WPS_ASSOC_STATE_NOT_ASSOCIATED 0x00 -#define WPS_ASSOC_STATE_CONNECTION_SUCCESS 0x01 -#define WPS_ASSOC_STATE_CONFIGURATION_FAILURE 0x02 -#define WPS_ASSOC_STATE_ASSOCIATION_FAILURE 0x03 -#define WPS_ASSOC_STATE_IP_FAILURE 0x04 - /* =====================P2P Section ===================== */ -/* For P2P */ -#define P2POUI 0x506F9A09 - -/* P2P Attribute ID */ -#define P2P_ATTR_STATUS 0x00 -#define P2P_ATTR_MINOR_REASON_CODE 0x01 -#define P2P_ATTR_CAPABILITY 0x02 -#define P2P_ATTR_DEVICE_ID 0x03 -#define P2P_ATTR_GO_INTENT 0x04 -#define P2P_ATTR_CONF_TIMEOUT 0x05 -#define P2P_ATTR_LISTEN_CH 0x06 -#define P2P_ATTR_GROUP_BSSID 0x07 -#define P2P_ATTR_EX_LISTEN_TIMING 0x08 -#define P2P_ATTR_INTENTED_IF_ADDR 0x09 -#define P2P_ATTR_MANAGEABILITY 0x0A -#define P2P_ATTR_CH_LIST 0x0B -#define P2P_ATTR_NOA 0x0C -#define P2P_ATTR_DEVICE_INFO 0x0D -#define P2P_ATTR_GROUP_INFO 0x0E -#define P2P_ATTR_GROUP_ID 0x0F -#define P2P_ATTR_INTERFACE 0x10 -#define P2P_ATTR_OPERATING_CH 0x11 -#define P2P_ATTR_INVITATION_FLAGS 0x12 - -/* Value of Status Attribute */ -#define P2P_STATUS_SUCCESS 0x00 -#define P2P_STATUS_FAIL_INFO_UNAVAILABLE 0x01 -#define P2P_STATUS_FAIL_INCOMPATIBLE_PARAM 0x02 -#define P2P_STATUS_FAIL_LIMIT_REACHED 0x03 -#define P2P_STATUS_FAIL_INVALID_PARAM 0x04 -#define P2P_STATUS_FAIL_REQUEST_UNABLE 0x05 -#define P2P_STATUS_FAIL_PREVOUS_PROTO_ERR 0x06 -#define P2P_STATUS_FAIL_NO_COMMON_CH 0x07 -#define P2P_STATUS_FAIL_UNKNOWN_P2PGROUP 0x08 -#define P2P_STATUS_FAIL_BOTH_GOINTENT_15 0x09 -#define P2P_STATUS_FAIL_INCOMPATIBLE_PROVSION 0x0A -#define P2P_STATUS_FAIL_USER_REJECT 0x0B - -/* Value of Invitation Flags Attribute */ -#define P2P_INVITATION_FLAGS_PERSISTENT BIT(0) - -#define DMP_P2P_DEVCAP_SUPPORT (P2P_DEVCAP_SERVICE_DISCOVERY | \ - P2P_DEVCAP_CLIENT_DISCOVERABILITY | \ - P2P_DEVCAP_CONCURRENT_OPERATION | \ - P2P_DEVCAP_INVITATION_PROC) - -#define DMP_P2P_GRPCAP_SUPPORT (P2P_GRPCAP_INTRABSS) - -/* Value of Device Capability Bitmap */ -#define P2P_DEVCAP_SERVICE_DISCOVERY BIT(0) -#define P2P_DEVCAP_CLIENT_DISCOVERABILITY BIT(1) -#define P2P_DEVCAP_CONCURRENT_OPERATION BIT(2) -#define P2P_DEVCAP_INFRA_MANAGED BIT(3) -#define P2P_DEVCAP_DEVICE_LIMIT BIT(4) -#define P2P_DEVCAP_INVITATION_PROC BIT(5) - -/* Value of Group Capability Bitmap */ -#define P2P_GRPCAP_GO BIT(0) -#define P2P_GRPCAP_PERSISTENT_GROUP BIT(1) -#define P2P_GRPCAP_GROUP_LIMIT BIT(2) -#define P2P_GRPCAP_INTRABSS BIT(3) -#define P2P_GRPCAP_CROSS_CONN BIT(4) -#define P2P_GRPCAP_PERSISTENT_RECONN BIT(5) -#define P2P_GRPCAP_GROUP_FORMATION BIT(6) - -/* P2P Public Action Frame (Management Frame) */ -#define P2P_PUB_ACTION_ACTION 0x09 - -/* P2P Public Action Frame Type */ -#define P2P_GO_NEGO_REQ 0 -#define P2P_GO_NEGO_RESP 1 -#define P2P_GO_NEGO_CONF 2 -#define P2P_INVIT_REQ 3 -#define P2P_INVIT_RESP 4 -#define P2P_DEVDISC_REQ 5 -#define P2P_DEVDISC_RESP 6 -#define P2P_PROVISION_DISC_REQ 7 -#define P2P_PROVISION_DISC_RESP 8 - -/* P2P Action Frame Type */ -#define P2P_NOTICE_OF_ABSENCE 0 -#define P2P_PRESENCE_REQUEST 1 -#define P2P_PRESENCE_RESPONSE 2 -#define P2P_GO_DISC_REQUEST 3 - - -#define P2P_MAX_PERSISTENT_GROUP_NUM 10 - -#define P2P_PROVISIONING_SCAN_CNT 3 - -#define P2P_WILDCARD_SSID_LEN 7 - -#define P2P_FINDPHASE_EX_NONE 0 /* default value, used when: (1)p2p disabled or (2)p2p enabled but only do 1 scan phase */ -#define P2P_FINDPHASE_EX_FULL 1 /* used when p2p enabled and want to do 1 scan phase and P2P_FINDPHASE_EX_MAX-1 find phase */ -#define P2P_FINDPHASE_EX_SOCIAL_FIRST (P2P_FINDPHASE_EX_FULL+1) -#define P2P_FINDPHASE_EX_MAX 4 -#define P2P_FINDPHASE_EX_SOCIAL_LAST P2P_FINDPHASE_EX_MAX - -#define P2P_PROVISION_TIMEOUT 5000 /* 5 seconds timeout for sending the provision discovery request */ -#define P2P_CONCURRENT_PROVISION_TIMEOUT 3000 /* 3 seconds timeout for sending the provision discovery request under concurrent mode */ -#define P2P_GO_NEGO_TIMEOUT 5000 /* 5 seconds timeout for receiving the group negotiation response */ -#define P2P_CONCURRENT_GO_NEGO_TIMEOUT 3000 /* 3 seconds timeout for sending the negotiation request under concurrent mode */ -#define P2P_TX_PRESCAN_TIMEOUT 100 /* 100ms */ -#define P2P_INVITE_TIMEOUT 5000 /* 5 seconds timeout for sending the invitation request */ -#define P2P_CONCURRENT_INVITE_TIMEOUT 3000 /* 3 seconds timeout for sending the invitation request under concurrent mode */ -#define P2P_RESET_SCAN_CH 25000 /* 25 seconds timeout to reset the scan channel (based on channel plan) */ -#define P2P_MAX_INTENT 15 - -#define P2P_MAX_NOA_NUM 2 - -/* WPS Configuration Method */ -#define WPS_CM_NONE 0x0000 -#define WPS_CM_LABEL 0x0004 -#define WPS_CM_DISPLYA 0x0008 -#define WPS_CM_EXTERNAL_NFC_TOKEN 0x0010 -#define WPS_CM_INTEGRATED_NFC_TOKEN 0x0020 -#define WPS_CM_NFC_INTERFACE 0x0040 -#define WPS_CM_PUSH_BUTTON 0x0080 -#define WPS_CM_KEYPAD 0x0100 -#define WPS_CM_SW_PUHS_BUTTON 0x0280 -#define WPS_CM_HW_PUHS_BUTTON 0x0480 -#define WPS_CM_SW_DISPLAY_PIN 0x2008 -#define WPS_CM_LCD_DISPLAY_PIN 0x4008 - enum p2p_role { P2P_ROLE_DISABLE = 0, P2P_ROLE_DEVICE = 1, @@ -718,28 +441,6 @@ enum p2p_wpsinfo { P2P_GOT_WPSINFO_PBC = 3, }; -#define P2P_PRIVATE_IOCTL_SET_LEN 64 - -/* =====================WFD Section ===================== */ -/* For Wi-Fi Display */ -#define WFD_ATTR_DEVICE_INFO 0x00 -#define WFD_ATTR_ASSOC_BSSID 0x01 -#define WFD_ATTR_COUPLED_SINK_INFO 0x06 -#define WFD_ATTR_LOCAL_IP_ADDR 0x08 -#define WFD_ATTR_SESSION_INFO 0x09 -#define WFD_ATTR_ALTER_MAC 0x0a - -/* For WFD Device Information Attribute */ -#define WFD_DEVINFO_SOURCE 0x0000 -#define WFD_DEVINFO_PSINK 0x0001 -#define WFD_DEVINFO_SSINK 0x0002 -#define WFD_DEVINFO_DUAL 0x0003 - -#define WFD_DEVINFO_SESSION_AVAIL 0x0010 -#define WFD_DEVINFO_WSD 0x0040 -#define WFD_DEVINFO_PC_TDLS 0x0080 -#define WFD_DEVINFO_HDCP_SUPPORT 0x0100 - #define IP_MCAST_MAC(mac) ((mac[0] == 0x01) && (mac[1] == 0x00) && (mac[2] == 0x5e)) #define ICMPV6_MCAST_MAC(mac) ((mac[0] == 0x33) && (mac[1] == 0x33) && (mac[2] != 0xff)) diff --git a/drivers/staging/rtl8723bs/os_dep/ioctl_cfg80211.c b/drivers/staging/rtl8723bs/os_dep/ioctl_cfg80211.c index 3fe27ee75b47..eb3c73cc2662 100644 --- a/drivers/staging/rtl8723bs/os_dep/ioctl_cfg80211.c +++ b/drivers/staging/rtl8723bs/os_dep/ioctl_cfg80211.c @@ -2549,9 +2549,7 @@ static int cfg80211_rtw_mgmt_tx(struct wiphy *wiphy, struct wireless_dev *wdev, bool ack = true; u8 tx_ch = (u8)ieee80211_frequency_to_channel(chan->center_freq); u8 category, action; - int type = (-1); struct adapter *padapter; - struct rtw_wdev_priv *pwdev_priv; if (!ndev) { ret = -EINVAL; @@ -2559,7 +2557,6 @@ static int cfg80211_rtw_mgmt_tx(struct wiphy *wiphy, struct wireless_dev *wdev, } padapter = rtw_netdev_priv(ndev); - pwdev_priv = adapter_wdev_data(padapter); /* cookie generation */ *cookie = (unsigned long)buf; @@ -2581,19 +2578,6 @@ static int cfg80211_rtw_mgmt_tx(struct wiphy *wiphy, struct wireless_dev *wdev, tx_ret = _cfg80211_rtw_mgmt_tx(padapter, tx_ch, buf, len); } while (dump_cnt < dump_limit && tx_ret != _SUCCESS); - switch (type) { - case P2P_GO_NEGO_CONF: - rtw_clear_scan_deny(padapter); - break; - case P2P_INVIT_RESP: - if (pwdev_priv->invit_info.flags & BIT(0) && pwdev_priv->invit_info.status == 0) { - rtw_set_scan_deny(padapter, 5000); - rtw_pwr_wakeup_ex(padapter, 5000); - rtw_clear_scan_deny(padapter); - } - break; - } - cancel_ps_deny: rtw_ps_deny_cancel(padapter, PS_DENY_MGNT_TX); exit: @@ -2602,7 +2586,6 @@ exit: static void rtw_cfg80211_init_ht_capab(struct ieee80211_sta_ht_cap *ht_cap, enum nl80211_band band) { -#define MAX_BIT_RATE_40MHZ_MCS15 300 /* Mbps */ #define MAX_BIT_RATE_40MHZ_MCS7 150 /* Mbps */ ht_cap->ht_supported = true; diff --git a/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c b/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c index b3599ec6293a..deec33f63bcf 100644 --- a/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c +++ b/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c @@ -591,7 +591,7 @@ static int start_streaming(struct vb2_queue *vq, unsigned int count) static void stop_streaming(struct vb2_queue *vq) { int ret; - unsigned long timeout; + unsigned long time_left; struct bcm2835_mmal_dev *dev = vb2_get_drv_priv(vq); struct vchiq_mmal_port *port = dev->capture.port; @@ -636,9 +636,9 @@ static void stop_streaming(struct vb2_queue *vq) v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, "%s: Waiting for buffers to be returned - %d outstanding\n", __func__, atomic_read(&port->buffers_with_vpu)); - timeout = wait_for_completion_timeout(&dev->capture.frame_cmplt, - HZ); - if (timeout == 0) { + time_left = wait_for_completion_timeout(&dev->capture.frame_cmplt, + HZ); + if (time_left == 0) { v4l2_err(&dev->v4l2_dev, "%s: Timeout waiting for buffers to be returned - %d outstanding\n", __func__, atomic_read(&port->buffers_with_vpu)); diff --git a/drivers/staging/vc04_services/interface/TESTING b/drivers/staging/vc04_services/interface/TESTING index a6d63efcbcb9..273952dc9d85 100644 --- a/drivers/staging/vc04_services/interface/TESTING +++ b/drivers/staging/vc04_services/interface/TESTING @@ -31,7 +31,7 @@ Here are the most common kernel configurations: 3. BCM2837 target SoC (ARM 64 bit) - Use the defconfig as a base and then enable all VCHIQ options. + Use the defconfig which has most of the VCHIQ options enabled. * Scenarios @@ -80,3 +80,46 @@ Here are the most common kernel configurations: vchi ping (size 0, 100 async, 100 oneway) -> infus vchi ping (size 0, 200 async, 0 oneway) -> infus ... + + * Debugfs test + + Command: cat /sys/kernel/debug/vchiq/state + + Example output: + State 0: CONNECTED + tx_pos=0x1e8(@43b0acda), rx_pos=0x170(@05493af8) + Version: 8 (min 3) + Stats: ctrl_tx_count=7, ctrl_rx_count=7, error_count=0 + Slots: 30 available (29 data), 0 recyclable, 0 stalls (0 data) + Platform: 2835 (VC master) + Local: slots 34-64 tx_pos=0x1e8 recycle=0x1f + Slots claimed: + DEBUG: SLOT_HANDLER_COUNT = 20(0x14) + DEBUG: SLOT_HANDLER_LINE = 1937(0x791) + DEBUG: PARSE_LINE = 1864(0x748) + DEBUG: PARSE_HEADER = -249155224(0xf1263168) + DEBUG: PARSE_MSGID = 67362817(0x403e001) + DEBUG: AWAIT_COMPLETION_LINE = 0(0x0) + DEBUG: DEQUEUE_MESSAGE_LINE = 0(0x0) + DEBUG: SERVICE_CALLBACK_LINE = 0(0x0) + DEBUG: MSG_QUEUE_FULL_COUNT = 0(0x0) + DEBUG: COMPLETION_QUEUE_FULL_COUNT = 0(0x0) + Remote: slots 2-32 tx_pos=0x170 recycle=0x1f + Slots claimed: + 2: 10/9 + DEBUG: SLOT_HANDLER_COUNT = 20(0x14) + DEBUG: SLOT_HANDLER_LINE = 1851(0x73b) + DEBUG: PARSE_LINE = 1827(0x723) + DEBUG: PARSE_HEADER = -150330912(0xf70a21e0) + DEBUG: PARSE_MSGID = 67113022(0x400103e) + DEBUG: AWAIT_COMPLETION_LINE = 0(0x0) + DEBUG: DEQUEUE_MESSAGE_LINE = 0(0x0) + DEBUG: SERVICE_CALLBACK_LINE = 0(0x0) + DEBUG: MSG_QUEUE_FULL_COUNT = 0(0x0) + DEBUG: COMPLETION_QUEUE_FULL_COUNT = 0(0x0) + Service 0: LISTENING (ref 1) 'PEEK little-endian (0x4b454550)' remote n/a (msg use 0/3840, slot use 0/15) + Bulk: tx_pending=0 (size 0), rx_pending=0 (size 0) + Ctrl: tx_count=0, tx_bytes=0, rx_count=0, rx_bytes=0 + Bulk: tx_count=0, tx_bytes=0, rx_count=0, rx_bytes=0 + 0 quota stalls, 0 slot stalls, 0 bulk stalls, 0 aborted, 0 errors + instance b511f60b diff --git a/drivers/staging/vc04_services/interface/TODO b/drivers/staging/vc04_services/interface/TODO index 05f129c0c254..dfb1ee49633f 100644 --- a/drivers/staging/vc04_services/interface/TODO +++ b/drivers/staging/vc04_services/interface/TODO @@ -16,13 +16,6 @@ some of the ones we want: to manage these buffers as dmabufs so that we can zero-copy import camera images into vc4 for rendering/display. -* Fix kernel module support - -Even the VPU firmware doesn't support a VCHI re-connect, the driver -should properly handle a module unload. This also includes that all -resources must be freed (kthreads, debugfs entries, ...) and global -variables avoided. - * Documentation A short top-down description of this driver's architecture (function of diff --git a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c index 5f518e5a9273..c4d97dbf6ba8 100644 --- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c +++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c @@ -109,11 +109,6 @@ struct vchiq_arm_state { int first_connect; }; -struct vchiq_2835_state { - int inited; - struct vchiq_arm_state arm_state; -}; - struct vchiq_pagelist_info { struct pagelist *pagelist; size_t pagelist_buffer_size; @@ -167,7 +162,7 @@ cleanup_pagelistinfo(struct vchiq_instance *instance, struct vchiq_pagelist_info } static inline bool -is_adjacent_block(u32 *addrs, u32 addr, unsigned int k) +is_adjacent_block(u32 *addrs, dma_addr_t addr, unsigned int k) { u32 tmp; @@ -382,8 +377,8 @@ create_pagelist(struct vchiq_instance *instance, char *buf, char __user *ubuf, /* Combine adjacent blocks for performance */ k = 0; for_each_sg(scatterlist, sg, dma_buffers, i) { - u32 len = sg_dma_len(sg); - u32 addr = sg_dma_address(sg); + unsigned int len = sg_dma_len(sg); + dma_addr_t addr = sg_dma_address(sg); /* Note: addrs is the address + page_count - 1 * The firmware expects blocks after the first to be page- @@ -593,49 +588,32 @@ static int vchiq_platform_init(struct platform_device *pdev, struct vchiq_state return 0; } -static void -vchiq_arm_init_state(struct vchiq_state *state, - struct vchiq_arm_state *arm_state) -{ - if (arm_state) { - rwlock_init(&arm_state->susp_res_lock); - - init_completion(&arm_state->ka_evt); - atomic_set(&arm_state->ka_use_count, 0); - atomic_set(&arm_state->ka_use_ack_count, 0); - atomic_set(&arm_state->ka_release_count, 0); - - arm_state->state = state; - arm_state->first_connect = 0; - } -} - int vchiq_platform_init_state(struct vchiq_state *state) { - struct vchiq_2835_state *platform_state; + struct vchiq_arm_state *platform_state; - state->platform_state = kzalloc(sizeof(*platform_state), GFP_KERNEL); - if (!state->platform_state) + platform_state = kzalloc(sizeof(*platform_state), GFP_KERNEL); + if (!platform_state) return -ENOMEM; - platform_state = (struct vchiq_2835_state *)state->platform_state; + rwlock_init(&platform_state->susp_res_lock); - platform_state->inited = 1; - vchiq_arm_init_state(state, &platform_state->arm_state); + init_completion(&platform_state->ka_evt); + atomic_set(&platform_state->ka_use_count, 0); + atomic_set(&platform_state->ka_use_ack_count, 0); + atomic_set(&platform_state->ka_release_count, 0); + + platform_state->state = state; + + state->platform_state = (struct opaque_platform_state *)platform_state; return 0; } static struct vchiq_arm_state *vchiq_platform_get_arm_state(struct vchiq_state *state) { - struct vchiq_2835_state *platform_state; - - platform_state = (struct vchiq_2835_state *)state->platform_state; - - WARN_ON_ONCE(!platform_state->inited); - - return &platform_state->arm_state; + return (struct vchiq_arm_state *)state->platform_state; } void @@ -758,8 +736,8 @@ void free_bulk_waiter(struct vchiq_instance *instance) int vchiq_shutdown(struct vchiq_instance *instance) { - int status = 0; struct vchiq_state *state = instance->state; + int ret = 0; if (mutex_lock_killable(&state->mutex)) return -EAGAIN; @@ -769,12 +747,12 @@ int vchiq_shutdown(struct vchiq_instance *instance) mutex_unlock(&state->mutex); - dev_dbg(state->dev, "core: (%p): returning %d\n", instance, status); + dev_dbg(state->dev, "core: (%p): returning %d\n", instance, ret); free_bulk_waiter(instance); kfree(instance); - return status; + return ret; } EXPORT_SYMBOL(vchiq_shutdown); @@ -785,26 +763,26 @@ static int vchiq_is_connected(struct vchiq_instance *instance) int vchiq_connect(struct vchiq_instance *instance) { - int status; struct vchiq_state *state = instance->state; + int ret; if (mutex_lock_killable(&state->mutex)) { dev_dbg(state->dev, "core: call to mutex_lock failed\n"); - status = -EAGAIN; + ret = -EAGAIN; goto failed; } - status = vchiq_connect_internal(state, instance); + ret = vchiq_connect_internal(state, instance); - if (!status) + if (!ret) instance->connected = 1; mutex_unlock(&state->mutex); failed: - dev_dbg(state->dev, "core: (%p): returning %d\n", instance, status); + dev_dbg(state->dev, "core: (%p): returning %d\n", instance, ret); - return status; + return ret; } EXPORT_SYMBOL(vchiq_connect); @@ -813,10 +791,9 @@ vchiq_add_service(struct vchiq_instance *instance, const struct vchiq_service_params_kernel *params, unsigned int *phandle) { - int status; struct vchiq_state *state = instance->state; struct vchiq_service *service = NULL; - int srvstate; + int srvstate, ret; *phandle = VCHIQ_SERVICE_HANDLE_INVALID; @@ -828,14 +805,14 @@ vchiq_add_service(struct vchiq_instance *instance, if (service) { *phandle = service->handle; - status = 0; + ret = 0; } else { - status = -EINVAL; + ret = -EINVAL; } - dev_dbg(state->dev, "core: (%p): returning %d\n", instance, status); + dev_dbg(state->dev, "core: (%p): returning %d\n", instance, ret); - return status; + return ret; } int @@ -843,9 +820,9 @@ vchiq_open_service(struct vchiq_instance *instance, const struct vchiq_service_params_kernel *params, unsigned int *phandle) { - int status = -EINVAL; struct vchiq_state *state = instance->state; struct vchiq_service *service = NULL; + int ret = -EINVAL; *phandle = VCHIQ_SERVICE_HANDLE_INVALID; @@ -856,17 +833,17 @@ vchiq_open_service(struct vchiq_instance *instance, if (service) { *phandle = service->handle; - status = vchiq_open_service_internal(service, current->pid); - if (status) { + ret = vchiq_open_service_internal(service, current->pid); + if (ret) { vchiq_remove_service(instance, service->handle); *phandle = VCHIQ_SERVICE_HANDLE_INVALID; } } failed: - dev_dbg(state->dev, "core: (%p): returning %d\n", instance, status); + dev_dbg(state->dev, "core: (%p): returning %d\n", instance, ret); - return status; + return ret; } EXPORT_SYMBOL(vchiq_open_service); @@ -874,20 +851,20 @@ int vchiq_bulk_transmit(struct vchiq_instance *instance, unsigned int handle, const void *data, unsigned int size, void *userdata, enum vchiq_bulk_mode mode) { - int status; + int ret; while (1) { switch (mode) { case VCHIQ_BULK_MODE_NOCALLBACK: case VCHIQ_BULK_MODE_CALLBACK: - status = vchiq_bulk_transfer(instance, handle, - (void *)data, NULL, - size, userdata, mode, - VCHIQ_BULK_TRANSMIT); + ret = vchiq_bulk_transfer(instance, handle, + (void *)data, NULL, + size, userdata, mode, + VCHIQ_BULK_TRANSMIT); break; case VCHIQ_BULK_MODE_BLOCKING: - status = vchiq_blocking_bulk_transfer(instance, handle, (void *)data, size, - VCHIQ_BULK_TRANSMIT); + ret = vchiq_blocking_bulk_transfer(instance, handle, (void *)data, size, + VCHIQ_BULK_TRANSMIT); break; default: return -EINVAL; @@ -898,13 +875,13 @@ vchiq_bulk_transmit(struct vchiq_instance *instance, unsigned int handle, const * to implement a retry mechanism since this function is * supposed to block until queued */ - if (status != -EAGAIN) + if (ret != -EAGAIN) break; msleep(1); } - return status; + return ret; } EXPORT_SYMBOL(vchiq_bulk_transmit); @@ -912,19 +889,19 @@ int vchiq_bulk_receive(struct vchiq_instance *instance, unsigned int handle, void *data, unsigned int size, void *userdata, enum vchiq_bulk_mode mode) { - int status; + int ret; while (1) { switch (mode) { case VCHIQ_BULK_MODE_NOCALLBACK: case VCHIQ_BULK_MODE_CALLBACK: - status = vchiq_bulk_transfer(instance, handle, data, NULL, - size, userdata, - mode, VCHIQ_BULK_RECEIVE); + ret = vchiq_bulk_transfer(instance, handle, data, NULL, + size, userdata, + mode, VCHIQ_BULK_RECEIVE); break; case VCHIQ_BULK_MODE_BLOCKING: - status = vchiq_blocking_bulk_transfer(instance, handle, (void *)data, size, - VCHIQ_BULK_RECEIVE); + ret = vchiq_blocking_bulk_transfer(instance, handle, (void *)data, size, + VCHIQ_BULK_RECEIVE); break; default: return -EINVAL; @@ -935,13 +912,13 @@ int vchiq_bulk_receive(struct vchiq_instance *instance, unsigned int handle, * to implement a retry mechanism since this function is * supposed to block until queued */ - if (status != -EAGAIN) + if (ret != -EAGAIN) break; msleep(1); } - return status; + return ret; } EXPORT_SYMBOL(vchiq_bulk_receive); @@ -950,8 +927,8 @@ vchiq_blocking_bulk_transfer(struct vchiq_instance *instance, unsigned int handl unsigned int size, enum vchiq_bulk_dir dir) { struct vchiq_service *service; - int status; struct bulk_waiter_node *waiter = NULL, *iter; + int ret; service = find_service_by_handle(instance, handle); if (!service) @@ -991,10 +968,10 @@ vchiq_blocking_bulk_transfer(struct vchiq_instance *instance, unsigned int handl return -ENOMEM; } - status = vchiq_bulk_transfer(instance, handle, data, NULL, size, - &waiter->bulk_waiter, - VCHIQ_BULK_MODE_BLOCKING, dir); - if ((status != -EAGAIN) || fatal_signal_pending(current) || !waiter->bulk_waiter.bulk) { + ret = vchiq_bulk_transfer(instance, handle, data, NULL, size, + &waiter->bulk_waiter, + VCHIQ_BULK_MODE_BLOCKING, dir); + if ((ret != -EAGAIN) || fatal_signal_pending(current) || !waiter->bulk_waiter.bulk) { struct vchiq_bulk *bulk = waiter->bulk_waiter.bulk; if (bulk) { @@ -1013,7 +990,7 @@ vchiq_blocking_bulk_transfer(struct vchiq_instance *instance, unsigned int handl waiter, current->pid); } - return status; + return ret; } static int @@ -1078,6 +1055,43 @@ add_completion(struct vchiq_instance *instance, enum vchiq_reason reason, return 0; } +static int +service_single_message(struct vchiq_instance *instance, + enum vchiq_reason reason, + struct vchiq_service *service, void *bulk_userdata) +{ + struct user_service *user_service; + + user_service = (struct user_service *)service->base.userdata; + + dev_dbg(service->state->dev, "arm: msg queue full\n"); + /* + * If there is no MESSAGE_AVAILABLE in the completion + * queue, add one + */ + if ((user_service->message_available_pos - + instance->completion_remove) < 0) { + int ret; + + dev_dbg(instance->state->dev, + "arm: Inserting extra MESSAGE_AVAILABLE\n"); + ret = add_completion(instance, reason, NULL, user_service, + bulk_userdata); + if (ret) + return ret; + } + + if (wait_for_completion_interruptible(&user_service->remove_event)) { + dev_dbg(instance->state->dev, "arm: interrupted\n"); + return -EAGAIN; + } else if (instance->closing) { + dev_dbg(instance->state->dev, "arm: closing\n"); + return -EINVAL; + } + + return 0; +} + int service_callback(struct vchiq_instance *instance, enum vchiq_reason reason, struct vchiq_header *header, unsigned int handle, void *bulk_userdata) @@ -1127,41 +1141,18 @@ service_callback(struct vchiq_instance *instance, enum vchiq_reason reason, spin_lock(&service->state->msg_queue_spinlock); while (user_service->msg_insert == (user_service->msg_remove + MSG_QUEUE_SIZE)) { + int ret; + spin_unlock(&service->state->msg_queue_spinlock); DEBUG_TRACE(SERVICE_CALLBACK_LINE); DEBUG_COUNT(MSG_QUEUE_FULL_COUNT); - dev_dbg(service->state->dev, "arm: msg queue full\n"); - /* - * If there is no MESSAGE_AVAILABLE in the completion - * queue, add one - */ - if ((user_service->message_available_pos - - instance->completion_remove) < 0) { - int status; - - dev_dbg(instance->state->dev, - "arm: Inserting extra MESSAGE_AVAILABLE\n"); - DEBUG_TRACE(SERVICE_CALLBACK_LINE); - status = add_completion(instance, reason, NULL, user_service, - bulk_userdata); - if (status) { - DEBUG_TRACE(SERVICE_CALLBACK_LINE); - vchiq_service_put(service); - return status; - } - } - DEBUG_TRACE(SERVICE_CALLBACK_LINE); - if (wait_for_completion_interruptible(&user_service->remove_event)) { - dev_dbg(instance->state->dev, "arm: interrupted\n"); - DEBUG_TRACE(SERVICE_CALLBACK_LINE); - vchiq_service_put(service); - return -EAGAIN; - } else if (instance->closing) { - dev_dbg(instance->state->dev, "arm: closing\n"); + ret = service_single_message(instance, reason, + service, bulk_userdata); + if (ret) { DEBUG_TRACE(SERVICE_CALLBACK_LINE); vchiq_service_put(service); - return -EINVAL; + return ret; } DEBUG_TRACE(SERVICE_CALLBACK_LINE); spin_lock(&service->state->msg_queue_spinlock); @@ -1294,8 +1285,6 @@ vchiq_keepalive_thread_func(void *v) { struct vchiq_state *state = (struct vchiq_state *)v; struct vchiq_arm_state *arm_state = vchiq_platform_get_arm_state(state); - - int status; struct vchiq_instance *instance; unsigned int ka_handle; int ret; @@ -1313,20 +1302,20 @@ vchiq_keepalive_thread_func(void *v) goto exit; } - status = vchiq_connect(instance); - if (status) { - dev_err(state->dev, "suspend: %s: vchiq_connect failed %d\n", __func__, status); + ret = vchiq_connect(instance); + if (ret) { + dev_err(state->dev, "suspend: %s: vchiq_connect failed %d\n", __func__, ret); goto shutdown; } - status = vchiq_add_service(instance, ¶ms, &ka_handle); - if (status) { + ret = vchiq_add_service(instance, ¶ms, &ka_handle); + if (ret) { dev_err(state->dev, "suspend: %s: vchiq_open_service failed %d\n", - __func__, status); + __func__, ret); goto shutdown; } - while (1) { + while (!kthread_should_stop()) { long rc = 0, uc = 0; if (wait_for_completion_interruptible(&arm_state->ka_evt)) { @@ -1348,17 +1337,17 @@ vchiq_keepalive_thread_func(void *v) */ while (uc--) { atomic_inc(&arm_state->ka_use_ack_count); - status = vchiq_use_service(instance, ka_handle); - if (status) { + ret = vchiq_use_service(instance, ka_handle); + if (ret) { dev_err(state->dev, "suspend: %s: vchiq_use_service error %d\n", - __func__, status); + __func__, ret); } } while (rc--) { - status = vchiq_release_service(instance, ka_handle); - if (status) { + ret = vchiq_release_service(instance, ka_handle); + if (ret) { dev_err(state->dev, "suspend: %s: vchiq_release_service error %d\n", - __func__, status); + __func__, ret); } } } @@ -1408,13 +1397,13 @@ vchiq_use_internal(struct vchiq_state *state, struct vchiq_service *service, write_unlock_bh(&arm_state->susp_res_lock); if (!ret) { - int status = 0; + int ret = 0; long ack_cnt = atomic_xchg(&arm_state->ka_use_ack_count, 0); - while (ack_cnt && !status) { + while (ack_cnt && !ret) { /* Send the use notify to videocore */ - status = vchiq_send_remote_use_active(state); - if (!status) + ret = vchiq_send_remote_use_active(state); + if (!ret) ack_cnt--; else atomic_add(ack_cnt, &arm_state->ka_use_ack_count); @@ -1451,7 +1440,6 @@ vchiq_release_internal(struct vchiq_state *state, struct vchiq_service *service) write_lock_bh(&arm_state->susp_res_lock); if (!arm_state->videocore_use_count || !(*entity_uc)) { - /* Don't use BUG_ON - don't allow user thread to crash kernel */ WARN_ON(!arm_state->videocore_use_count); WARN_ON(!(*entity_uc)); ret = -EINVAL; @@ -1730,7 +1718,7 @@ static int vchiq_probe(struct platform_device *pdev) struct device_node *fw_node; const struct vchiq_platform_info *info; struct vchiq_drv_mgmt *mgmt; - int err; + int ret; info = of_device_get_match_data(&pdev->dev); if (!info) @@ -1755,8 +1743,8 @@ static int vchiq_probe(struct platform_device *pdev) mgmt->info = info; platform_set_drvdata(pdev, mgmt); - err = vchiq_platform_init(pdev, &mgmt->state); - if (err) + ret = vchiq_platform_init(pdev, &mgmt->state); + if (ret) goto failed_platform_init; vchiq_debugfs_init(&mgmt->state); @@ -1768,8 +1756,8 @@ static int vchiq_probe(struct platform_device *pdev) * Simply exit on error since the function handles cleanup in * cases of failure. */ - err = vchiq_register_chrdev(&pdev->dev); - if (err) { + ret = vchiq_register_chrdev(&pdev->dev); + if (ret) { dev_err(&pdev->dev, "arm: Failed to initialize vchiq cdev\n"); goto error_exit; } @@ -1782,18 +1770,26 @@ static int vchiq_probe(struct platform_device *pdev) failed_platform_init: dev_err(&pdev->dev, "arm: Could not initialize vchiq platform\n"); error_exit: - return err; + return ret; } static void vchiq_remove(struct platform_device *pdev) { struct vchiq_drv_mgmt *mgmt = dev_get_drvdata(&pdev->dev); + struct vchiq_arm_state *arm_state; vchiq_device_unregister(bcm2835_audio); vchiq_device_unregister(bcm2835_camera); vchiq_debugfs_deinit(); vchiq_deregister_chrdev(); + kthread_stop(mgmt->state.sync_thread); + kthread_stop(mgmt->state.recycle_thread); + kthread_stop(mgmt->state.slot_handler_thread); + + arm_state = vchiq_platform_get_arm_state(&mgmt->state); + kthread_stop(arm_state->ka_thread); + kfree(mgmt); } diff --git a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.h b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.h index fd1b9d3555ce..b402aac333d9 100644 --- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.h +++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.h @@ -110,9 +110,6 @@ extern int vchiq_check_service(struct vchiq_service *service); extern void -vchiq_dump_platform_use_state(struct vchiq_state *state); - -extern void vchiq_dump_service_use_state(struct vchiq_state *state); extern int diff --git a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.c b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.c index df3af821f218..50af04b217f4 100644 --- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.c +++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.c @@ -501,16 +501,21 @@ remote_event_create(wait_queue_head_t *wq, struct remote_event *event) * routines where switched to the "interruptible" family of functions, as the * former was deemed unjustified and the use "killable" set all VCHIQ's * threads in D state. + * + * Returns: 0 on success, a negative error code on failure */ static inline int remote_event_wait(wait_queue_head_t *wq, struct remote_event *event) { + int ret = 0; + if (!event->fired) { event->armed = 1; dsb(sy); - if (wait_event_interruptible(*wq, event->fired)) { + ret = wait_event_interruptible(*wq, event->fired); + if (ret) { event->armed = 0; - return 0; + return ret; } event->armed = 0; /* Ensure that the peer sees that we are not waiting (armed == 0). */ @@ -518,7 +523,7 @@ remote_event_wait(wait_queue_head_t *wq, struct remote_event *event) } event->fired = 0; - return 1; + return ret; } /* @@ -1140,6 +1145,7 @@ queue_message_sync(struct vchiq_state *state, struct vchiq_service *service, struct vchiq_header *header; ssize_t callback_result; int svc_fourcc; + int ret; local = state->local; @@ -1147,7 +1153,9 @@ queue_message_sync(struct vchiq_state *state, struct vchiq_service *service, mutex_lock_killable(&state->sync_mutex)) return -EAGAIN; - remote_event_wait(&state->sync_release_event, &local->sync_release); + ret = remote_event_wait(&state->sync_release_event, &local->sync_release); + if (ret) + return ret; /* Ensure that reads don't overtake the remote_event_wait. */ rmb(); @@ -1929,13 +1937,16 @@ slot_handler_func(void *v) { struct vchiq_state *state = v; struct vchiq_shared_state *local = state->local; + int ret; DEBUG_INITIALISE(local); - while (1) { + while (!kthread_should_stop()) { DEBUG_COUNT(SLOT_HANDLER_COUNT); DEBUG_TRACE(SLOT_HANDLER_LINE); - remote_event_wait(&state->trigger_event, &local->trigger); + ret = remote_event_wait(&state->trigger_event, &local->trigger); + if (ret) + return ret; /* Ensure that reads don't overtake the remote_event_wait. */ rmb(); @@ -1966,6 +1977,7 @@ recycle_func(void *v) struct vchiq_shared_state *local = state->local; u32 *found; size_t length; + int ret; length = sizeof(*found) * BITSET_SIZE(VCHIQ_MAX_SERVICES); @@ -1974,8 +1986,10 @@ recycle_func(void *v) if (!found) return -ENOMEM; - while (1) { - remote_event_wait(&state->recycle_event, &local->recycle); + while (!kthread_should_stop()) { + ret = remote_event_wait(&state->recycle_event, &local->recycle); + if (ret) + return ret; process_free_queue(state, found, length); } @@ -1992,14 +2006,17 @@ sync_func(void *v) (struct vchiq_header *)SLOT_DATA_FROM_INDEX(state, state->remote->slot_sync); int svc_fourcc; + int ret; - while (1) { + while (!kthread_should_stop()) { struct vchiq_service *service; int msgid, size; int type; unsigned int localport, remoteport; - remote_event_wait(&state->sync_trigger_event, &local->sync_trigger); + ret = remote_event_wait(&state->sync_trigger_event, &local->sync_trigger); + if (ret) + return ret; /* Ensure that reads don't overtake the remote_event_wait. */ rmb(); @@ -2163,14 +2180,12 @@ vchiq_init_state(struct vchiq_state *state, struct vchiq_slot_zero *slot_zero, s mutex_init(&state->slot_mutex); mutex_init(&state->recycle_mutex); mutex_init(&state->sync_mutex); - mutex_init(&state->bulk_transfer_mutex); spin_lock_init(&state->msg_queue_spinlock); spin_lock_init(&state->bulk_waiter_spinlock); spin_lock_init(&state->quota_spinlock); init_completion(&state->slot_available_event); - init_completion(&state->slot_remove_event); init_completion(&state->data_quota_event); state->slot_queue_available = 0; @@ -3372,7 +3387,7 @@ vchiq_dump_shared_state(struct seq_file *f, struct vchiq_state *state, }; int i; - seq_printf(f, " %s: slots %d-%d tx_pos=%x recycle=%x\n", + seq_printf(f, " %s: slots %d-%d tx_pos=0x%x recycle=0x%x\n", label, shared->slot_first, shared->slot_last, shared->tx_pos, shared->slot_queue_recycle); @@ -3388,7 +3403,7 @@ vchiq_dump_shared_state(struct seq_file *f, struct vchiq_state *state, } for (i = 1; i < shared->debug[DEBUG_ENTRIES]; i++) { - seq_printf(f, " DEBUG: %s = %d(%x)\n", + seq_printf(f, " DEBUG: %s = %d(0x%x)\n", debug_names[i], shared->debug[i], shared->debug[i]); } } @@ -3416,7 +3431,7 @@ vchiq_dump_service_state(struct seq_file *f, struct vchiq_service *service) if (service->public_fourcc != VCHIQ_FOURCC_INVALID) scnprintf(remoteport + len2, sizeof(remoteport) - len2, - " (client %x)", service->client_id); + " (client 0x%x)", service->client_id); } else { strscpy(remoteport, "n/a", sizeof(remoteport)); } @@ -3477,7 +3492,7 @@ void vchiq_dump_state(struct seq_file *f, struct vchiq_state *state) seq_printf(f, "State %d: %s\n", state->id, conn_state_names[state->conn_state]); - seq_printf(f, " tx_pos=%x(@%pK), rx_pos=%x(@%pK)\n", + seq_printf(f, " tx_pos=0x%x(@%pK), rx_pos=0x%x(@%pK)\n", state->local->tx_pos, state->tx_data + (state->local_tx_pos & VCHIQ_SLOT_MASK), state->rx_pos, diff --git a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.h b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.h index 382ec08f6a14..77cc4d7ac077 100644 --- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.h +++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.h @@ -347,8 +347,6 @@ struct vchiq_state { struct mutex sync_mutex; - struct mutex bulk_transfer_mutex; - spinlock_t msg_queue_spinlock; spinlock_t bulk_waiter_spinlock; @@ -393,8 +391,6 @@ struct vchiq_state { /* Signalled when a free slot becomes available. */ struct completion slot_available_event; - struct completion slot_remove_event; - /* Signalled when a free data slot becomes available. */ struct completion data_quota_event; @@ -548,8 +544,6 @@ int vchiq_platform_init_state(struct vchiq_state *state); int vchiq_check_service(struct vchiq_service *service); -void vchiq_on_remote_use_active(struct vchiq_state *state); - int vchiq_send_remote_use(struct vchiq_state *state); int vchiq_send_remote_use_active(struct vchiq_state *state); diff --git a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_dev.c b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_dev.c index 430f2ed2ccd3..9cd2a64dce5e 100644 --- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_dev.c +++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_dev.c @@ -1324,7 +1324,7 @@ static struct miscdevice vchiq_miscdev = { * vchiq_register_chrdev - Register the char driver for vchiq * and create the necessary class and * device files in userspace. - * @parent The parent of the char device. + * @parent: The parent of the char device. * * Returns 0 on success else returns the error code. */ diff --git a/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c b/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c index fca920d41e4f..67489c334f7b 100644 --- a/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c +++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c @@ -655,7 +655,7 @@ static int send_synchronous_mmal_msg(struct vchiq_mmal_instance *instance, { struct mmal_msg_context *msg_context; int ret; - unsigned long timeout; + unsigned long time_left; /* payload size must not cause message to exceed max size */ if (payload_len > @@ -693,9 +693,9 @@ static int send_synchronous_mmal_msg(struct vchiq_mmal_instance *instance, return ret; } - timeout = wait_for_completion_timeout(&msg_context->u.sync.cmplt, - SYNC_MSG_TIMEOUT * HZ); - if (timeout == 0) { + time_left = wait_for_completion_timeout(&msg_context->u.sync.cmplt, + SYNC_MSG_TIMEOUT * HZ); + if (time_left == 0) { pr_err("timed out waiting for sync completion\n"); ret = -ETIME; /* todo: what happens if the message arrives after aborting */ diff --git a/drivers/staging/vme_user/vme_user.c b/drivers/staging/vme_user/vme_user.c index 36183f923768..5829a4141561 100644 --- a/drivers/staging/vme_user/vme_user.c +++ b/drivers/staging/vme_user/vme_user.c @@ -106,6 +106,7 @@ static struct vme_dev *vme_user_bridge; /* Pointer to user device */ static const struct class vme_user_sysfs_class = { .name = DRIVER_NAME, }; + static const int type[VME_DEVS] = { MASTER_MINOR, MASTER_MINOR, MASTER_MINOR, MASTER_MINOR, SLAVE_MINOR, SLAVE_MINOR, diff --git a/drivers/staging/vt6656/TODO b/drivers/staging/vt6656/TODO index e154b2f3b247..876cdccb6948 100644 --- a/drivers/staging/vt6656/TODO +++ b/drivers/staging/vt6656/TODO @@ -11,7 +11,6 @@ TODO: - switch to use LIB80211 - switch to use MAC80211 - use kernel coding style -- checkpatch.pl fixes - sparse fixes - integrate with drivers/net/wireless |