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| author | Rahul Sharma <rahul.sharma@samsung.com> | 2014-06-19 11:17:16 +0530 |
|---|---|---|
| committer | Tomasz Figa <t.figa@samsung.com> | 2014-06-30 14:46:36 +0200 |
| commit | 0b1643b39ddae68f1b1b5ed848c8268a004a60a9 (patch) | |
| tree | c3baee230a6f966cdaeca46dd8cf25327e34a2ad | |
| parent | a92dda4bfad338b48c6190b1da70fe7f0eefc55d (diff) | |
| download | linux-0b1643b39ddae68f1b1b5ed848c8268a004a60a9.tar.gz linux-0b1643b39ddae68f1b1b5ed848c8268a004a60a9.tar.bz2 linux-0b1643b39ddae68f1b1b5ed848c8268a004a60a9.zip | |
clk/exynos5250: fix bit number for tv sysmmu clock
Change bit from 2 to 9 for tv (mixer) sysmmu clock.
Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Reviewed-by: Sachin Kamat <sachin.kamat@samsung.com>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
| -rw-r--r-- | drivers/clk/samsung/clk-exynos5250.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/samsung/clk-exynos5250.c b/drivers/clk/samsung/clk-exynos5250.c index 1fad4c5e3f5d..184f64293b26 100644 --- a/drivers/clk/samsung/clk-exynos5250.c +++ b/drivers/clk/samsung/clk-exynos5250.c @@ -661,7 +661,7 @@ static struct samsung_gate_clock exynos5250_gate_clks[] __initdata = { GATE(CLK_RTC, "rtc", "div_aclk66", GATE_IP_PERIS, 20, 0, 0), GATE(CLK_TMU, "tmu", "div_aclk66", GATE_IP_PERIS, 21, 0, 0), GATE(CLK_SMMU_TV, "smmu_tv", "mout_aclk200_disp1_sub", - GATE_IP_DISP1, 2, 0, 0), + GATE_IP_DISP1, 9, 0, 0), GATE(CLK_SMMU_FIMD1, "smmu_fimd1", "mout_aclk200_disp1_sub", GATE_IP_DISP1, 8, 0, 0), GATE(CLK_SMMU_2D, "smmu_2d", "div_aclk200", GATE_IP_ACP, 7, 0, 0), |