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| author | Scott Wood <scottwood@freescale.com> | 2007-09-14 15:32:14 -0500 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2007-10-04 11:02:21 -0500 |
| commit | 11af1192b75307e4099dd962b3b97b255d5ab023 (patch) | |
| tree | f1474924f1832a0f5f9079ab058ddf80d441547b | |
| parent | 7f21f52940212c25b4387c2450018e161043549a (diff) | |
| download | linux-11af1192b75307e4099dd962b3b97b255d5ab023.tar.gz linux-11af1192b75307e4099dd962b3b97b255d5ab023.tar.bz2 linux-11af1192b75307e4099dd962b3b97b255d5ab023.zip | |
[POWERPC] mpc82xx: Define CPU_FTR_NEED_COHERENT
The 8272 (and presumably other PCI PQ2 chips) appear to have the
same issue as the 83xx regarding PCI streaming DMA.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| -rw-r--r-- | include/asm-powerpc/cputable.h | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h index f62cffd56c0c..c9b8f64bbb45 100644 --- a/include/asm-powerpc/cputable.h +++ b/include/asm-powerpc/cputable.h @@ -196,12 +196,12 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start, #define PPC_FEATURE_HAS_EFP_DOUBLE_COMP 0 #endif -/* We need to mark all pages as being coherent if we're SMP or we - * have a 74[45]x and an MPC107 host bridge. Also 83xx requires - * it for PCI "streaming/prefetch" to work properly. +/* We need to mark all pages as being coherent if we're SMP or we have a + * 74[45]x and an MPC107 host bridge. Also 83xx and PowerQUICC II + * require it for PCI "streaming/prefetch" to work properly. */ #if defined(CONFIG_SMP) || defined(CONFIG_MPC10X_BRIDGE) \ - || defined(CONFIG_PPC_83xx) + || defined(CONFIG_PPC_83xx) || defined(CONFIG_8260) #define CPU_FTR_COMMON CPU_FTR_NEED_COHERENT #else #define CPU_FTR_COMMON 0 @@ -313,7 +313,7 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start, CPU_FTR_PPC_LE) #define CPU_FTRS_82XX (CPU_FTR_COMMON | \ CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB) -#define CPU_FTRS_G2_LE (CPU_FTR_MAYBE_CAN_DOZE | \ +#define CPU_FTRS_G2_LE (CPU_FTR_COMMON | CPU_FTR_MAYBE_CAN_DOZE | \ CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_HAS_HIGH_BATS) #define CPU_FTRS_E300 (CPU_FTR_MAYBE_CAN_DOZE | \ CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_HAS_HIGH_BATS | \ |