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| author | Christian Hewitt <christianshewitt@gmail.com> | 2019-03-15 14:56:55 +0100 |
|---|---|---|
| committer | Kevin Hilman <khilman@baylibre.com> | 2019-04-01 21:42:01 -0700 |
| commit | 11f8e119ed22c750ac5ac0b195b5ecd17868e0e9 (patch) | |
| tree | 770ae11e6ce8a10f0a172e449a14aa6895172325 | |
| parent | d5ff1adb3809e2f74a3b57cea2e57c8e37d693c4 (diff) | |
| download | linux-11f8e119ed22c750ac5ac0b195b5ecd17868e0e9.tar.gz linux-11f8e119ed22c750ac5ac0b195b5ecd17868e0e9.tar.bz2 linux-11f8e119ed22c750ac5ac0b195b5ecd17868e0e9.zip | |
arm64: dts: meson-gxm: Add Mali-T820 node
The Amlogic Meson GXM SoC embeds an ARM Mali T820 GPU.
This patch adds the node with all the needed properties to power
on the GPU.
This has been tested with the work-in-progress PanFrost project
aiming support for ARM Mali Midgard and later GPUs.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
| -rw-r--r-- | arch/arm64/boot/dts/amlogic/meson-gxm.dtsi | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi index ed3a3d5adf31..7a85a82bf65d 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi @@ -91,6 +91,33 @@ reset-names = "phy"; status = "okay"; }; + + mali: gpu@c0000 { + compatible = "amlogic,meson-gxm-mali", "arm,mali-t820"; + reg = <0x0 0xc0000 0x0 0x40000>; + interrupt-parent = <&gic>; + interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "gpu", "mmu", "job"; + clocks = <&clkc CLKID_MALI>; + resets = <&reset RESET_MALI_CAPB3>, <&reset RESET_MALI>; + + /* + * Mali clocking is provided by two identical clock paths + * MALI_0 and MALI_1 muxed to a single clock by a glitch + * free mux to safely change frequency while running. + */ + assigned-clocks = <&clkc CLKID_MALI_0_SEL>, + <&clkc CLKID_MALI_0>, + <&clkc CLKID_MALI>; /* Glitch free mux */ + assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>, + <0>, /* Do Nothing */ + <&clkc CLKID_MALI_0>; + assigned-clock-rates = <0>, /* Do Nothing */ + <666666666>, + <0>; /* Do Nothing */ + }; }; &clkc_AO { |