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| author | Marek Vasut <marex@denx.de> | 2021-01-24 18:02:57 +0100 |
|---|---|---|
| committer | Alexandre Torgue <alexandre.torgue@foss.st.com> | 2021-01-25 15:17:20 +0100 |
| commit | 1769b7f92a85b9841d59dc358eb968cba705d9a8 (patch) | |
| tree | 6f7a62de7c1093f9dc03e7cd61fd83b0a1eebded | |
| parent | 8ba396551d5d3e862c195e7373e51c4056429c91 (diff) | |
| download | linux-1769b7f92a85b9841d59dc358eb968cba705d9a8.tar.gz linux-1769b7f92a85b9841d59dc358eb968cba705d9a8.tar.bz2 linux-1769b7f92a85b9841d59dc358eb968cba705d9a8.zip | |
ARM: dts: stm32: Add additional init state for SDMMC1 pins
Add "init" mux option for SDMMC1, where the CMD, CK, CKIN lines are not
configured, so they can be claimed as GPIOs early on in driver probe().
This is used for probing optional voltage level translator.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Ludovic Barre <ludovic.barre@st.com>
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Cc: linux-stm32@st-md-mailman.stormreply.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
| -rw-r--r-- | arch/arm/boot/dts/stm32mp15-pinctrl.dtsi | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi index 20a59e8f7a33..53326ed652f8 100644 --- a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi +++ b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi @@ -1273,6 +1273,18 @@ }; }; + sdmmc1_b4_init_pins_a: sdmmc1-b4-init-0 { + pins1 { + pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */ + <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */ + <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */ + <STM32_PINMUX('C', 11, AF12)>; /* SDMMC1_D3 */ + slew-rate = <1>; + drive-push-pull; + bias-disable; + }; + }; + sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 { pins { pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */ @@ -1299,6 +1311,17 @@ }; }; + sdmmc1_dir_init_pins_a: sdmmc1-dir-init-0 { + pins1 { + pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */ + <STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */ + <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */ + slew-rate = <1>; + drive-push-pull; + bias-pull-up; + }; + }; + sdmmc1_dir_sleep_pins_a: sdmmc1-dir-sleep-0 { pins { pinmux = <STM32_PINMUX('F', 2, ANALOG)>, /* SDMMC1_D0DIR */ |