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author | Thierry Reding <treding@nvidia.com> | 2015-11-24 16:51:59 +0100 |
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committer | Thierry Reding <treding@nvidia.com> | 2015-11-24 16:51:59 +0100 |
commit | 1d1bac6bbcb771fc685b05d7d32cae6225bb5379 (patch) | |
tree | 66b7563976e710878e8ca674d084d58ce0509f9d | |
parent | 00ccc34b3e1432bdb4e1892b1eb56898d82db353 (diff) | |
parent | 9544595262f32f0e6dd6e0170e31ca8582c9cbb0 (diff) | |
download | linux-1d1bac6bbcb771fc685b05d7d32cae6225bb5379.tar.gz linux-1d1bac6bbcb771fc685b05d7d32cae6225bb5379.tar.bz2 linux-1d1bac6bbcb771fc685b05d7d32cae6225bb5379.zip |
Merge branch 'for-4.5/soc' into for-4.5/dt
-rw-r--r-- | arch/arm/mach-tegra/Kconfig | 52 | ||||
-rw-r--r-- | arch/arm64/Kconfig.platforms | 12 | ||||
-rw-r--r-- | drivers/soc/Kconfig | 1 | ||||
-rw-r--r-- | drivers/soc/tegra/Kconfig | 87 |
4 files changed, 89 insertions, 63 deletions
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index 0fa4c5f8b1be..5db40b25bdc4 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -1,4 +1,4 @@ -menuconfig ARCH_TEGRA +config ARCH_TEGRA bool "NVIDIA Tegra" if ARCH_MULTI_V7 select ARCH_REQUIRE_GPIOLIB select ARCH_SUPPORTS_TRUSTED_FOUNDATIONS @@ -16,53 +16,3 @@ menuconfig ARCH_TEGRA select USB_ULPI_VIEWPORT if USB_PHY help This enables support for NVIDIA Tegra based systems. - -if ARCH_TEGRA - -config ARCH_TEGRA_2x_SOC - bool "Enable support for Tegra20 family" - select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP - select ARM_ERRATA_720789 - select ARM_ERRATA_754327 if SMP - select ARM_ERRATA_764369 if SMP - select PINCTRL_TEGRA20 - select PL310_ERRATA_727915 if CACHE_L2X0 - select PL310_ERRATA_769419 if CACHE_L2X0 - select TEGRA_TIMER - help - Support for NVIDIA Tegra AP20 and T20 processors, based on the - ARM CortexA9MP CPU and the ARM PL310 L2 cache controller - -config ARCH_TEGRA_3x_SOC - bool "Enable support for Tegra30 family" - select ARM_ERRATA_754322 - select ARM_ERRATA_764369 if SMP - select PINCTRL_TEGRA30 - select PL310_ERRATA_769419 if CACHE_L2X0 - select TEGRA_TIMER - help - Support for NVIDIA Tegra T30 processor family, based on the - ARM CortexA9MP CPU and the ARM PL310 L2 cache controller - -config ARCH_TEGRA_114_SOC - bool "Enable support for Tegra114 family" - select ARM_ERRATA_798181 if SMP - select ARM_L1_CACHE_SHIFT_6 - select HAVE_ARM_ARCH_TIMER - select PINCTRL_TEGRA114 - select TEGRA_TIMER - help - Support for NVIDIA Tegra T114 processor family, based on the - ARM CortexA15MP CPU - -config ARCH_TEGRA_124_SOC - bool "Enable support for Tegra124 family" - select ARM_L1_CACHE_SHIFT_6 - select HAVE_ARM_ARCH_TIMER - select PINCTRL_TEGRA124 - select TEGRA_TIMER - help - Support for NVIDIA Tegra T124 processor family, based on the - ARM CortexA15MP CPU - -endif diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms index 4043c35962cc..2c0411670f82 100644 --- a/arch/arm64/Kconfig.platforms +++ b/arch/arm64/Kconfig.platforms @@ -86,18 +86,6 @@ config ARCH_TEGRA help This enables support for the NVIDIA Tegra SoC family. -config ARCH_TEGRA_132_SOC - bool "NVIDIA Tegra132 SoC" - depends on ARCH_TEGRA - select PINCTRL_TEGRA124 - select USB_ULPI if USB_PHY - select USB_ULPI_VIEWPORT if USB_PHY - help - Enable support for NVIDIA Tegra132 SoC, based on the Denver - ARMv8 CPU. The Tegra132 SoC is similar to the Tegra124 SoC, - but contains an NVIDIA Denver CPU complex in place of - Tegra124's "4+1" Cortex-A15 CPU complex. - config ARCH_SPRD bool "Spreadtrum SoC platform" help diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig index 4e853ed2c82b..a8d72baf16ea 100644 --- a/drivers/soc/Kconfig +++ b/drivers/soc/Kconfig @@ -5,6 +5,7 @@ source "drivers/soc/mediatek/Kconfig" source "drivers/soc/qcom/Kconfig" source "drivers/soc/rockchip/Kconfig" source "drivers/soc/sunxi/Kconfig" +source "drivers/soc/tegra/Kconfig" source "drivers/soc/ti/Kconfig" source "drivers/soc/versatile/Kconfig" diff --git a/drivers/soc/tegra/Kconfig b/drivers/soc/tegra/Kconfig new file mode 100644 index 000000000000..7e35dfe52af5 --- /dev/null +++ b/drivers/soc/tegra/Kconfig @@ -0,0 +1,87 @@ +if ARCH_TEGRA + +# 32-bit ARM SoCs +if ARM + +config ARCH_TEGRA_2x_SOC + bool "Enable support for Tegra20 family" + select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP + select ARM_ERRATA_720789 + select ARM_ERRATA_754327 if SMP + select ARM_ERRATA_764369 if SMP + select PINCTRL_TEGRA20 + select PL310_ERRATA_727915 if CACHE_L2X0 + select PL310_ERRATA_769419 if CACHE_L2X0 + select TEGRA_TIMER + help + Support for NVIDIA Tegra AP20 and T20 processors, based on the + ARM CortexA9MP CPU and the ARM PL310 L2 cache controller + +config ARCH_TEGRA_3x_SOC + bool "Enable support for Tegra30 family" + select ARM_ERRATA_754322 + select ARM_ERRATA_764369 if SMP + select PINCTRL_TEGRA30 + select PL310_ERRATA_769419 if CACHE_L2X0 + select TEGRA_TIMER + help + Support for NVIDIA Tegra T30 processor family, based on the + ARM CortexA9MP CPU and the ARM PL310 L2 cache controller + +config ARCH_TEGRA_114_SOC + bool "Enable support for Tegra114 family" + select ARM_ERRATA_798181 if SMP + select ARM_L1_CACHE_SHIFT_6 + select HAVE_ARM_ARCH_TIMER + select PINCTRL_TEGRA114 + select TEGRA_TIMER + help + Support for NVIDIA Tegra T114 processor family, based on the + ARM CortexA15MP CPU + +config ARCH_TEGRA_124_SOC + bool "Enable support for Tegra124 family" + select ARM_L1_CACHE_SHIFT_6 + select HAVE_ARM_ARCH_TIMER + select PINCTRL_TEGRA124 + select TEGRA_TIMER + help + Support for NVIDIA Tegra T124 processor family, based on the + ARM CortexA15MP CPU + +endif + +# 64-bit ARM SoCs +if ARM64 + +config ARCH_TEGRA_132_SOC + bool "NVIDIA Tegra132 SoC" + select PINCTRL_TEGRA124 + select USB_ULPI if USB_PHY + select USB_ULPI_VIEWPORT if USB_PHY + help + Enable support for NVIDIA Tegra132 SoC, based on the Denver + ARMv8 CPU. The Tegra132 SoC is similar to the Tegra124 SoC, + but contains an NVIDIA Denver CPU complex in place of + Tegra124's "4+1" Cortex-A15 CPU complex. + +config ARCH_TEGRA_210_SOC + bool "NVIDIA Tegra210 SoC" + select PINCTRL_TEGRA210 + select USB_ULPI if USB_PHY + select USB_ULPI_VIEWPORT if USB_PHY + help + Enable support for the NVIDIA Tegra210 SoC. Also known as Tegra X1, + the Tegra210 has four Cortex-A57 cores paired with four Cortex-A53 + cores in a switched configuration. It features a GPU of the Maxwell + architecture with support for DX11, SM4, OpenGL 4.5, OpenGL ES 3.1 + and providing 256 CUDA cores. It supports hardware-accelerated en- + and decoding of various video standards including H.265, H.264 and + VP8 at 4K resolution and up to 60 fps. + + Besides the multimedia features it also comes with a variety of I/O + controllers, such as GPIO, I2C, SPI, SDHCI, PCIe, SATA and XHCI, to + name only a few. + +endif +endif |