diff options
| author | Mohammed Shafi Shajakhan <mohammed@qca.qualcomm.com> | 2012-03-09 12:01:55 +0530 |
|---|---|---|
| committer | John W. Linville <linville@tuxdriver.com> | 2012-03-12 14:19:37 -0400 |
| commit | 3789d59c24cb142e4590492c3b5137a7c3dec352 (patch) | |
| tree | d69b655b529ed11654deaa0c8f9873d42ac230cb | |
| parent | 138f07edb6b5a905cedf5c4fe96d6b2a45d8fb30 (diff) | |
| download | linux-3789d59c24cb142e4590492c3b5137a7c3dec352.tar.gz linux-3789d59c24cb142e4590492c3b5137a7c3dec352.tar.bz2 linux-3789d59c24cb142e4590492c3b5137a7c3dec352.zip | |
ath9k_hw: Fix enabling of MCI and RTT
tested in AR9462 Rev:2, both hardware capability flag are set
Signed-off-by: Mohammed Shafi Shajakhan <mohammed@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
| -rw-r--r-- | drivers/net/wireless/ath/ath9k/hw.c | 13 | ||||
| -rw-r--r-- | drivers/net/wireless/ath/ath9k/reg.h | 1 |
2 files changed, 12 insertions, 2 deletions
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c index d582cf73098f..02cc1ce3dd6a 100644 --- a/drivers/net/wireless/ath/ath9k/hw.c +++ b/drivers/net/wireless/ath/ath9k/hw.c @@ -2390,8 +2390,17 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah) if (AR_SREV_9485_OR_LATER(ah)) ah->enabled_cals |= TX_IQ_ON_AGC_CAL; } - if (AR_SREV_9462(ah)) - pCap->hw_caps |= ATH9K_HW_CAP_RTT | ATH9K_HW_CAP_MCI; + + if (AR_SREV_9462(ah)) { + + if (!(ah->ent_mode & AR_ENT_OTP_49GHZ_DISABLE)) + pCap->hw_caps |= ATH9K_HW_CAP_MCI; + + if (AR_SREV_9462_20(ah)) + pCap->hw_caps |= ATH9K_HW_CAP_RTT; + + } + return 0; } diff --git a/drivers/net/wireless/ath/ath9k/reg.h b/drivers/net/wireless/ath/ath9k/reg.h index 80b1856f817d..458f81b4a7cb 100644 --- a/drivers/net/wireless/ath/ath9k/reg.h +++ b/drivers/net/wireless/ath/ath9k/reg.h @@ -1151,6 +1151,7 @@ enum { #define AR_INTR_PRIO_ASYNC_ENABLE (AR_SREV_9340(ah) ? 0x4094 : 0x40d4) #define AR_ENT_OTP 0x40d8 #define AR_ENT_OTP_CHAIN2_DISABLE 0x00020000 +#define AR_ENT_OTP_49GHZ_DISABLE 0x00100000 #define AR_ENT_OTP_MIN_PKT_SIZE_DISABLE 0x00800000 #define AR_CH0_BB_DPLL1 0x16180 |