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| author | Florian Fainelli <f.fainelli@gmail.com> | 2021-10-20 11:48:54 -0700 |
|---|---|---|
| committer | Marc Zyngier <maz@kernel.org> | 2021-10-20 20:06:33 +0100 |
| commit | 51d9db5c8fbbed160081d4cb5c193abdf67ded05 (patch) | |
| tree | f4ba37494051311bcb92974890623ff25e71be7c | |
| parent | fcd0f63dec4abc281988ac08b83ca3ae6946c13b (diff) | |
| download | linux-51d9db5c8fbbed160081d4cb5c193abdf67ded05.tar.gz linux-51d9db5c8fbbed160081d4cb5c193abdf67ded05.tar.bz2 linux-51d9db5c8fbbed160081d4cb5c193abdf67ded05.zip | |
irqchip/irq-brcmstb-l2: Switch to IRQCHIP_PLATFORM_DRIVER
Allow the user selection and building of this interrupt controller
driver as a module since it is used on ARM/ARM64 based systems as a
second level interrupt controller hanging off the ARM GIC and is
therefore loadable during boot.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20211020184859.2705451-9-f.fainelli@gmail.com
| -rw-r--r-- | drivers/irqchip/Kconfig | 4 | ||||
| -rw-r--r-- | drivers/irqchip/irq-brcmstb-l2.c | 16 |
2 files changed, 12 insertions, 8 deletions
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig index f3b53779e25d..30018cc64539 100644 --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig @@ -128,7 +128,9 @@ config BCM7120_L2_IRQ select IRQ_DOMAIN config BRCMSTB_L2_IRQ - bool + tristate "Broadcom STB generic L2 interrupt controller driver" + depends on ARCH_BCM2835 || ARCH_BRCMSTB || BMIPS_GENERIC + default ARCH_BCM2835 || ARCH_BRCMSTB || BMIPS_GENERIC select GENERIC_IRQ_CHIP select IRQ_DOMAIN diff --git a/drivers/irqchip/irq-brcmstb-l2.c b/drivers/irqchip/irq-brcmstb-l2.c index 8e0911561f2d..e4efc08ac594 100644 --- a/drivers/irqchip/irq-brcmstb-l2.c +++ b/drivers/irqchip/irq-brcmstb-l2.c @@ -275,16 +275,18 @@ static int __init brcmstb_l2_edge_intc_of_init(struct device_node *np, { return brcmstb_l2_intc_of_init(np, parent, &l2_edge_intc_init); } -IRQCHIP_DECLARE(brcmstb_l2_intc, "brcm,l2-intc", brcmstb_l2_edge_intc_of_init); -IRQCHIP_DECLARE(brcmstb_hif_spi_l2_intc, "brcm,hif-spi-l2-intc", - brcmstb_l2_edge_intc_of_init); -IRQCHIP_DECLARE(brcmstb_upg_aux_aon_l2_intc, "brcm,upg-aux-aon-l2-intc", - brcmstb_l2_edge_intc_of_init); static int __init brcmstb_l2_lvl_intc_of_init(struct device_node *np, struct device_node *parent) { return brcmstb_l2_intc_of_init(np, parent, &l2_lvl_intc_init); } -IRQCHIP_DECLARE(bcm7271_l2_intc, "brcm,bcm7271-l2-intc", - brcmstb_l2_lvl_intc_of_init); + +IRQCHIP_PLATFORM_DRIVER_BEGIN(brcmstb_l2) +IRQCHIP_MATCH("brcm,l2-intc", brcmstb_l2_edge_intc_of_init) +IRQCHIP_MATCH("brcm,hif-spi-l2-intc", brcmstb_l2_edge_intc_of_init) +IRQCHIP_MATCH("brcm,upg-aux-aon-l2-intc", brcmstb_l2_edge_intc_of_init) +IRQCHIP_MATCH("brcm,bcm7271-l2-intc", brcmstb_l2_lvl_intc_of_init) +IRQCHIP_PLATFORM_DRIVER_END(brcmstb_l2) +MODULE_DESCRIPTION("Broadcom STB generic L2 interrupt controller"); +MODULE_LICENSE("GPL v2"); |