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| author | Miquel Raynal <miquel.raynal@bootlin.com> | 2022-04-22 20:06:10 +0200 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2022-04-26 13:25:47 +0200 |
| commit | 593dea000bc1f160623f8cf65ad5e47c72f4ec67 (patch) | |
| tree | fefc7f00fe5d8b095f8a0d981675753c5c407727 | |
| parent | ffd381445eac2aa624e49bab5a811451e8351008 (diff) | |
| download | linux-593dea000bc1f160623f8cf65ad5e47c72f4ec67.tar.gz linux-593dea000bc1f160623f8cf65ad5e47c72f4ec67.tar.bz2 linux-593dea000bc1f160623f8cf65ad5e47c72f4ec67.zip | |
serial: 8250: dw: Allow to use a fallback CPR value if not synthesized
DW UART controllers can be synthesized without the CPR register.
In this case, allow to the platform information to provide a CPR value.
Co-developed-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/r/20220422180615.9098-5-miquel.raynal@bootlin.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| -rw-r--r-- | drivers/tty/serial/8250/8250_dwlib.c | 10 | ||||
| -rw-r--r-- | drivers/tty/serial/8250/8250_dwlib.h | 1 |
2 files changed, 8 insertions, 3 deletions
diff --git a/drivers/tty/serial/8250/8250_dwlib.c b/drivers/tty/serial/8250/8250_dwlib.c index 622d3b0d89e7..f1fb20353612 100644 --- a/drivers/tty/serial/8250/8250_dwlib.c +++ b/drivers/tty/serial/8250/8250_dwlib.c @@ -89,6 +89,8 @@ EXPORT_SYMBOL_GPL(dw8250_do_set_termios); void dw8250_setup_port(struct uart_port *p) { + struct dw8250_port_data *pd = p->private_data; + struct dw8250_data *data = to_dw8250_data(pd); struct uart_8250_port *up = up_to_u8250p(p); u32 reg; @@ -108,14 +110,16 @@ void dw8250_setup_port(struct uart_port *p) dw8250_writel_ext(p, DW_UART_DLF, 0); if (reg) { - struct dw8250_port_data *d = p->private_data; - - d->dlf_size = fls(reg); + pd->dlf_size = fls(reg); p->get_divisor = dw8250_get_divisor; p->set_divisor = dw8250_set_divisor; } reg = dw8250_readl_ext(p, DW_UART_CPR); + if (!reg) { + reg = data->pdata->cpr_val; + dev_dbg(p->dev, "CPR is not available, using 0x%08x instead\n", reg); + } if (!reg) return; diff --git a/drivers/tty/serial/8250/8250_dwlib.h b/drivers/tty/serial/8250/8250_dwlib.h index 0df6baa6eaee..36a839ef5d9a 100644 --- a/drivers/tty/serial/8250/8250_dwlib.h +++ b/drivers/tty/serial/8250/8250_dwlib.h @@ -23,6 +23,7 @@ struct dw8250_port_data { struct dw8250_platform_data { u8 usr_reg; + u32 cpr_val; unsigned int quirks; }; |