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| author | Christopher Covington <cov@codeaurora.org> | 2014-01-29 22:01:31 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2014-02-10 11:48:05 +0000 |
| commit | 5b61d4a5d6676b5bb4c3c101683d3c7fd0df2a38 (patch) | |
| tree | f1c40d311e09ca9bee983ba1cd8fe0f0c27ad479 | |
| parent | 889f172d920b6f275408199ec836df62979bcd52 (diff) | |
| download | linux-5b61d4a5d6676b5bb4c3c101683d3c7fd0df2a38.tar.gz linux-5b61d4a5d6676b5bb4c3c101683d3c7fd0df2a38.tar.bz2 linux-5b61d4a5d6676b5bb4c3c101683d3c7fd0df2a38.zip | |
ARM: 7948/1: hw_breakpoint: Add ARMv8 support
Add the trivial support necessary to get hardware breakpoints
working for GDB on ARMv8 simulators running in AArch32 mode.
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Christopher Covington <cov@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| -rw-r--r-- | arch/arm/include/asm/hw_breakpoint.h | 1 | ||||
| -rw-r--r-- | arch/arm/kernel/hw_breakpoint.c | 3 |
2 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm/include/asm/hw_breakpoint.h b/arch/arm/include/asm/hw_breakpoint.h index eef55ea9ef00..8e427c7b4425 100644 --- a/arch/arm/include/asm/hw_breakpoint.h +++ b/arch/arm/include/asm/hw_breakpoint.h @@ -51,6 +51,7 @@ static inline void decode_ctrl_reg(u32 reg, #define ARM_DEBUG_ARCH_V7_ECP14 3 #define ARM_DEBUG_ARCH_V7_MM 4 #define ARM_DEBUG_ARCH_V7_1 5 +#define ARM_DEBUG_ARCH_V8 6 /* Breakpoint */ #define ARM_BREAKPOINT_EXECUTE 0 diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c index 3d446605cbf8..9da35c6d3411 100644 --- a/arch/arm/kernel/hw_breakpoint.c +++ b/arch/arm/kernel/hw_breakpoint.c @@ -167,7 +167,7 @@ static int debug_arch_supported(void) /* Can we determine the watchpoint access type from the fsr? */ static int debug_exception_updates_fsr(void) { - return 0; + return get_debug_arch() >= ARM_DEBUG_ARCH_V8; } /* Determine number of WRP registers available. */ @@ -257,6 +257,7 @@ static int enable_monitor_mode(void) break; case ARM_DEBUG_ARCH_V7_ECP14: case ARM_DEBUG_ARCH_V7_1: + case ARM_DEBUG_ARCH_V8: ARM_DBG_WRITE(c0, c2, 2, (dscr | ARM_DSCR_MDBGEN)); isb(); break; |