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author | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2021-08-05 14:26:03 +0200 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2021-08-05 14:26:03 +0200 |
commit | 72674e86b6fe2f656c93564635b675bcdf012844 (patch) | |
tree | 39234969ad4fb5816732f2e33f75ce87c9f94803 | |
parent | e67adaa1754d5383583c35a703518507e457482b (diff) | |
parent | 4f45f3404960109843eaa92c8a4a850d6bdd9981 (diff) | |
download | linux-72674e86b6fe2f656c93564635b675bcdf012844.tar.gz linux-72674e86b6fe2f656c93564635b675bcdf012844.tar.bz2 linux-72674e86b6fe2f656c93564635b675bcdf012844.zip |
Merge tag 'fpga-for-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/mdf/linux-fpga into char-misc-next
Moritz writes:
FPGA Manager changes for 5.15-rc1
FPGA Manager
- Colin's change is a simple spelling cleanup.
DFL
- Martin's fist change exposes DFL feature revision to client drivers
- Martin's second change modifies a SPI driver to populate different
spi_board_info modaliases based on the DFL feature revision
All patches have been reviewed on the mailing list, and have been in the
last few linux-next releases (as part of my for-next branch) without issues.
Signed-off-by: Moritz Fischer <mdf@kernel.org>
* tag 'fpga-for-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/mdf/linux-fpga:
spi: spi-altera-dfl: support n5010 feature revision
fpga: dfl: expose feature revision from struct dfl_device
fpga: Fix spelling mistake "eXchnage" -> "exchange" in Kconfig
-rw-r--r-- | drivers/fpga/Kconfig | 2 | ||||
-rw-r--r-- | drivers/fpga/dfl.c | 27 | ||||
-rw-r--r-- | drivers/fpga/dfl.h | 1 | ||||
-rw-r--r-- | drivers/spi/spi-altera-dfl.c | 21 | ||||
-rw-r--r-- | include/linux/dfl.h | 1 |
5 files changed, 32 insertions, 20 deletions
diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig index 16793bfc2bb4..991b3f361ec9 100644 --- a/drivers/fpga/Kconfig +++ b/drivers/fpga/Kconfig @@ -119,7 +119,7 @@ config XILINX_PR_DECOUPLER depends on HAS_IOMEM help Say Y to enable drivers for Xilinx LogiCORE PR Decoupler - or Xilinx Dynamic Function eXchnage AIX Shutdown Manager. + or Xilinx Dynamic Function eXchange AIX Shutdown Manager. The PR Decoupler exists in the FPGA fabric to isolate one region of the FPGA from the busses while that region is being reprogrammed during partial reconfig. diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl.c index 511b20ff35a3..e73a70053906 100644 --- a/drivers/fpga/dfl.c +++ b/drivers/fpga/dfl.c @@ -381,6 +381,7 @@ dfl_dev_add(struct dfl_feature_platform_data *pdata, ddev->type = feature_dev_id_type(pdev); ddev->feature_id = feature->id; + ddev->revision = feature->revision; ddev->cdev = pdata->dfl_cdev; /* add mmio resource */ @@ -717,6 +718,7 @@ struct build_feature_devs_info { */ struct dfl_feature_info { u16 fid; + u8 revision; struct resource mmio_res; void __iomem *ioaddr; struct list_head node; @@ -796,6 +798,7 @@ static int build_info_commit_dev(struct build_feature_devs_info *binfo) /* save resource information for each feature */ feature->dev = fdev; feature->id = finfo->fid; + feature->revision = finfo->revision; /* * the FIU header feature has some fundamental functions (sriov @@ -910,19 +913,17 @@ static void build_info_free(struct build_feature_devs_info *binfo) devm_kfree(binfo->dev, binfo); } -static inline u32 feature_size(void __iomem *start) +static inline u32 feature_size(u64 value) { - u64 v = readq(start + DFH); - u32 ofst = FIELD_GET(DFH_NEXT_HDR_OFST, v); + u32 ofst = FIELD_GET(DFH_NEXT_HDR_OFST, value); /* workaround for private features with invalid size, use 4K instead */ return ofst ? ofst : 4096; } -static u16 feature_id(void __iomem *start) +static u16 feature_id(u64 value) { - u64 v = readq(start + DFH); - u16 id = FIELD_GET(DFH_ID, v); - u8 type = FIELD_GET(DFH_TYPE, v); + u16 id = FIELD_GET(DFH_ID, value); + u8 type = FIELD_GET(DFH_TYPE, value); if (type == DFH_TYPE_FIU) return FEATURE_ID_FIU_HEADER; @@ -1021,10 +1022,15 @@ create_feature_instance(struct build_feature_devs_info *binfo, unsigned int irq_base, nr_irqs; struct dfl_feature_info *finfo; int ret; + u8 revision; + u64 v; + + v = readq(binfo->ioaddr + ofst); + revision = FIELD_GET(DFH_REVISION, v); /* read feature size and id if inputs are invalid */ - size = size ? size : feature_size(binfo->ioaddr + ofst); - fid = fid ? fid : feature_id(binfo->ioaddr + ofst); + size = size ? size : feature_size(v); + fid = fid ? fid : feature_id(v); if (binfo->len - ofst < size) return -EINVAL; @@ -1038,6 +1044,7 @@ create_feature_instance(struct build_feature_devs_info *binfo, return -ENOMEM; finfo->fid = fid; + finfo->revision = revision; finfo->mmio_res.start = binfo->start + ofst; finfo->mmio_res.end = finfo->mmio_res.start + size - 1; finfo->mmio_res.flags = IORESOURCE_MEM; @@ -1166,7 +1173,7 @@ static int parse_feature_private(struct build_feature_devs_info *binfo, { if (!is_feature_dev_detected(binfo)) { dev_err(binfo->dev, "the private feature 0x%x does not belong to any AFU.\n", - feature_id(binfo->ioaddr + ofst)); + feature_id(readq(binfo->ioaddr + ofst))); return -EINVAL; } diff --git a/drivers/fpga/dfl.h b/drivers/fpga/dfl.h index dac9c3d45e6c..53572c7aced0 100644 --- a/drivers/fpga/dfl.h +++ b/drivers/fpga/dfl.h @@ -243,6 +243,7 @@ struct dfl_feature_irq_ctx { struct dfl_feature { struct platform_device *dev; u16 id; + u8 revision; int resource_index; void __iomem *ioaddr; struct dfl_feature_irq_ctx *irq_ctx; diff --git a/drivers/spi/spi-altera-dfl.c b/drivers/spi/spi-altera-dfl.c index 39a3e1a032e0..44fc9ee13fc7 100644 --- a/drivers/spi/spi-altera-dfl.c +++ b/drivers/spi/spi-altera-dfl.c @@ -104,13 +104,6 @@ static const struct regmap_config indirect_regbus_cfg = { .reg_read = indirect_bus_reg_read, }; -static struct spi_board_info m10_bmc_info = { - .modalias = "m10-d5005", - .max_speed_hz = 12500000, - .bus_num = 0, - .chip_select = 0, -}; - static void config_spi_master(void __iomem *base, struct spi_master *master) { u64 v; @@ -130,6 +123,7 @@ static void config_spi_master(void __iomem *base, struct spi_master *master) static int dfl_spi_altera_probe(struct dfl_device *dfl_dev) { + struct spi_board_info board_info = { 0 }; struct device *dev = &dfl_dev->dev; struct spi_master *master; struct altera_spi *hw; @@ -170,9 +164,18 @@ static int dfl_spi_altera_probe(struct dfl_device *dfl_dev) goto exit; } - if (!spi_new_device(master, &m10_bmc_info)) { + if (dfl_dev->revision == FME_FEATURE_REV_MAX10_SPI_N5010) + strscpy(board_info.modalias, "m10-n5010", SPI_NAME_SIZE); + else + strscpy(board_info.modalias, "m10-d5005", SPI_NAME_SIZE); + + board_info.max_speed_hz = 12500000; + board_info.bus_num = 0; + board_info.chip_select = 0; + + if (!spi_new_device(master, &board_info)) { dev_err(dev, "%s failed to create SPI device: %s\n", - __func__, m10_bmc_info.modalias); + __func__, board_info.modalias); } return 0; diff --git a/include/linux/dfl.h b/include/linux/dfl.h index 6cc10982351a..431636a0dc78 100644 --- a/include/linux/dfl.h +++ b/include/linux/dfl.h @@ -38,6 +38,7 @@ struct dfl_device { int id; u16 type; u16 feature_id; + u8 revision; struct resource mmio_res; int *irqs; unsigned int num_irqs; |