summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorAristeu Rozanski <aris@redhat.com>2014-06-18 11:05:01 -0300
committerMauro Carvalho Chehab <m.chehab@samsung.com>2014-06-26 15:46:55 -0300
commit7b8278358cc2b453ca6e75eedb3741cdb7e97236 (patch)
treed6bc903a68f1695da152cf31a8a7a70b9d51e490
parentadc61bcd91aa8364efaa496e7a4699950c362c21 (diff)
downloadlinux-7b8278358cc2b453ca6e75eedb3741cdb7e97236.tar.gz
linux-7b8278358cc2b453ca6e75eedb3741cdb7e97236.tar.bz2
linux-7b8278358cc2b453ca6e75eedb3741cdb7e97236.zip
edac: add DDR4 and RDDR4
Haswell memory controller can make use of DDR4 and Registered DDR4 Cc: tony.luck@intel.com Signed-off-by: Aristeu Rozanski <aris@redhat.com> Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
-rw-r--r--drivers/edac/edac_mc_sysfs.c4
-rw-r--r--include/linux/edac.h5
2 files changed, 8 insertions, 1 deletions
diff --git a/drivers/edac/edac_mc_sysfs.c b/drivers/edac/edac_mc_sysfs.c
index 01fae8289cf0..a6cd36100663 100644
--- a/drivers/edac/edac_mc_sysfs.c
+++ b/drivers/edac/edac_mc_sysfs.c
@@ -108,7 +108,9 @@ static const char * const mem_types[] = {
[MEM_RDDR2] = "Registered-DDR2",
[MEM_XDR] = "XDR",
[MEM_DDR3] = "Unbuffered-DDR3",
- [MEM_RDDR3] = "Registered-DDR3"
+ [MEM_RDDR3] = "Registered-DDR3",
+ [MEM_DDR4] = "Unbuffered-DDR4",
+ [MEM_RDDR4] = "Registered-DDR4"
};
static const char * const dev_types[] = {
diff --git a/include/linux/edac.h b/include/linux/edac.h
index 8e6c20af11a2..e1e68da6f35c 100644
--- a/include/linux/edac.h
+++ b/include/linux/edac.h
@@ -194,6 +194,9 @@ static inline char *mc_event_error_type(const unsigned int err_type)
* @MEM_DDR3: DDR3 RAM
* @MEM_RDDR3: Registered DDR3 RAM
* This is a variant of the DDR3 memories.
+ * @MEM_DDR4: DDR4 RAM
+ * @MEM_RDDR4: Registered DDR4 RAM
+ * This is a variant of the DDR4 memories.
*/
enum mem_type {
MEM_EMPTY = 0,
@@ -213,6 +216,8 @@ enum mem_type {
MEM_XDR,
MEM_DDR3,
MEM_RDDR3,
+ MEM_DDR4,
+ MEM_RDDR4,
};
#define MEM_FLAG_EMPTY BIT(MEM_EMPTY)