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| author | Ashish Pawar <ashish.pawar@amd.com> | 2021-06-17 13:51:23 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2021-06-18 17:11:49 -0400 |
| commit | 7c5f3d7d61619cc03b4c4876120b923dbd44a553 (patch) | |
| tree | fde669098d120ee19b25d6548124f14500e6ad3d | |
| parent | 6ec598cc9dfbf40433e94a2ed1a622e3ef80268b (diff) | |
| download | linux-7c5f3d7d61619cc03b4c4876120b923dbd44a553.tar.gz linux-7c5f3d7d61619cc03b4c4876120b923dbd44a553.tar.bz2 linux-7c5f3d7d61619cc03b4c4876120b923dbd44a553.zip | |
drm/amdgpu: PWRBRK sequence changes for Aldebaran
Modify power brake enablement sequence on Aldebaran
Signed-off-by: Ashish Pawar <ashish.pawar@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c index c0352dcc89be..1769c4cba2ad 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c @@ -782,11 +782,6 @@ void gfx_v9_4_2_set_power_brake_sequence(struct amdgpu_device *adev) tmp = REG_SET_FIELD(tmp, GC_THROTTLE_CTRL1, PWRBRK_STALL_EN, 1); WREG32_SOC15(GC, 0, regGC_THROTTLE_CTRL1, tmp); - WREG32_SOC15(GC, 0, regDIDT_IND_INDEX, ixDIDT_SQ_THROTTLE_CTRL); - tmp = 0; - tmp = REG_SET_FIELD(tmp, DIDT_SQ_THROTTLE_CTRL, PWRBRK_STALL_EN, 1); - WREG32_SOC15(GC, 0, regDIDT_IND_DATA, tmp); - WREG32_SOC15(GC, 0, regGC_CAC_IND_INDEX, ixPWRBRK_STALL_PATTERN_CTRL); tmp = 0; tmp = REG_SET_FIELD(tmp, PWRBRK_STALL_PATTERN_CTRL, PWRBRK_END_STEP, 0x12); |