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authorArmin Wolf <W_Armin@gmx.de>2023-09-07 07:26:36 +0200
committerGuenter Roeck <linux@roeck-us.net>2023-10-27 07:27:24 -0700
commit7da8a635436029957c5350da3acf51d78ed64071 (patch)
tree9f9e04c8bce95fb0bcdecee07a5464e1326a4b50
parent7f0b28e0653f36b51542d25dd54ed312c397ecfc (diff)
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hwmon: (sch5627) Disallow write access if virtual registers are locked
When the lock bit inside SCH5627_REG_CTRL is set, then the virtual registers become read-only until the next power cycle. Disallow write access to those registers in such a case. Tested on a Fujitsu Esprimo P720. Fixes: aa9f833dfc12 ("hwmon: (sch5627) Add pwmX_auto_channels_temp support") Signed-off-by: Armin Wolf <W_Armin@gmx.de> Link: https://lore.kernel.org/r/20230907052639.16491-3-W_Armin@gmx.de Signed-off-by: Guenter Roeck <linux@roeck-us.net>
-rw-r--r--drivers/hwmon/sch5627.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/hwmon/sch5627.c b/drivers/hwmon/sch5627.c
index 0eefb8c0aef2..bf408e35e2c3 100644
--- a/drivers/hwmon/sch5627.c
+++ b/drivers/hwmon/sch5627.c
@@ -34,6 +34,7 @@
#define SCH5627_REG_CTRL 0x40
#define SCH5627_CTRL_START BIT(0)
+#define SCH5627_CTRL_LOCK BIT(1)
#define SCH5627_CTRL_VBAT BIT(4)
#define SCH5627_NO_TEMPS 8
@@ -231,6 +232,14 @@ static int reg_to_rpm(u16 reg)
static umode_t sch5627_is_visible(const void *drvdata, enum hwmon_sensor_types type, u32 attr,
int channel)
{
+ const struct sch5627_data *data = drvdata;
+
+ /* Once the lock bit is set, the virtual registers become read-only
+ * until the next power cycle.
+ */
+ if (data->control & SCH5627_CTRL_LOCK)
+ return 0444;
+
if (type == hwmon_pwm && attr == hwmon_pwm_auto_channels_temp)
return 0644;