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| author | Shenming Lu <lushenming@huawei.com> | 2021-03-22 14:01:58 +0800 |
|---|---|---|
| committer | Marc Zyngier <maz@kernel.org> | 2021-03-24 18:12:21 +0000 |
| commit | 8082d50f4817ff6a7e08f4b7e9b18e5f8bfa290d (patch) | |
| tree | 64e6c248e66806893054251eb754a2e75e4e0558 | |
| parent | 12df7429213abbfa9632ab7db94f629ec309a58b (diff) | |
| download | linux-8082d50f4817ff6a7e08f4b7e9b18e5f8bfa290d.tar.gz linux-8082d50f4817ff6a7e08f4b7e9b18e5f8bfa290d.tar.bz2 linux-8082d50f4817ff6a7e08f4b7e9b18e5f8bfa290d.zip | |
KVM: arm64: GICv4.1: Give a chance to save VLPI state
Before GICv4.1, we don't have direct access to the VLPI state. So
we simply let it fail early when encountering any VLPI in saving.
But now we don't have to return -EACCES directly if on GICv4.1. Let’s
change the hard code and give a chance to save the VLPI state (and
preserve the UAPI).
Signed-off-by: Shenming Lu <lushenming@huawei.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20210322060158.1584-7-lushenming@huawei.com
| -rw-r--r-- | Documentation/virt/kvm/devices/arm-vgic-its.rst | 2 | ||||
| -rw-r--r-- | arch/arm64/kvm/vgic/vgic-its.c | 6 |
2 files changed, 4 insertions, 4 deletions
diff --git a/Documentation/virt/kvm/devices/arm-vgic-its.rst b/Documentation/virt/kvm/devices/arm-vgic-its.rst index 6c304fd2b1b4..d257eddbae29 100644 --- a/Documentation/virt/kvm/devices/arm-vgic-its.rst +++ b/Documentation/virt/kvm/devices/arm-vgic-its.rst @@ -80,7 +80,7 @@ KVM_DEV_ARM_VGIC_GRP_CTRL -EFAULT Invalid guest ram access -EBUSY One or more VCPUS are running -EACCES The virtual ITS is backed by a physical GICv4 ITS, and the - state is not available + state is not available without GICv4.1 ======= ========================================================== KVM_DEV_ARM_VGIC_GRP_ITS_REGS diff --git a/arch/arm64/kvm/vgic/vgic-its.c b/arch/arm64/kvm/vgic/vgic-its.c index 40cbaca81333..ec7543a9617c 100644 --- a/arch/arm64/kvm/vgic/vgic-its.c +++ b/arch/arm64/kvm/vgic/vgic-its.c @@ -2218,10 +2218,10 @@ static int vgic_its_save_itt(struct vgic_its *its, struct its_device *device) /* * If an LPI carries the HW bit, this means that this * interrupt is controlled by GICv4, and we do not - * have direct access to that state. Let's simply fail - * the save operation... + * have direct access to that state without GICv4.1. + * Let's simply fail the save operation... */ - if (ite->irq->hw) + if (ite->irq->hw && !kvm_vgic_global_state.has_gicv4_1) return -EACCES; ret = vgic_its_save_ite(its, device, ite, gpa, ite_esz); |