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author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2024-05-31 14:41:00 +0300 |
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committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2024-06-05 12:45:34 +0300 |
commit | 81d604f44b1880a278197a4d076bddc83e763af5 (patch) | |
tree | 07d737783468fb1ff5c41873114f365904c9e4ed | |
parent | 738f3d86182ed5f6d09205db6f0ba3c498c20d69 (diff) | |
download | linux-81d604f44b1880a278197a4d076bddc83e763af5.tar.gz linux-81d604f44b1880a278197a4d076bddc83e763af5.tar.bz2 linux-81d604f44b1880a278197a4d076bddc83e763af5.zip |
drm/i915/dsb: Pass DSB engine ID to intel_dsb_prepare()
Allow the caller of intel_dsb_prepare() to determine which DSB
engine (out of the three possible per pipe) to use. This will
let us utilize multiple DSB engines during the same commit.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240531114101.19994-4-ville.syrjala@linux.intel.com
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
-rw-r--r-- | drivers/gpu/drm/i915/display/intel_color.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/display/intel_dsb.c | 6 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/display/intel_dsb.h | 1 |
3 files changed, 6 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c index 9173caba3f0f..98553e8a5149 100644 --- a/drivers/gpu/drm/i915/display/intel_color.c +++ b/drivers/gpu/drm/i915/display/intel_color.c @@ -1914,7 +1914,7 @@ void intel_color_prepare_commit(struct intel_crtc_state *crtc_state) if (!crtc_state->pre_csc_lut && !crtc_state->post_csc_lut) return; - crtc_state->dsb = intel_dsb_prepare(crtc_state, 1024); + crtc_state->dsb = intel_dsb_prepare(crtc_state, INTEL_DSB_0, 1024); if (!crtc_state->dsb) return; diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c b/drivers/gpu/drm/i915/display/intel_dsb.c index 75ac780d66bf..5180b9722046 100644 --- a/drivers/gpu/drm/i915/display/intel_dsb.c +++ b/drivers/gpu/drm/i915/display/intel_dsb.c @@ -435,6 +435,7 @@ void intel_dsb_wait(struct intel_dsb *dsb) /** * intel_dsb_prepare() - Allocate, pin and map the DSB command buffer. * @crtc_state: the CRTC state + * @dsb_id: the DSB engine to use * @max_cmds: number of commands we need to fit into command buffer * * This function prepare the command buffer which is used to store dsb @@ -444,6 +445,7 @@ void intel_dsb_wait(struct intel_dsb *dsb) * DSB context, NULL on failure */ struct intel_dsb *intel_dsb_prepare(const struct intel_crtc_state *crtc_state, + enum intel_dsb_id dsb_id, unsigned int max_cmds) { struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); @@ -473,7 +475,7 @@ struct intel_dsb *intel_dsb_prepare(const struct intel_crtc_state *crtc_state, intel_runtime_pm_put(&i915->runtime_pm, wakeref); - dsb->id = INTEL_DSB_0; + dsb->id = dsb_id; dsb->crtc = crtc; dsb->size = size / 4; /* in dwords */ dsb->free_pos = 0; @@ -488,7 +490,7 @@ out_put_rpm: out: drm_info_once(&i915->drm, "[CRTC:%d:%s] DSB %d queue setup failed, will fallback to MMIO for display HW programming\n", - crtc->base.base.id, crtc->base.name, INTEL_DSB_0); + crtc->base.base.id, crtc->base.name, dsb_id); return NULL; } diff --git a/drivers/gpu/drm/i915/display/intel_dsb.h b/drivers/gpu/drm/i915/display/intel_dsb.h index 5d7561ea65fa..36fdb130af6e 100644 --- a/drivers/gpu/drm/i915/display/intel_dsb.h +++ b/drivers/gpu/drm/i915/display/intel_dsb.h @@ -23,6 +23,7 @@ enum intel_dsb_id { }; struct intel_dsb *intel_dsb_prepare(const struct intel_crtc_state *crtc_state, + enum intel_dsb_id dsb_id, unsigned int max_cmds); void intel_dsb_finish(struct intel_dsb *dsb); void intel_dsb_cleanup(struct intel_dsb *dsb); |