diff options
author | Alex Deucher <alexander.deucher@amd.com> | 2019-02-15 17:39:33 -0500 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2019-10-15 15:55:31 -0400 |
commit | 912a0bf57436d77592faea50cc989267a4e84d8d (patch) | |
tree | aac386c020d36951f08acfa361c861fe440a71cf | |
parent | 56f68f18e09c397776e3d485f69e87b801362b8f (diff) | |
download | linux-912a0bf57436d77592faea50cc989267a4e84d8d.tar.gz linux-912a0bf57436d77592faea50cc989267a4e84d8d.tar.bz2 linux-912a0bf57436d77592faea50cc989267a4e84d8d.zip |
drm/amdgpu/powerplay: split out common smu7 BACO code
Several of the BACO functions are common across smu7-based
asics. Split the common code out.
Reviewed-by: Evan Quan <evan.quan@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/hwmgr/Makefile | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/hwmgr/ci_baco.c | 34 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/hwmgr/ci_baco.h | 5 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/hwmgr/fiji_baco.c | 34 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/hwmgr/fiji_baco.h | 5 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/hwmgr/polaris_baco.c | 34 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/hwmgr/polaris_baco.h | 5 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/hwmgr/smu7_baco.c | 91 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/hwmgr/smu7_baco.h | 32 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/hwmgr/tonga_baco.c | 34 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/hwmgr/tonga_baco.h | 5 |
11 files changed, 132 insertions, 149 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/Makefile b/drivers/gpu/drm/amd/powerplay/hwmgr/Makefile index 5ad5893bdae1..2773966ae434 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/Makefile +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/Makefile @@ -37,7 +37,7 @@ HARDWARE_MGR = hwmgr.o processpptables.o \ vega20_processpptables.o vega20_hwmgr.o vega20_powertune.o \ vega20_thermal.o common_baco.o vega10_baco.o vega20_baco.o \ vega12_baco.o smu9_baco.o tonga_baco.o polaris_baco.o fiji_baco.o \ - ci_baco.o + ci_baco.o smu7_baco.o AMD_PP_HWMGR = $(addprefix $(AMD_PP_PATH)/hwmgr/,$(HARDWARE_MGR)) diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/ci_baco.c b/drivers/gpu/drm/amd/powerplay/hwmgr/ci_baco.c index f1a8c9cc0d1f..3be40114e63d 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/ci_baco.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/ci_baco.c @@ -158,43 +158,11 @@ static const struct baco_cmd_entry clean_baco_tbl[] = { CMD_WRITE, mmCP_PFP_UCODE_ADDR, 0, 0, 0, 0 } }; -int ci_baco_get_capability(struct pp_hwmgr *hwmgr, bool *cap) -{ - struct amdgpu_device *adev = (struct amdgpu_device *)(hwmgr->adev); - uint32_t reg; - - *cap = false; - if (!phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_BACO)) - return 0; - - reg = RREG32(mmCC_BIF_BX_FUSESTRAP0); - - if (reg & CC_BIF_BX_FUSESTRAP0__STRAP_BIF_PX_CAPABLE_MASK) - *cap = true; - - return 0; -} - -int ci_baco_get_state(struct pp_hwmgr *hwmgr, enum BACO_STATE *state) -{ - struct amdgpu_device *adev = (struct amdgpu_device *)(hwmgr->adev); - uint32_t reg; - - reg = RREG32(mmBACO_CNTL); - - if (reg & BACO_CNTL__BACO_MODE_MASK) - /* gfx has already entered BACO state */ - *state = BACO_STATE_IN; - else - *state = BACO_STATE_OUT; - return 0; -} - int ci_baco_set_state(struct pp_hwmgr *hwmgr, enum BACO_STATE state) { enum BACO_STATE cur_state; - ci_baco_get_state(hwmgr, &cur_state); + smu7_baco_get_state(hwmgr, &cur_state); if (cur_state == state) /* aisc already in the target state */ diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/ci_baco.h b/drivers/gpu/drm/amd/powerplay/hwmgr/ci_baco.h index c9bedb51cb25..17041f187020 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/ci_baco.h +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/ci_baco.h @@ -22,11 +22,8 @@ */ #ifndef __CI_BACO_H__ #define __CI_BACO_H__ -#include "hwmgr.h" -#include "common_baco.h" +#include "smu7_baco.h" -extern int ci_baco_get_capability(struct pp_hwmgr *hwmgr, bool *cap); -extern int ci_baco_get_state(struct pp_hwmgr *hwmgr, enum BACO_STATE *state); extern int ci_baco_set_state(struct pp_hwmgr *hwmgr, enum BACO_STATE state); #endif diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_baco.c b/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_baco.c index ad01919ccb27..c0368f2dfb21 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_baco.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_baco.c @@ -158,43 +158,11 @@ static const struct baco_cmd_entry clean_baco_tbl[] = { CMD_WRITE, mmBIOS_SCRATCH_15, 0, 0, 0, 0 } }; -int fiji_baco_get_capability(struct pp_hwmgr *hwmgr, bool *cap) -{ - struct amdgpu_device *adev = (struct amdgpu_device *)(hwmgr->adev); - uint32_t reg; - - *cap = false; - if (!phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_BACO)) - return 0; - - reg = RREG32(mmCC_BIF_BX_FUSESTRAP0); - - if (reg & CC_BIF_BX_FUSESTRAP0__STRAP_BIF_PX_CAPABLE_MASK) - *cap = true; - - return 0; -} - -int fiji_baco_get_state(struct pp_hwmgr *hwmgr, enum BACO_STATE *state) -{ - struct amdgpu_device *adev = (struct amdgpu_device *)(hwmgr->adev); - uint32_t reg; - - reg = RREG32(mmBACO_CNTL); - - if (reg & BACO_CNTL__BACO_MODE_MASK) - /* gfx has already entered BACO state */ - *state = BACO_STATE_IN; - else - *state = BACO_STATE_OUT; - return 0; -} - int fiji_baco_set_state(struct pp_hwmgr *hwmgr, enum BACO_STATE state) { enum BACO_STATE cur_state; - fiji_baco_get_state(hwmgr, &cur_state); + smu7_baco_get_state(hwmgr, &cur_state); if (cur_state == state) /* aisc already in the target state */ diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_baco.h b/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_baco.h index 2f7c8388667e..47f402900bdb 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_baco.h +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_baco.h @@ -22,11 +22,8 @@ */ #ifndef __FIJI_BACO_H__ #define __FIJI_BACO_H__ -#include "hwmgr.h" -#include "common_baco.h" +#include "smu7_baco.h" -extern int fiji_baco_get_capability(struct pp_hwmgr *hwmgr, bool *cap); -extern int fiji_baco_get_state(struct pp_hwmgr *hwmgr, enum BACO_STATE *state); extern int fiji_baco_set_state(struct pp_hwmgr *hwmgr, enum BACO_STATE state); #endif diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/polaris_baco.c b/drivers/gpu/drm/amd/powerplay/hwmgr/polaris_baco.c index a9abe53df475..8f8e296f2fe9 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/polaris_baco.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/polaris_baco.c @@ -178,43 +178,11 @@ static const struct baco_cmd_entry turn_off_plls_tbl_vg[] = { CMD_DELAY_US, 0, 0, 0, 5, 0x0 } }; -int polaris_baco_get_capability(struct pp_hwmgr *hwmgr, bool *cap) -{ - struct amdgpu_device *adev = (struct amdgpu_device *)(hwmgr->adev); - uint32_t reg; - - *cap = false; - if (!phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_BACO)) - return 0; - - reg = RREG32(mmCC_BIF_BX_FUSESTRAP0); - - if (reg & CC_BIF_BX_FUSESTRAP0__STRAP_BIF_PX_CAPABLE_MASK) - *cap = true; - - return 0; -} - -int polaris_baco_get_state(struct pp_hwmgr *hwmgr, enum BACO_STATE *state) -{ - struct amdgpu_device *adev = (struct amdgpu_device *)(hwmgr->adev); - uint32_t reg; - - reg = RREG32(mmBACO_CNTL); - - if (reg & BACO_CNTL__BACO_MODE_MASK) - /* gfx has already entered BACO state */ - *state = BACO_STATE_IN; - else - *state = BACO_STATE_OUT; - return 0; -} - int polaris_baco_set_state(struct pp_hwmgr *hwmgr, enum BACO_STATE state) { enum BACO_STATE cur_state; - polaris_baco_get_state(hwmgr, &cur_state); + smu7_baco_get_state(hwmgr, &cur_state); if (cur_state == state) /* aisc already in the target state */ diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/polaris_baco.h b/drivers/gpu/drm/amd/powerplay/hwmgr/polaris_baco.h index e48bfb1c5c6a..87a5fa0a157a 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/polaris_baco.h +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/polaris_baco.h @@ -22,11 +22,8 @@ */ #ifndef __POLARIS_BACO_H__ #define __POLARIS_BACO_H__ -#include "hwmgr.h" -#include "common_baco.h" +#include "smu7_baco.h" -extern int polaris_baco_get_capability(struct pp_hwmgr *hwmgr, bool *cap); -extern int polaris_baco_get_state(struct pp_hwmgr *hwmgr, enum BACO_STATE *state); extern int polaris_baco_set_state(struct pp_hwmgr *hwmgr, enum BACO_STATE state); #endif diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_baco.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_baco.c new file mode 100644 index 000000000000..044cda005aed --- /dev/null +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_baco.c @@ -0,0 +1,91 @@ +/* + * Copyright 2019 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + */ +#include "amdgpu.h" +#include "smu7_baco.h" +#include "tonga_baco.h" +#include "fiji_baco.h" +#include "polaris_baco.h" +#include "ci_baco.h" + +#include "bif/bif_5_0_d.h" +#include "bif/bif_5_0_sh_mask.h" + +#include "smu/smu_7_1_2_d.h" +#include "smu/smu_7_1_2_sh_mask.h" + +int smu7_baco_get_capability(struct pp_hwmgr *hwmgr, bool *cap) +{ + struct amdgpu_device *adev = (struct amdgpu_device *)(hwmgr->adev); + uint32_t reg; + + *cap = false; + if (!phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_BACO)) + return 0; + + reg = RREG32(mmCC_BIF_BX_FUSESTRAP0); + + if (reg & CC_BIF_BX_FUSESTRAP0__STRAP_BIF_PX_CAPABLE_MASK) + *cap = true; + + return 0; +} + +int smu7_baco_get_state(struct pp_hwmgr *hwmgr, enum BACO_STATE *state) +{ + struct amdgpu_device *adev = (struct amdgpu_device *)(hwmgr->adev); + uint32_t reg; + + reg = RREG32(mmBACO_CNTL); + + if (reg & BACO_CNTL__BACO_MODE_MASK) + /* gfx has already entered BACO state */ + *state = BACO_STATE_IN; + else + *state = BACO_STATE_OUT; + return 0; +} + +int smu7_baco_set_state(struct pp_hwmgr *hwmgr, enum BACO_STATE state) +{ + struct amdgpu_device *adev = (struct amdgpu_device *)(hwmgr->adev); + + switch (adev->asic_type) { + case CHIP_TOPAZ: + case CHIP_TONGA: + return tonga_baco_set_state(hwmgr, state); + case CHIP_FIJI: + return fiji_baco_set_state(hwmgr, state); + case CHIP_POLARIS10: + case CHIP_POLARIS11: + case CHIP_POLARIS12: + case CHIP_VEGAM: + return polaris_baco_set_state(hwmgr, state); +#ifdef CONFIG_DRM_AMDGPU_CIK + case CHIP_BONAIRE: + case CHIP_HAWAII: + return ci_baco_set_state(hwmgr, state); +#endif + default: + return -EINVAL; + } +} diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_baco.h b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_baco.h new file mode 100644 index 000000000000..be0d98abb536 --- /dev/null +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_baco.h @@ -0,0 +1,32 @@ +/* + * Copyright 2019 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + */ +#ifndef __SMU7_BACO_H__ +#define __SMU7_BACO_H__ +#include "hwmgr.h" +#include "common_baco.h" + +extern int smu7_baco_get_capability(struct pp_hwmgr *hwmgr, bool *cap); +extern int smu7_baco_get_state(struct pp_hwmgr *hwmgr, enum BACO_STATE *state); +extern int smu7_baco_set_state(struct pp_hwmgr *hwmgr, enum BACO_STATE state); + +#endif diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_baco.c b/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_baco.c index 84b7217b7bda..ea743bea8e29 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_baco.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_baco.c @@ -182,43 +182,11 @@ static const struct baco_cmd_entry clean_baco_tbl_iceland[] = { CMD_WRITE, mmBIOS_SCRATCH_7, 0, 0, 0, 0 } }; -int tonga_baco_get_capability(struct pp_hwmgr *hwmgr, bool *cap) -{ - struct amdgpu_device *adev = (struct amdgpu_device *)(hwmgr->adev); - uint32_t reg; - - *cap = false; - if (!phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_BACO)) - return 0; - - reg = RREG32(mmCC_BIF_BX_FUSESTRAP0); - - if (reg & CC_BIF_BX_FUSESTRAP0__STRAP_BIF_PX_CAPABLE_MASK) - *cap = true; - - return 0; -} - -int tonga_baco_get_state(struct pp_hwmgr *hwmgr, enum BACO_STATE *state) -{ - struct amdgpu_device *adev = (struct amdgpu_device *)(hwmgr->adev); - uint32_t reg; - - reg = RREG32(mmBACO_CNTL); - - if (reg & BACO_CNTL__BACO_MODE_MASK) - /* gfx has already entered BACO state */ - *state = BACO_STATE_IN; - else - *state = BACO_STATE_OUT; - return 0; -} - int tonga_baco_set_state(struct pp_hwmgr *hwmgr, enum BACO_STATE state) { enum BACO_STATE cur_state; - tonga_baco_get_state(hwmgr, &cur_state); + smu7_baco_get_state(hwmgr, &cur_state); if (cur_state == state) /* aisc already in the target state */ diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_baco.h b/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_baco.h index 21301b043255..5dc16cc8a295 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_baco.h +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_baco.h @@ -22,11 +22,8 @@ */ #ifndef __TONGA_BACO_H__ #define __TONGA_BACO_H__ -#include "hwmgr.h" -#include "common_baco.h" +#include "smu7_baco.h" -extern int tonga_baco_get_capability(struct pp_hwmgr *hwmgr, bool *cap); -extern int tonga_baco_get_state(struct pp_hwmgr *hwmgr, enum BACO_STATE *state); extern int tonga_baco_set_state(struct pp_hwmgr *hwmgr, enum BACO_STATE state); #endif |