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author | Arnd Bergmann <arnd@arndb.de> | 2017-06-23 14:29:17 +0200 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2017-06-23 14:29:17 +0200 |
commit | 9b3088135aba74c177529096a6925f3c0af077c2 (patch) | |
tree | 5224732e2078bc35f64f7ea19e098381f693737e | |
parent | 30edd98b3b0edd0715ef736fd54d08a15cbc9462 (diff) | |
parent | 44f73dc42c11398d7b84e94365a485ebd6420798 (diff) | |
download | linux-9b3088135aba74c177529096a6925f3c0af077c2.tar.gz linux-9b3088135aba74c177529096a6925f3c0af077c2.tar.bz2 linux-9b3088135aba74c177529096a6925f3c0af077c2.zip |
Merge tag 'mvebu-fixes-4.12-1' of git://git.infradead.org/linux-mvebu into next/dt64
mvebu fixes for 4.12
Fix the interrupt description of the crypto node for device tree of
the Armada 7K/8K SoCs
* tag 'mvebu-fixes-4.12-1' of git://git.infradead.org/linux-mvebu:
arm64: marvell: dts: fix interrupts in 7k/8k crypto nodes
-rw-r--r-- | arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi | 3 | ||||
-rw-r--r-- | arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi | 3 |
2 files changed, 2 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi index aec5f94423dd..f611e843094c 100644 --- a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi @@ -261,8 +261,7 @@ cpm_crypto: crypto@800000 { compatible = "inside-secure,safexcel-eip197"; reg = <0x800000 0x200000>; - interrupts = <ICU_GRP_NSR 87 (IRQ_TYPE_EDGE_RISING - | IRQ_TYPE_LEVEL_HIGH)>, + interrupts = <ICU_GRP_NSR 87 IRQ_TYPE_LEVEL_HIGH>, <ICU_GRP_NSR 88 IRQ_TYPE_LEVEL_HIGH>, <ICU_GRP_NSR 89 IRQ_TYPE_LEVEL_HIGH>, <ICU_GRP_NSR 90 IRQ_TYPE_LEVEL_HIGH>, diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi index 9daf1e17bdfe..84d3bd80eb51 100644 --- a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi @@ -252,8 +252,7 @@ cps_crypto: crypto@800000 { compatible = "inside-secure,safexcel-eip197"; reg = <0x800000 0x200000>; - interrupts = <ICU_GRP_NSR 87 (IRQ_TYPE_EDGE_RISING - | IRQ_TYPE_LEVEL_HIGH)>, + interrupts = <ICU_GRP_NSR 87 IRQ_TYPE_LEVEL_HIGH>, <ICU_GRP_NSR 88 IRQ_TYPE_LEVEL_HIGH>, <ICU_GRP_NSR 89 IRQ_TYPE_LEVEL_HIGH>, <ICU_GRP_NSR 90 IRQ_TYPE_LEVEL_HIGH>, |