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author | Dmitry Osipenko <digetx@gmail.com> | 2018-05-18 23:06:35 +0300 |
---|---|---|
committer | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2018-05-21 13:44:24 +0200 |
commit | 9b633cb621bf0fb4eae961a0a52f573d171d7e3e (patch) | |
tree | 3beac741640cb41ea8172598d84dda50fbe39fb4 | |
parent | 9a25ba9a153d91a1740392fb3a3b966a44daeaf7 (diff) | |
download | linux-9b633cb621bf0fb4eae961a0a52f573d171d7e3e.tar.gz linux-9b633cb621bf0fb4eae961a0a52f573d171d7e3e.tar.bz2 linux-9b633cb621bf0fb4eae961a0a52f573d171d7e3e.zip |
cpufreq: tegra20: Remove EMC clock usage
The EMC driver has been gone 4 years ago, since the commit a7cbe92cef27
("ARM: tegra: remove tegra EMC scaling driver"). Remove the EMC clock
usage as it does nothing. We may consider re-implementing the EMC scaling
later, probably using PM Memory Bandwidth QoS API.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
-rw-r--r-- | drivers/cpufreq/tegra20-cpufreq.c | 22 |
1 files changed, 0 insertions, 22 deletions
diff --git a/drivers/cpufreq/tegra20-cpufreq.c b/drivers/cpufreq/tegra20-cpufreq.c index bec1a50a8138..4b09a8b410c4 100644 --- a/drivers/cpufreq/tegra20-cpufreq.c +++ b/drivers/cpufreq/tegra20-cpufreq.c @@ -40,7 +40,6 @@ static struct cpufreq_frequency_table freq_table[] = { static struct clk *cpu_clk; static struct clk *pll_x_clk; static struct clk *pll_p_clk; -static struct clk *emc_clk; static bool pll_x_prepared; static unsigned int tegra_get_intermediate(struct cpufreq_policy *policy, @@ -92,17 +91,6 @@ static int tegra_target(struct cpufreq_policy *policy, unsigned int index) int ret = 0; /* - * Vote on memory bus frequency based on cpu frequency - * This sets the minimum frequency, display or avp may request higher - */ - if (rate >= 816000) - clk_set_rate(emc_clk, 600000000); /* cpu 816 MHz, emc max */ - else if (rate >= 456000) - clk_set_rate(emc_clk, 300000000); /* cpu 456 MHz, emc 150Mhz */ - else - clk_set_rate(emc_clk, 100000000); /* emc 50Mhz */ - - /* * target freq == pll_p, don't need to take extra reference to pll_x_clk * as it isn't used anymore. */ @@ -137,14 +125,12 @@ static int tegra_cpu_init(struct cpufreq_policy *policy) if (policy->cpu >= NUM_CPUS) return -EINVAL; - clk_prepare_enable(emc_clk); clk_prepare_enable(cpu_clk); /* FIXME: what's the actual transition time? */ ret = cpufreq_generic_init(policy, freq_table, 300 * 1000); if (ret) { clk_disable_unprepare(cpu_clk); - clk_disable_unprepare(emc_clk); return ret; } @@ -156,7 +142,6 @@ static int tegra_cpu_init(struct cpufreq_policy *policy) static int tegra_cpu_exit(struct cpufreq_policy *policy) { clk_disable_unprepare(cpu_clk); - clk_disable_unprepare(emc_clk); return 0; } @@ -188,19 +173,12 @@ static int __init tegra_cpufreq_init(void) if (IS_ERR(pll_p_clk)) return PTR_ERR(pll_p_clk); - emc_clk = clk_get_sys("cpu", "emc"); - if (IS_ERR(emc_clk)) { - clk_put(cpu_clk); - return PTR_ERR(emc_clk); - } - return cpufreq_register_driver(&tegra_cpufreq_driver); } static void __exit tegra_cpufreq_exit(void) { cpufreq_unregister_driver(&tegra_cpufreq_driver); - clk_put(emc_clk); clk_put(cpu_clk); } |