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| author | Oleksij Rempel <o.rempel@pengutronix.de> | 2023-01-31 09:46:29 +0100 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2023-03-06 10:01:46 +0800 |
| commit | aad004c1382c186d1c787155f8ce8a5ee98a9974 (patch) | |
| tree | 3214955ccd9fffb08f211d0f54392fc341f8c768 | |
| parent | d289654fd62b5fc21b81e23ead100e4d47ee2db7 (diff) | |
| download | linux-aad004c1382c186d1c787155f8ce8a5ee98a9974.tar.gz linux-aad004c1382c186d1c787155f8ce8a5ee98a9974.tar.bz2 linux-aad004c1382c186d1c787155f8ce8a5ee98a9974.zip | |
ARM: dts: imx6dl-alti6p: configure ethernet reference clock parent
On this board the PHY is the ref clock provider. So, configure ethernet
reference clock as input.
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| -rw-r--r-- | arch/arm/boot/dts/imx6dl-alti6p.dts | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/imx6dl-alti6p.dts b/arch/arm/boot/dts/imx6dl-alti6p.dts index e8325fd680d9..e6a4e2770640 100644 --- a/arch/arm/boot/dts/imx6dl-alti6p.dts +++ b/arch/arm/boot/dts/imx6dl-alti6p.dts @@ -22,6 +22,7 @@ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <50000000>; + clock-output-names = "enet_ref_pad"; }; i2c2-mux { @@ -191,6 +192,13 @@ status = "okay"; }; +&clks { + clocks = <&clock_ksz8081>; + clock-names = "enet_ref_pad"; + assigned-clocks = <&clks IMX6QDL_CLK_ENET_REF_SEL>; + assigned-clock-parents = <&clock_ksz8081>; +}; + &ecspi1 { cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>; pinctrl-names = "default"; @@ -208,10 +216,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rmii"; - clocks = <&clks IMX6QDL_CLK_ENET>, - <&clks IMX6QDL_CLK_ENET>, - <&clock_ksz8081>; - clock-names = "ipg", "ahb", "ptp"; status = "okay"; mdio { |