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| author | Sean Paul <seanpaul@chromium.org> | 2014-09-10 10:52:05 -0400 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2014-11-13 16:11:57 +0100 |
| commit | b298e98ef6ab9c4279b427db717a1624ef722751 (patch) | |
| tree | 25fa11781e24c5ab16ba482fab4bd0ecda0591fc | |
| parent | 08a15cc34ddf7b7247122de44687364bcd82c2bf (diff) | |
| download | linux-b298e98ef6ab9c4279b427db717a1624ef722751.tar.gz linux-b298e98ef6ab9c4279b427db717a1624ef722751.tar.bz2 linux-b298e98ef6ab9c4279b427db717a1624ef722751.zip | |
gpu: host1x: mipi: Set MIPI_CAL_BIAS_PAD_CFG1 register
During calibration, sets the "internal reference level for drive pull-
down" to the value specified in the Tegra TRM.
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
| -rw-r--r-- | drivers/gpu/host1x/mipi.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/host1x/mipi.c b/drivers/gpu/host1x/mipi.c index 22e20c2399c5..fbc6ee6ca337 100644 --- a/drivers/gpu/host1x/mipi.c +++ b/drivers/gpu/host1x/mipi.c @@ -72,6 +72,7 @@ #define MIPI_CAL_BIAS_PAD_E_VCLAMP_REF (1 << 0) #define MIPI_CAL_BIAS_PAD_CFG1 0x17 +#define MIPI_CAL_BIAS_PAD_DRV_DN_REF(x) (((x) & 0x7) << 16) #define MIPI_CAL_BIAS_PAD_CFG2 0x18 #define MIPI_CAL_BIAS_PAD_PDVREG (1 << 1) @@ -203,6 +204,9 @@ int tegra_mipi_calibrate(struct tegra_mipi_device *device) value |= MIPI_CAL_BIAS_PAD_E_VCLAMP_REF; tegra_mipi_writel(device->mipi, value, MIPI_CAL_BIAS_PAD_CFG0); + tegra_mipi_writel(device->mipi, MIPI_CAL_BIAS_PAD_DRV_DN_REF(2), + MIPI_CAL_BIAS_PAD_CFG1); + value = tegra_mipi_readl(device->mipi, MIPI_CAL_BIAS_PAD_CFG2); value &= ~MIPI_CAL_BIAS_PAD_PDVREG; tegra_mipi_writel(device->mipi, value, MIPI_CAL_BIAS_PAD_CFG2); |