diff options
| author | Xiu Jianfeng <xiujianfeng@huawei.com> | 2022-11-22 23:23:53 +0800 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2022-11-29 12:11:00 -0800 |
| commit | b55226f8553d255f5002c751c7c6ba9291f34bf2 (patch) | |
| tree | 4bda0f3f7b4103375e33de46bd41d1a9eb0837e5 | |
| parent | 12897adc8eea9e56e44482dcdf71d4c98a08dbde (diff) | |
| download | linux-b55226f8553d255f5002c751c7c6ba9291f34bf2.tar.gz linux-b55226f8553d255f5002c751c7c6ba9291f34bf2.tar.bz2 linux-b55226f8553d255f5002c751c7c6ba9291f34bf2.zip | |
clk: visconti: Fix memory leak in visconti_register_pll()
@pll->rate_table has allocated memory by kmemdup(), if clk_hw_register()
fails, it should be freed, otherwise it will cause memory leak issue,
this patch fixes it.
Fixes: b4cbe606dc36 ("clk: visconti: Add support common clock driver and reset driver")
Signed-off-by: Xiu Jianfeng <xiujianfeng@huawei.com>
Link: https://lore.kernel.org/r/20221122152353.204132-1-xiujianfeng@huawei.com
Acked-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
| -rw-r--r-- | drivers/clk/visconti/pll.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/visconti/pll.c b/drivers/clk/visconti/pll.c index a484cb945d67..1f3234f22667 100644 --- a/drivers/clk/visconti/pll.c +++ b/drivers/clk/visconti/pll.c @@ -277,6 +277,7 @@ static struct clk_hw *visconti_register_pll(struct visconti_pll_provider *ctx, ret = clk_hw_register(NULL, &pll->hw); if (ret) { pr_err("failed to register pll clock %s : %d\n", name, ret); + kfree(pll->rate_table); kfree(pll); pll_hw_clk = ERR_PTR(ret); } |