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authorBoris BREZILLON <boris.brezillon@free-electrons.com>2014-06-11 11:17:29 +0200
committerWolfram Sang <wsa@the-dreams.de>2014-06-12 00:24:05 +0200
commitbb336ba0aaa5bef253d60bdeb08537ddecc7f42f (patch)
treef5d0e38a28431ee4bd01f6914286a799c9bbe99d
parentc41aa3ce938b684d853f1004072b6116a41bb1ce (diff)
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i2c: sunxi: add P2WI DT bindings documentation
P2WI (Push/Pull 2 Wire Interface) is an SMBus like bus used to communicate with some PMICs (like the AXP221). Document P2WI DT bindings which are pretty much the same as the one defined for the marvell's mv64xxx controller. Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-rw-r--r--Documentation/devicetree/bindings/i2c/i2c-sunxi-p2wi.txt41
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diff --git a/Documentation/devicetree/bindings/i2c/i2c-sunxi-p2wi.txt b/Documentation/devicetree/bindings/i2c/i2c-sunxi-p2wi.txt
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+
+* Allwinner P2WI (Push/Pull 2 Wire Interface) controller
+
+Required properties :
+
+ - reg : Offset and length of the register set for the device.
+ - compatible : Should one of the following:
+ - "allwinner,sun6i-a31-p2wi"
+ - interrupts : The interrupt line connected to the P2WI peripheral.
+ - clocks : The gate clk connected to the P2WI peripheral.
+ - resets : The reset line connected to the P2WI peripheral.
+
+Optional properties :
+
+ - clock-frequency : Desired P2WI bus clock frequency in Hz. If not set the
+default frequency is 100kHz
+
+A P2WI may contain one child node encoding a P2WI slave device.
+
+Slave device properties:
+ Required properties:
+ - reg : the I2C slave address used during the initialization
+ process to switch from I2C to P2WI mode
+
+Example:
+
+ p2wi@01f03400 {
+ compatible = "allwinner,sun6i-a31-p2wi";
+ reg = <0x01f03400 0x400>;
+ interrupts = <0 39 4>;
+ clocks = <&apb0_gates 3>;
+ clock-frequency = <6000000>;
+ resets = <&apb0_rst 3>;
+
+ axp221: pmic@68 {
+ compatible = "x-powers,axp221";
+ reg = <0x68>;
+
+ /* ... */
+ };
+ };