diff options
| author | Olof Johansson <olof@lixom.net> | 2016-01-07 06:05:59 +0100 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2016-01-07 06:05:59 +0100 |
| commit | ce96cb7386a57b270648f9ba6003065329a26bd3 (patch) | |
| tree | 9ac8e983f96cab57757e0714f9be71a74fb8aa8f | |
| parent | 326ea45aa827da6686c78b5907f9839f91ef5782 (diff) | |
| parent | 94af7a3c310f5877dc6f756179b92f24f89a9b08 (diff) | |
| download | linux-ce96cb7386a57b270648f9ba6003065329a26bd3.tar.gz linux-ce96cb7386a57b270648f9ba6003065329a26bd3.tar.bz2 linux-ce96cb7386a57b270648f9ba6003065329a26bd3.zip | |
Merge tag 'samsung-clk-exynos4-4.5' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/drivers
Add a Security SubSystem (SSS) clock for Exynos4, needed by exynos-rng
driver (Pseudo Random Number Generator).
* tag 'samsung-clk-exynos4-4.5' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
clk: samsung: exynos4: Add SSS gate clock
| -rw-r--r-- | drivers/clk/samsung/clk-exynos4.c | 1 | ||||
| -rw-r--r-- | include/dt-bindings/clock/exynos4.h | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c index 7f370d3e0983..ac03e4fe2871 100644 --- a/drivers/clk/samsung/clk-exynos4.c +++ b/drivers/clk/samsung/clk-exynos4.c @@ -1024,6 +1024,7 @@ static struct samsung_gate_clock exynos4_gate_clks[] __initdata = { 0, 0), GATE(CLK_AC97, "ac97", "aclk100", GATE_IP_PERIL, 27, 0, 0), + GATE(CLK_SSS, "sss", "aclk133", GATE_IP_DMC, 4, 0, 0), GATE(CLK_PPMUDMC0, "ppmudmc0", "aclk133", GATE_IP_DMC, 8, 0, 0), GATE(CLK_PPMUDMC1, "ppmudmc1", "aclk133", GATE_IP_DMC, 9, 0, 0), GATE(CLK_PPMUCPU, "ppmucpu", "aclk133", GATE_IP_DMC, 10, 0, 0), diff --git a/include/dt-bindings/clock/exynos4.h b/include/dt-bindings/clock/exynos4.h index c4b1676ea674..c40111f36d5e 100644 --- a/include/dt-bindings/clock/exynos4.h +++ b/include/dt-bindings/clock/exynos4.h @@ -93,6 +93,7 @@ #define CLK_SCLK_FIMG2D 177 /* gate clocks */ +#define CLK_SSS 255 #define CLK_FIMC0 256 #define CLK_FIMC1 257 #define CLK_FIMC2 258 |