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authorThierry Reding <treding@nvidia.com>2019-07-26 12:27:41 +0200
committerDavid S. Miller <davem@davemloft.net>2019-07-27 13:52:26 -0700
commitddfbee9e3204a0158774bbe9df0f555573e81f43 (patch)
tree403b7ae4fe3302b07372e5001152895773912a47
parent1a981c0586c038710227eb740350f291e77ce365 (diff)
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net: stmmac: Do not request stmmaceth clock
The stmmaceth clock is specified by the slave_bus and apb_pclk clocks in the device tree bindings for snps,dwc-qos-ethernet-4.10 compatible nodes of this IP. The subdrivers for these bindings will be requesting the stmmac clock correctly at a later point, so there is no need to request it here and cause an error message to be printed to the kernel log. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c14
1 files changed, 8 insertions, 6 deletions
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
index 333b09564b88..7ad2bb90ceb1 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
@@ -521,13 +521,15 @@ stmmac_probe_config_dt(struct platform_device *pdev, const char **mac)
}
/* clock setup */
- plat->stmmac_clk = devm_clk_get(&pdev->dev,
- STMMAC_RESOURCE_NAME);
- if (IS_ERR(plat->stmmac_clk)) {
- dev_warn(&pdev->dev, "Cannot get CSR clock\n");
- plat->stmmac_clk = NULL;
+ if (!of_device_is_compatible(np, "snps,dwc-qos-ethernet-4.10")) {
+ plat->stmmac_clk = devm_clk_get(&pdev->dev,
+ STMMAC_RESOURCE_NAME);
+ if (IS_ERR(plat->stmmac_clk)) {
+ dev_warn(&pdev->dev, "Cannot get CSR clock\n");
+ plat->stmmac_clk = NULL;
+ }
+ clk_prepare_enable(plat->stmmac_clk);
}
- clk_prepare_enable(plat->stmmac_clk);
plat->pclk = devm_clk_get(&pdev->dev, "pclk");
if (IS_ERR(plat->pclk)) {