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authorJonathan Cameron <Jonathan.Cameron@huawei.com>2022-05-08 18:56:03 +0100
committerJonathan Cameron <Jonathan.Cameron@huawei.com>2022-06-14 11:53:13 +0100
commite754fb7e7a05e3838c9aa044b4114869dd0d1e17 (patch)
treed546cad338cfbb8475583e59793f70180ad35d5a
parent6ebf401d555ee1e75e779b865d38e171db0aa1f2 (diff)
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iio: adc: max1027: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: fc167f624833 ("iio: add support of the max1027") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-24-jic23@kernel.org
-rw-r--r--drivers/iio/adc/max1027.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/iio/adc/max1027.c b/drivers/iio/adc/max1027.c
index 4daf1d576c4e..b725d012625c 100644
--- a/drivers/iio/adc/max1027.c
+++ b/drivers/iio/adc/max1027.c
@@ -272,7 +272,7 @@ struct max1027_state {
struct mutex lock;
struct completion complete;
- u8 reg ____cacheline_aligned;
+ u8 reg __aligned(IIO_DMA_MINALIGN);
};
static int max1027_wait_eoc(struct iio_dev *indio_dev)