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| author | Dmitry Osipenko <digetx@gmail.com> | 2018-02-18 20:01:45 +0300 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2018-03-08 14:59:14 +0100 |
| commit | ea8570362a293735461ba60704bc5db4bf3fa269 (patch) | |
| tree | fc879c147a1729d1908f49cce42fdf3ceee9a26c | |
| parent | 7928b2cbe55b2a410a0f5c1f154610059c57b1b2 (diff) | |
| download | linux-ea8570362a293735461ba60704bc5db4bf3fa269.tar.gz linux-ea8570362a293735461ba60704bc5db4bf3fa269.tar.bz2 linux-ea8570362a293735461ba60704bc5db4bf3fa269.zip | |
ARM: tegra: Add IRAM node on Tegra30
IRAM is a static RAM that consists of four contiguous 64 KiB blocks,
it is currently used to store CPU resume code, utilized by the video
decoder engine and could be used as a general-purpose fast memory.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
| -rw-r--r-- | arch/arm/boot/dts/tegra30.dtsi | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index c3e9f1e847db..833d97206aef 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi @@ -91,6 +91,14 @@ }; }; + iram@40000000 { + compatible = "mmio-sram"; + reg = <0x40000000 0x40000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x40000000 0x40000>; + }; + host1x@50000000 { compatible = "nvidia,tegra30-host1x", "simple-bus"; reg = <0x50000000 0x00024000>; |