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| author | John Crispin <blogic@openwrt.org> | 2012-11-09 13:34:18 +0100 |
|---|---|---|
| committer | John Crispin <blogic@openwrt.org> | 2012-11-11 18:47:31 +0100 |
| commit | f2bbe41c507b475c6f0ae1fca69c7aac6d31d228 (patch) | |
| tree | 8f3375e66ab867f606a3d0ac6f3bae41e26e8c2a | |
| parent | b8b3acbe6077b4736f641ec445be8a42cdd1f08b (diff) | |
| download | linux-f2bbe41c507b475c6f0ae1fca69c7aac6d31d228.tar.gz linux-f2bbe41c507b475c6f0ae1fca69c7aac6d31d228.tar.bz2 linux-f2bbe41c507b475c6f0ae1fca69c7aac6d31d228.zip | |
MIPS: lantiq: adds xrx200 ethernet clock definition
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4521
| -rw-r--r-- | arch/mips/lantiq/xway/sysctrl.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/mips/lantiq/xway/sysctrl.c b/arch/mips/lantiq/xway/sysctrl.c index 2917b56b6b25..3925e6609acc 100644 --- a/arch/mips/lantiq/xway/sysctrl.c +++ b/arch/mips/lantiq/xway/sysctrl.c @@ -370,6 +370,10 @@ void __init ltq_soc_init(void) clkdev_add_pmu("1d900000.pcie", "pdi", 1, PMU1_PCIE_PDI); clkdev_add_pmu("1d900000.pcie", "ctl", 1, PMU1_PCIE_CTL); clkdev_add_pmu("1d900000.pcie", "ahb", 0, PMU_AHBM | PMU_AHBS); + clkdev_add_pmu("1e108000.eth", NULL, 0, + PMU_SWITCH | PMU_PPE_DPLUS | PMU_PPE_DPLUM | + PMU_PPE_EMA | PMU_PPE_TC | PMU_PPE_SLL01 | + PMU_PPE_QSB | PMU_PPE_TOP); } else if (of_machine_is_compatible("lantiq,ar9")) { clkdev_add_static(ltq_ar9_cpu_hz(), ltq_ar9_fpi_hz(), ltq_ar9_fpi_hz()); |