diff options
author | Tony Lindgren <tony@atomide.com> | 2022-08-15 16:12:45 +0300 |
---|---|---|
committer | Daniel Lezcano <daniel.lezcano@linaro.org> | 2022-09-20 10:49:45 +0200 |
commit | f32bdac10cb5f461f8c71c3b9703617c42322d2f (patch) | |
tree | 244a063b100f103f08854dc81f902707d423ab89 | |
parent | 49cd16bb573e43dc2ee64d734b9b545475dbb35f (diff) | |
download | linux-f32bdac10cb5f461f8c71c3b9703617c42322d2f.tar.gz linux-f32bdac10cb5f461f8c71c3b9703617c42322d2f.tar.bz2 linux-f32bdac10cb5f461f8c71c3b9703617c42322d2f.zip |
clocksource/drivers/timer-ti-dm: Simplify register access further
Let's unify register access and use dmtimer_read() and dmtimer_write()
also for the timer revision specific registers like we now do for the
shread registers.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Janusz Krzysztofik <jmkrzyszt@gmail.com>
Link: https://lore.kernel.org/r/20220815131250.34603-5-tony@atomide.com
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
-rw-r--r-- | drivers/clocksource/timer-ti-dm.c | 28 | ||||
-rw-r--r-- | include/clocksource/timer-ti-dm.h | 6 |
2 files changed, 17 insertions, 17 deletions
diff --git a/drivers/clocksource/timer-ti-dm.c b/drivers/clocksource/timer-ti-dm.c index 61c3c7684314..fe8ba0fad869 100644 --- a/drivers/clocksource/timer-ti-dm.c +++ b/drivers/clocksource/timer-ti-dm.c @@ -101,16 +101,16 @@ static inline void __omap_dm_timer_init_regs(struct omap_dm_timer *timer) tidr = readl_relaxed(timer->io_base); if (!(tidr >> 16)) { timer->revision = 1; - timer->irq_stat = timer->io_base + OMAP_TIMER_V1_STAT_OFFSET; - timer->irq_ena = timer->io_base + OMAP_TIMER_V1_INT_EN_OFFSET; - timer->irq_dis = timer->io_base + OMAP_TIMER_V1_INT_EN_OFFSET; + timer->irq_stat = OMAP_TIMER_V1_STAT_OFFSET; + timer->irq_ena = OMAP_TIMER_V1_INT_EN_OFFSET; + timer->irq_dis = OMAP_TIMER_V1_INT_EN_OFFSET; timer->pend = timer->io_base + _OMAP_TIMER_WRITE_PEND_OFFSET; timer->func_base = timer->io_base; } else { timer->revision = 2; - timer->irq_stat = timer->io_base + OMAP_TIMER_V2_IRQSTATUS; - timer->irq_ena = timer->io_base + OMAP_TIMER_V2_IRQENABLE_SET; - timer->irq_dis = timer->io_base + OMAP_TIMER_V2_IRQENABLE_CLR; + timer->irq_stat = OMAP_TIMER_V2_IRQSTATUS - OMAP_TIMER_V2_FUNC_OFFSET; + timer->irq_ena = OMAP_TIMER_V2_IRQENABLE_SET - OMAP_TIMER_V2_FUNC_OFFSET; + timer->irq_dis = OMAP_TIMER_V2_IRQENABLE_CLR - OMAP_TIMER_V2_FUNC_OFFSET; timer->pend = timer->io_base + _OMAP_TIMER_WRITE_PEND_OFFSET + OMAP_TIMER_V2_FUNC_OFFSET; @@ -165,13 +165,13 @@ static inline void __omap_dm_timer_stop(struct omap_dm_timer *timer, } /* Ack possibly pending interrupt */ - writel_relaxed(OMAP_TIMER_INT_OVERFLOW, timer->irq_stat); + dmtimer_write(timer, timer->irq_stat, OMAP_TIMER_INT_OVERFLOW); } static inline void __omap_dm_timer_int_enable(struct omap_dm_timer *timer, unsigned int value) { - writel_relaxed(value, timer->irq_ena); + dmtimer_write(timer, timer->irq_ena, value); dmtimer_write(timer, OMAP_TIMER_WAKEUP_EN_REG, value); } @@ -184,7 +184,7 @@ __omap_dm_timer_read_counter(struct omap_dm_timer *timer) static inline void __omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value) { - writel_relaxed(value, timer->irq_stat); + dmtimer_write(timer, timer->irq_stat, value); } static void omap_timer_restore_context(struct omap_dm_timer *timer) @@ -196,7 +196,7 @@ static void omap_timer_restore_context(struct omap_dm_timer *timer) dmtimer_write(timer, OMAP_TIMER_LOAD_REG, timer->context.tldr); dmtimer_write(timer, OMAP_TIMER_MATCH_REG, timer->context.tmar); dmtimer_write(timer, OMAP_TIMER_IF_CTRL_REG, timer->context.tsicr); - writel_relaxed(timer->context.tier, timer->irq_ena); + dmtimer_write(timer, timer->irq_ena, timer->context.tier); dmtimer_write(timer, OMAP_TIMER_CTRL_REG, timer->context.tclr); } @@ -208,7 +208,7 @@ static void omap_timer_save_context(struct omap_dm_timer *timer) timer->context.twer = dmtimer_read(timer, OMAP_TIMER_WAKEUP_EN_REG); timer->context.tldr = dmtimer_read(timer, OMAP_TIMER_LOAD_REG); timer->context.tmar = dmtimer_read(timer, OMAP_TIMER_MATCH_REG); - timer->context.tier = readl_relaxed(timer->irq_ena); + timer->context.tier = dmtimer_read(timer, timer->irq_ena); timer->context.tsicr = dmtimer_read(timer, OMAP_TIMER_IF_CTRL_REG); } @@ -722,9 +722,9 @@ static int omap_dm_timer_set_int_disable(struct omap_dm_timer *timer, u32 mask) omap_dm_timer_enable(timer); if (timer->revision == 1) - l = readl_relaxed(timer->irq_ena) & ~mask; + l = dmtimer_read(timer, timer->irq_ena) & ~mask; - writel_relaxed(l, timer->irq_dis); + dmtimer_write(timer, timer->irq_dis, l); l = dmtimer_read(timer, OMAP_TIMER_WAKEUP_EN_REG) & ~mask; dmtimer_write(timer, OMAP_TIMER_WAKEUP_EN_REG, l); @@ -741,7 +741,7 @@ static unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer) return 0; } - l = readl_relaxed(timer->irq_stat); + l = dmtimer_read(timer, timer->irq_stat); return l; } diff --git a/include/clocksource/timer-ti-dm.h b/include/clocksource/timer-ti-dm.h index 4142bf77be1a..e874eed2fa46 100644 --- a/include/clocksource/timer-ti-dm.h +++ b/include/clocksource/timer-ti-dm.h @@ -100,9 +100,9 @@ struct omap_dm_timer { struct clk *fclk; void __iomem *io_base; - void __iomem *irq_stat; /* TISR/IRQSTATUS interrupt status */ - void __iomem *irq_ena; /* irq enable */ - void __iomem *irq_dis; /* irq disable, only on v2 ip */ + int irq_stat; /* TISR/IRQSTATUS interrupt status */ + int irq_ena; /* irq enable */ + int irq_dis; /* irq disable, only on v2 ip */ void __iomem *pend; /* write pending */ void __iomem *func_base; /* function register base */ |